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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id f17-20020a05600c155100b00405959bbf4fsm4497832wmg.19.2023.10.19.06.13.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:13:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697721219; x=1698326019; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Be57N8xZeT1c4/L41PlRl8GZmps32g61PsDN8JovFx4=; b=zC0Lta4A/5ZMidXyHUzFprlnGVS4yNg01aKZF+5PyicoV/PSrVN2Pn5yJQPuw3JCVl 6A1T0YmEVxDFem/Lh9kegBZpa1wtJ7dgoHCxE4Hu9oAt4b/lLG3nzz4DP+rEuO+qZYIf BQbox6OajUpbLhdra05kIrMO1uN4N+0rOj3LdLdphc36kBFDA4FzIImiyyL2UULBKNzv QWfXwUix63DqwrD4Cow6ThkjzwrIXiRvtvp8qMvV/6VIh16l4br4iIDiMhSctfP4lgw3 23PM6mGwJaKgoXBWF6G7+w0FL/eM9YEV9OMTogonVH9lpkB2ekraBn6vWCQNxnK3j1T6 JTMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697721219; x=1698326019; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Be57N8xZeT1c4/L41PlRl8GZmps32g61PsDN8JovFx4=; b=MUzetiibfkfQwR7I9CmnbfRovk8RveNangLMDEP8CWz0VyOKIPcFtEw6x5OosWd/iU 9wGdzHfXDO60fAEcxnE6COAlgNqXKdlfzGhoTMnZMkATdPrHZWUX6se1rrYXV3Tl9Tft X4dIM4wQTgr983MFjgDAyYGvN4eDkzjolgz51iRnwfupUyLU7heUEVkaeKxlkeweFvFh UqgVg8EeL0LjP9bo99AaCfKA8zAzKOCVwaMO/5/6BjRh7g+WeD9M+LZTgy6jyAphqd6a owuaJ3Ne4tVXt+XDnnkvffAA7DFKEq/xNGFrDzv8bqP7z7cTFNG9GqR6UgzOrHU8bDPa QPhA== X-Gm-Message-State: AOJu0YwOL8QtfS2X7P0o+euUb/CSafFftquzJBGxzbTrqrKgXVLlJYdI sZLHjBFGRCo+1NGBHNbaXs+mKWTQbYE9y7dVgGtx5g== X-Google-Smtp-Source: AGHT+IEfEoHNh/Sd/k1fvpeN5XgBP/L133U3pJV1rKCJlNOa7atRBbglaCzXMrwXZgviZISd48gavQ== X-Received: by 2002:a05:600c:1389:b0:404:7659:ba39 with SMTP id u9-20020a05600c138900b004047659ba39mr1743426wmf.16.1697721218949; Thu, 19 Oct 2023 06:13:38 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Richard Henderson , =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Barrat?= , Harsh Prateek Bora , David Gibson , Nicholas Piggin , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , LIU Zhiwei , Daniel Henrique Barboza , Thomas Huth , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 5/7] hw/ppc/pnv: Do not use SysBus API to map local MMIO region Date: Thu, 19 Oct 2023 15:13:03 +0200 Message-ID: <20231019131305.19157-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131305.19157-1-philmd@linaro.org> References: <20231019131305.19157-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1697723556068100003 There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei --- hw/ppc/pnv.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 10158f7684..c0e34fffbc 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1217,10 +1217,9 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Er= ror **errp) =20 name =3D g_strdup_printf("icp-%x", chip->chip_id); memory_region_init(&chip8->icp_mmio, OBJECT(chip), name, PNV_ICP_SIZE); - sysbus_init_mmio(SYS_BUS_DEVICE(chip), &chip8->icp_mmio); g_free(name); - - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 1, PNV_ICP_BASE(chip)); + memory_region_add_subregion(get_system_memory(), PNV_ICP_BASE(chip), + &chip8->icp_mmio); =20 /* Map the ICP registers for each thread */ for (i =3D 0; i < chip->nr_cores; i++) { --=20 2.41.0