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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id 13-20020a170902c24d00b001b9d95945afsm431058plg.155.2023.10.18.15.26.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 15:26:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697667966; x=1698272766; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CnIEHz3YbyZLNAezqFGknAR6TwEjyjNQhE5DMYmjFw8=; b=vIBq9W7cZD5iC1NGLqLebyUUHmGu+Uy5wRZHtdWrvN1K40nlqM24vvUu8L9VE6bVzp seWU8afV95rnfMCBBqlcwTjK5KCQkYJJHRjTTx3l+VX6TsbmlQ1yKmwf0I22D4OJzY+8 wLzQtyT357C0b+tdlFpi3sEG/X0cBORjhSYeiXxrdTDP1GmLtHUfaT6ziBADbXOCdTq4 veEMq5MJqEz7VmFwsQW05sejJWGw6ETXii1vgk3m2XlCStlxcHnMkO+U5TOZWPLBJ0Ht IuSucmtYecKz31i8+c7R4Z9D0ipNkRkcm1QDvwerPXLeQIm8NEzwO2FaPmIfp9tROj7I k2Sw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697667966; x=1698272766; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CnIEHz3YbyZLNAezqFGknAR6TwEjyjNQhE5DMYmjFw8=; b=ZTjf391o6ci8/YC9Q8K812EuLyE/6k2fCZAmHHUNmFP84Gw5bOELTaSI2swzlRfn8a hm0fgZiOHvk8iwZAYpHWgH35jCIWBdsyjxshYrqmwyX2bM/UBJfJTde+P4r5k3Yi9xNk IhpPsCHuOU7gzTKyFXPQYgNhF7OG5z06R1B4+NN56Bm4rtFtLhRztO7VnYUxxTG+yG+R nCOcejqwIQu6IfZqZ/XO7Yjj7e1x94ylJJxWyG6TTzOx8vii//GbY66GXs8uCDQVmXhY MSShxMlwLu4yS0mQZF4bA//5WSYN3FYPcTiAwB5ifo7GQRz8hUcNtMoK49NKZWvDk4hd X5XA== X-Gm-Message-State: AOJu0YxjiM5ZWwEXlFM9ol3DuGiEwuXN2HlfsrmwETOQinDmPhPhQHuu reEEMWjmyL79JatCUV45bKxV3QO6P7MIISuGP7U= X-Google-Smtp-Source: AGHT+IGu9t4bp0/BUinNp+w4lt/Omv9ZzfZe6h8yzWg7c30oIWpsgWdo9c0R+CaRZsV3dtedJr+tOQ== X-Received: by 2002:a17:903:41c8:b0:1ca:3fa6:4aef with SMTP id u8-20020a17090341c800b001ca3fa64aefmr778713ple.66.1697667966461; Wed, 18 Oct 2023 15:26:06 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Jordan Niethe Subject: [PULL 09/29] tcg/ppc: Use prefixed instructions in tcg_out_mem_long Date: Wed, 18 Oct 2023 15:25:37 -0700 Message-Id: <20231018222557.1562065-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231018222557.1562065-1-richard.henderson@linaro.org> References: <20231018222557.1562065-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1697668028221100001 Content-Type: text/plain; charset="utf-8" When the offset is out of range of the non-prefixed insn, but fits the 34-bit immediate of the prefixed insn, use that. Reviewed-by: Jordan Niethe Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 66 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index f4235383c6..34df9144cc 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -329,6 +329,15 @@ static bool tcg_target_const_match(int64_t val, TCGTyp= e type, int ct, int vece) #define STDX XO31(149) #define STQ XO62( 2) =20 +#define PLWA OPCD( 41) +#define PLD OPCD( 57) +#define PLXSD OPCD( 42) +#define PLXV OPCD(25 * 2 + 1) /* force tx=3D1 */ + +#define PSTD OPCD( 61) +#define PSTXSD OPCD( 46) +#define PSTXV OPCD(27 * 2 + 1) /* force sx=3D1 */ + #define ADDIC OPCD( 12) #define ADDI OPCD( 14) #define ADDIS OPCD( 15) @@ -737,6 +746,20 @@ static ptrdiff_t tcg_pcrel_diff_for_prefix(TCGContext = *s, const void *target) return tcg_pcrel_diff(s, target) - (tcg_out_need_prefix_align(s) ? 4 := 0); } =20 +/* Output Type 00 Prefix - 8-Byte Load/Store Form (8LS:D) */ +static void tcg_out_8ls_d(TCGContext *s, tcg_insn_unit opc, unsigned rt, + unsigned ra, tcg_target_long imm, bool r) +{ + tcg_insn_unit p, i; + + p =3D OPCD(1) | (r << 20) | ((imm >> 16) & 0x3ffff); + i =3D opc | TAI(rt, ra, imm); + + tcg_out_prefix_align(s); + tcg_out32(s, p); + tcg_out32(s, i); +} + /* Output Type 10 Prefix - Modified Load/Store Form (MLS:D) */ static void tcg_out_mls_d(TCGContext *s, tcg_insn_unit opc, unsigned rt, unsigned ra, tcg_target_long imm, bool r) @@ -1418,6 +1441,49 @@ static void tcg_out_mem_long(TCGContext *s, int opi,= int opx, TCGReg rt, break; } =20 + /* For unaligned or large offsets, use the prefixed form. */ + if (have_isa_3_10 + && (offset !=3D (int16_t)offset || (offset & align)) + && offset =3D=3D sextract64(offset, 0, 34)) { + /* + * Note that the MLS:D insns retain their un-prefixed opcode, + * while the 8LS:D insns use a different opcode space. + */ + switch (opi) { + case LBZ: + case LHZ: + case LHA: + case LWZ: + case STB: + case STH: + case STW: + case ADDI: + tcg_out_mls_d(s, opi, rt, base, offset, 0); + return; + case LWA: + tcg_out_8ls_d(s, PLWA, rt, base, offset, 0); + return; + case LD: + tcg_out_8ls_d(s, PLD, rt, base, offset, 0); + return; + case STD: + tcg_out_8ls_d(s, PSTD, rt, base, offset, 0); + return; + case LXSD: + tcg_out_8ls_d(s, PLXSD, rt & 31, base, offset, 0); + return; + case STXSD: + tcg_out_8ls_d(s, PSTXSD, rt & 31, base, offset, 0); + return; + case LXV: + tcg_out_8ls_d(s, PLXV, rt & 31, base, offset, 0); + return; + case STXV: + tcg_out_8ls_d(s, PSTXV, rt & 31, base, offset, 0); + return; + } + } + /* For unaligned, or very large offsets, use the indexed form. */ if (offset & align || offset !=3D (int32_t)offset || opi =3D=3D 0) { if (rs =3D=3D base) { --=20 2.34.1