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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id w17-20020a63f511000000b005b61a024ec7sm2176380pgh.74.2023.10.18.14.51.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 14:51:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697665903; x=1698270703; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HcidF9Jk1N+Ej8dbQUUvFmfE2V7LiGtPgLbzAI4Qab4=; b=JTOUyhC/XUy7Gr2RsMUbu28dzfSfUr+dCgUrTh8sJyk76u5B48M0m8Z6xelUUjLrC+ DC6bCjJlw1gIR+K3FS4lLWhPrmFsBfw+TTz102t83RFIVpm0/3ki5c4wcly9gsEdo9eY SqPY8t+LIzPX2Ag2v4X1blivRdZ52oKoDmRDA4AWVSbO3P8ulKk6DdyE8xXBAcd4iKUs yzyiRtYcja7UsiJwns1UNA2tnxZ4rfAxNQ120iwqG5sqLyTfmNz8YRsI8UeX+D2DOmj5 nt70QsyGq8hlE1DkKVpDVfyb+C1N+paqMrblYD9+9kGO2xd616EIOV+HRBgXyEKmRsjN ElqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697665903; x=1698270703; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HcidF9Jk1N+Ej8dbQUUvFmfE2V7LiGtPgLbzAI4Qab4=; b=fWPCZ0giKHrpqMuQqVrUoAUL9Sl16nkOM4JF6/eZLP3dqBbPtlzx8mAC57FFwPRvm8 nq4Dz8wRBghq0B/KP3RX18S5Gout1ebOeWelZLfBH8UUZzCqzXqyPsk0oFm/ShltKNBs RzbPxpAq8lGGr5fejSUjNXlPm0lb+ghSDwIWgpakk6PBOxOonJX9ZdISAOcbP15jaRuT SLvTIXQSyP4zU9izMD/FHSFnBJ2vkbqwv0AYW5rRJrErUWE4C2phZxbxslmSIAa3rGCB j22IvZuervzdxOhIouU+cgzWsjnxydeDlrdbB2NO5al+Gz09BCH7QJWmca/Hqq08US0R 6LkA== X-Gm-Message-State: AOJu0Yz6yciU/CF/ZJk0nCKuduehhI0S7TdK2vp7es3f6qzDmsmM0oDk fzyXdiapmumiP+ZkF+5lr1BipoZeeAHosRivPLc= X-Google-Smtp-Source: AGHT+IHq8gq5WNv79G0npEBQO80O/8sCgsrm6J8tqgfPizeAssLpEMOdCtvHI3xxuhvwqOFlHLNBCw== X-Received: by 2002:a05:6830:2641:b0:6c4:aa6a:c4e7 with SMTP id f1-20020a056830264100b006c4aa6ac4e7mr513901otu.10.1697665902723; Wed, 18 Oct 2023 14:51:42 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@gmx.de Subject: [PATCH 07/61] target/hppa: Truncate rotate count in trans_shrpw_sar Date: Wed, 18 Oct 2023 14:50:41 -0700 Message-Id: <20231018215135.1561375-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231018215135.1561375-1-richard.henderson@linaro.org> References: <20231018215135.1561375-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32a; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1697666030438100001 Content-Type: text/plain; charset="utf-8" When forcing rotate by i32, the shift count must be as well. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index ff559ed21d..e6ab113a1c 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -3105,8 +3105,11 @@ static bool trans_shrpw_sar(DisasContext *ctx, arg_s= hrpw_sar *a) tcg_gen_shr_reg(dest, dest, cpu_sar); } else if (a->r1 =3D=3D a->r2) { TCGv_i32 t32 =3D tcg_temp_new_i32(); + TCGv_i32 s32 =3D tcg_temp_new_i32(); + tcg_gen_trunc_reg_i32(t32, load_gpr(ctx, a->r2)); - tcg_gen_rotr_i32(t32, t32, cpu_sar); + tcg_gen_trunc_reg_i32(s32, cpu_sar); + tcg_gen_rotr_i32(t32, t32, s32); tcg_gen_extu_i32_reg(dest, t32); } else { TCGv_i64 t =3D tcg_temp_new_i64(); --=20 2.34.1