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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id w17-20020a63f511000000b005b61a024ec7sm2176380pgh.74.2023.10.18.14.51.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 14:51:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697665899; x=1698270699; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3tf30naxwG8ULfBR8Z80R+ehNXjBaz2adScdYG1B0wU=; b=NCSlLadgE/GDmykhjXg+w4Y37UXtENolz0RqrRYfRDENiraCzJVMlXRXkpvRWQ/0Xt 60LuXd03KPrCyBT7UEy0rPft5YcjVFEbiytVD0tiCP+7eNStLnZMyDl6QP5gurhALeZV CAihLL4LLTuhee+uhq41iqBrS5x9JWg6r8ffYxM6IWyTfVk3YNPfsOflyPAlrA27I37c sPMwZKnc9kjkvrWZ3mRIXGZS3dcNRAWJQnCibrhtwAZ46YzgMVjHoKfWzNiNWPg3/esB UQhEEOWJvNcVAOyv8e+XkVhUt7ffjZSD53ubG94wSdI8kTbCt9T3Ou/SD3oLW4Q9ZyJQ Lzmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697665899; x=1698270699; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3tf30naxwG8ULfBR8Z80R+ehNXjBaz2adScdYG1B0wU=; b=xTmeXCJOjqNtU/9gBe0osm3aamzRBPcHO+7RSTU/WjJqloRmnplOqKdneicRfLJX2J DFoSm6IcuIAp08WAnCPOKJsV8FiGblmXFlnaIr5bqPDvQmtJWa0xolT4uKhUiH3qvKkH v3IlRUSqwYy4LoZHg8rQTMfCXMmgLRFJplizBJxx7vlIyU3qoJ7DrL5uG+BS97nS/ab0 izRLJaOyUDoCwxofuAwhB8n4W22jKOHPAMvuKwBqpnPApZqB+I0/lxrD4yN2/l+ovrF3 tSvBds2Iz5+DcAjwv3O2M/mXTGg11qwK+Qv4vnqtUEbYAQvRgS+NzLNYY1KKsk4NZjhv 0yog== X-Gm-Message-State: AOJu0YzQr7Lau8b7XJjFFu/XqL7dbKQCImcEi1QHvsD0LNThQTdEBWo/ bE3IcmCb2BQUnlHdapbh9bt1+zV6b8ZcW1vtb6k= X-Google-Smtp-Source: AGHT+IGYJGDuOrbfnUrWbhpI0nFKFd/mvXgWybVVtdRXT3C+j1M7eM+EwGnUnYrGBiY9sqC/mQWPag== X-Received: by 2002:a05:6a00:b53:b0:6b5:ec98:4289 with SMTP id p19-20020a056a000b5300b006b5ec984289mr357415pfo.14.1697665899423; Wed, 18 Oct 2023 14:51:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@gmx.de Subject: [PATCH 03/61] target/hppa: Remove get_temp_tl Date: Wed, 18 Oct 2023 14:50:37 -0700 Message-Id: <20231018215135.1561375-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231018215135.1561375-1-richard.henderson@linaro.org> References: <20231018215135.1561375-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1697666004389100001 Content-Type: text/plain; charset="utf-8" Replace with tcg_temp_new_tl without recording into ctx. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/hppa/translate.c | 28 +++------------------------- 1 file changed, 3 insertions(+), 25 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 3065fbf625..5302381a56 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -254,9 +254,6 @@ typedef struct DisasContext { target_ureg iaoq_n; TCGv_reg iaoq_n_var; =20 - int ntempl; - TCGv_tl templ[4]; - DisasCond null_cond; TCGLabel *null_lab; =20 @@ -491,15 +488,6 @@ static void cond_free(DisasCond *cond) } } =20 -#ifndef CONFIG_USER_ONLY -static TCGv_tl get_temp_tl(DisasContext *ctx) -{ - unsigned i =3D ctx->ntempl++; - g_assert(i < ARRAY_SIZE(ctx->templ)); - return ctx->templ[i] =3D tcg_temp_new_tl(); -} -#endif - static TCGv_reg load_const(DisasContext *ctx, target_sreg v) { TCGv_reg t =3D tcg_temp_new(); @@ -1374,7 +1362,7 @@ static TCGv_i64 space_select(DisasContext *ctx, int s= p, TCGv_reg base) if (sp < 0) { sp =3D ~sp; } - spc =3D get_temp_tl(ctx); + spc =3D tcg_temp_new_tl(); load_spr(ctx, spc, sp); return spc; } @@ -1384,7 +1372,7 @@ static TCGv_i64 space_select(DisasContext *ctx, int s= p, TCGv_reg base) =20 ptr =3D tcg_temp_new_ptr(); tmp =3D tcg_temp_new(); - spc =3D get_temp_tl(ctx); + spc =3D tcg_temp_new_tl(); =20 tcg_gen_shri_reg(tmp, base, TARGET_REGISTER_BITS - 5); tcg_gen_andi_reg(tmp, tmp, 030); @@ -1420,7 +1408,7 @@ static void form_gva(DisasContext *ctx, TCGv_tl *pgva= , TCGv_reg *pofs, #ifdef CONFIG_USER_ONLY *pgva =3D (modify <=3D 0 ? ofs : base); #else - TCGv_tl addr =3D get_temp_tl(ctx); + TCGv_tl addr =3D tcg_temp_new_tl(); tcg_gen_extu_reg_tl(addr, modify <=3D 0 ? ofs : base); if (ctx->tb_flags & PSW_W) { tcg_gen_andi_tl(addr, addr, 0x3fffffffffffffffull); @@ -4080,9 +4068,6 @@ static void hppa_tr_init_disas_context(DisasContextBa= se *dcbase, CPUState *cs) /* Bound the number of instructions by those left on the page. */ bound =3D -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4; ctx->base.max_insns =3D MIN(ctx->base.max_insns, bound); - - ctx->ntempl =3D 0; - memset(ctx->templ, 0, sizeof(ctx->templ)); } =20 static void hppa_tr_tb_start(DisasContextBase *dcbase, CPUState *cs) @@ -4111,7 +4096,6 @@ static void hppa_tr_translate_insn(DisasContextBase *= dcbase, CPUState *cs) DisasContext *ctx =3D container_of(dcbase, DisasContext, base); CPUHPPAState *env =3D cpu_env(cs); DisasJumpType ret; - int i, n; =20 /* Execute one insn. */ #ifdef CONFIG_USER_ONLY @@ -4150,12 +4134,6 @@ static void hppa_tr_translate_insn(DisasContextBase = *dcbase, CPUState *cs) } } =20 - /* Forget any temporaries allocated. */ - for (i =3D 0, n =3D ctx->ntempl; i < n; ++i) { - ctx->templ[i] =3D NULL; - } - ctx->ntempl =3D 0; - /* Advance the insn queue. Note that this check also detects a priority change within the instruction queue. */ if (ret =3D=3D DISAS_NEXT && ctx->iaoq_b !=3D ctx->iaoq_f + 4) { --=20 2.34.1