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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id w17-20020a63f511000000b005b61a024ec7sm2176380pgh.74.2023.10.18.14.51.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 14:51:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697665912; x=1698270712; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KZ59Wqyg2YQUe4NJ15oFoXlcwSLtPJhdE2Dc4QmCfGA=; b=lbLJPekVhsqw9nquZCAM5lJnt5aZjDn3MSwC3xBFQsKqWGUwAupxrjhciasQqsEYPW CdB15csPcTYHwoYnUDMSM8iMRLNvzBfbg/xxNDxB1VAl7KyTnU2ut8iInnlhvY31n7Y5 W3fJB2h5zZbv6A10YfxeCGbJRRrltrrRGiL0mvadRlAYmwOihTjXOn+Wpm+tGviwb11F YVB94eQIARzYknGlEdcRYSZ3X/oaHjDqNDsThI07sONJYSkOpDBHSv4tN5tTeqtpL7SP y+JWPiy4ilbWy+7EjqSQUgeOfjyQz+mVQGgjvWZUeYDOO+WPJXwyy9lAHp8ui+Z/x+4H 1BuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697665912; x=1698270712; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KZ59Wqyg2YQUe4NJ15oFoXlcwSLtPJhdE2Dc4QmCfGA=; b=GOI5vgsG/eIaTO9YAR2d+0GrSWQni0uNn8RKJk5leZlssnguElnQwmQ8ahnKtmwkig ioFufyRsJqPdWFdWfEWIiZwYHsj0nZrRcXD3fJClsba5331UcNH/8xw7yt7coByIxwl1 BfYBQThzcq4NrYJMH3eOCL5QagH14bBNVLAs6ODDV8aP3CWLUuODKvE1QfxwgCgZD9N0 2x+ekbJK/5BMe4Aqm/HEA/1NaACM7kOeh3dTMA+3bPyXJ6yqOJR1HutnYmeILSiCSxRS zgQf5d9SmKSKSGzQHtNyLhY9WvmPIMwxp2Do47kpPDHYIFZCBcVkyIpCXFGUUT4kogSP GD6g== X-Gm-Message-State: AOJu0YyH4J60dquhHZhRBFio1GNriXCb12xiMltRW/6mRu16/LZTcg1U /daxUrS5OetGhGbKhiyG209P+lHgI7fGBq79U1U= X-Google-Smtp-Source: AGHT+IF2l2C0el29QLejV3GqPiqHM9QsOCkLQ3jn+eiKahehydo+rXlgd+X+N7jx2KKGtKu5NnOAHA== X-Received: by 2002:a05:6a21:7985:b0:171:c88a:891e with SMTP id bh5-20020a056a21798500b00171c88a891emr397623pzc.55.1697665912230; Wed, 18 Oct 2023 14:51:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@gmx.de Subject: [PATCH 19/61] hw/hppa: Translate phys addresses for the cpu Date: Wed, 18 Oct 2023 14:50:53 -0700 Message-Id: <20231018215135.1561375-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231018215135.1561375-1-richard.henderson@linaro.org> References: <20231018215135.1561375-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1697666309457100001 Content-Type: text/plain; charset="utf-8" Hack the machine to use pa2.0 physical layout when required, using the PSW.W=3D0 absolute to physical mapping. Signed-off-by: Richard Henderson --- hw/hppa/machine.c | 87 ++++++++++++++++++++++++++++------------------- 1 file changed, 52 insertions(+), 35 deletions(-) diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index 07f8ebeb6a..765f338544 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -81,7 +81,7 @@ static const MemoryRegionOps hppa_pci_ignore_ops =3D { }, }; =20 -static ISABus *hppa_isa_bus(void) +static ISABus *hppa_isa_bus(hwaddr addr) { ISABus *isa_bus; qemu_irq *isa_irqs; @@ -90,8 +90,7 @@ static ISABus *hppa_isa_bus(void) isa_region =3D g_new(MemoryRegion, 1); memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops, NULL, "isa-io", 0x800); - memory_region_add_subregion(get_system_memory(), IDE_HPA, - isa_region); + memory_region_add_subregion(get_system_memory(), addr, isa_region); =20 isa_bus =3D isa_bus_new(NULL, get_system_memory(), isa_region, &error_abort); @@ -103,7 +102,7 @@ static ISABus *hppa_isa_bus(void) return isa_bus; } =20 -static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr) +static uint64_t linux_kernel_virt_to_phys(void *opaque, uint64_t addr) { addr &=3D (0x10000000 - 1); return addr; @@ -118,13 +117,13 @@ static void fw_cfg_boot_set(void *opaque, const char = *boot_device, fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); } =20 -static FWCfgState *create_fw_cfg(MachineState *ms) +static FWCfgState *create_fw_cfg(MachineState *ms, hwaddr addr) { FWCfgState *fw_cfg; uint64_t val; const char qemu_version[] =3D QEMU_VERSION; =20 - fw_cfg =3D fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4); + fw_cfg =3D fw_cfg_init_mem(addr, addr + 4); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus); fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS); fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size); @@ -173,6 +172,16 @@ static DinoState *dino_init(MemoryRegion *addr_space) return DINO_PCI_HOST_BRIDGE(dev); } =20 +static uint64_t translate_pa10(void *dummy, uint64_t addr) +{ + return (uint32_t)addr; +} + +static uint64_t translate_pa20(void *dummy, uint64_t addr) +{ + return hppa_abs_to_phys_pa2_w0(addr); +} + static void machine_hppa_init(MachineState *machine) { const char *kernel_filename =3D machine->kernel_filename; @@ -188,20 +197,33 @@ static void machine_hppa_init(MachineState *machine) uint64_t kernel_entry =3D 0, kernel_low, kernel_high; MemoryRegion *addr_space =3D get_system_memory(); MemoryRegion *rom_region; - MemoryRegion *cpu_region; long i; unsigned int smp_cpus =3D machine->smp.cpus; SysBusDevice *s; + uint64_t (*translate)(void *, uint64_t); =20 /* Create CPUs. */ for (i =3D 0; i < smp_cpus; i++) { - char *name =3D g_strdup_printf("cpu%ld-io-eir", i); cpu[i] =3D HPPA_CPU(cpu_create(machine->cpu_type)); + } =20 - cpu_region =3D g_new(MemoryRegion, 1); + /* + * For now, treat address layout as if PSW_W is clear. + * TODO: create a proper hppa64 board model and load elf64 firmware. + */ + if (cpu[0]->is_pa20) { + translate =3D translate_pa20; + } else { + translate =3D translate_pa10; + } + + for (i =3D 0; i < smp_cpus; i++) { + char *name =3D g_strdup_printf("cpu%ld-io-eir", i); + MemoryRegion *cpu_region =3D g_new(MemoryRegion, 1); memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops, cpu[i], name, 4); - memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000, + memory_region_add_subregion(addr_space, + translate(NULL, CPU_HPA + i * 0x1000), cpu_region); g_free(name); } @@ -216,41 +238,41 @@ static void machine_hppa_init(MachineState *machine) =20 /* Init Lasi chip */ lasi_dev =3D DEVICE(lasi_init()); - memory_region_add_subregion(addr_space, LASI_HPA, + memory_region_add_subregion(addr_space, translate(NULL, LASI_HPA), sysbus_mmio_get_region( SYS_BUS_DEVICE(lasi_dev), 0)); =20 /* Init Dino (PCI host bus chip). */ dino_dev =3D DEVICE(dino_init(addr_space)); - memory_region_add_subregion(addr_space, DINO_HPA, + memory_region_add_subregion(addr_space, translate(NULL, DINO_HPA), sysbus_mmio_get_region( SYS_BUS_DEVICE(dino_dev), 0)); pci_bus =3D PCI_BUS(qdev_get_child_bus(dino_dev, "pci")); assert(pci_bus); =20 /* Create ISA bus. */ - isa_bus =3D hppa_isa_bus(); + isa_bus =3D hppa_isa_bus(translate(NULL, IDE_HPA)); assert(isa_bus); =20 /* Realtime clock, used by firmware for PDC_TOD call. */ mc146818_rtc_init(isa_bus, 2000, NULL); =20 /* Serial ports: Lasi and Dino use a 7.272727 MHz clock. */ - serial_mm_init(addr_space, LASI_UART_HPA + 0x800, 0, + serial_mm_init(addr_space, translate(NULL, LASI_UART_HPA + 0x800), 0, qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16, serial_hd(0), DEVICE_BIG_ENDIAN); =20 - serial_mm_init(addr_space, DINO_UART_HPA + 0x800, 0, + serial_mm_init(addr_space, translate(NULL, DINO_UART_HPA + 0x800), 0, qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 7272727 / 16, serial_hd(1), DEVICE_BIG_ENDIAN); =20 /* Parallel port */ - parallel_mm_init(addr_space, LASI_LPT_HPA + 0x800, 0, + parallel_mm_init(addr_space, translate(NULL, LASI_LPT_HPA + 0x800), 0, qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA), parallel_hds[0]); =20 /* fw_cfg configuration interface */ - create_fw_cfg(machine); + create_fw_cfg(machine, translate(NULL, FW_CFG_IO_BASE)); =20 /* SCSI disk setup. */ dev =3D DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a")); @@ -262,13 +284,13 @@ static void machine_hppa_init(MachineState *machine) dev =3D qdev_new("artist"); s =3D SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(s, &error_fatal); - sysbus_mmio_map(s, 0, LASI_GFX_HPA); - sysbus_mmio_map(s, 1, ARTIST_FB_ADDR); + sysbus_mmio_map(s, 0, translate(NULL, LASI_GFX_HPA)); + sysbus_mmio_map(s, 1, translate(NULL, ARTIST_FB_ADDR)); } =20 /* Network setup. */ if (enable_lasi_lan()) { - lasi_82596_init(addr_space, LASI_LAN_HPA, + lasi_82596_init(addr_space, translate(NULL, LASI_LAN_HPA), qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA)); } =20 @@ -283,10 +305,11 @@ static void machine_hppa_init(MachineState *machine) sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA)); - memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA, + memory_region_add_subregion(addr_space, translate(NULL, LASI_PS2KBD_HP= A), sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); - memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA + 0x100, + memory_region_add_subregion(addr_space, + translate(NULL, LASI_PS2KBD_HPA + 0x100), sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1)); =20 @@ -303,15 +326,10 @@ static void machine_hppa_init(MachineState *machine) exit(1); } =20 - size =3D load_elf(firmware_filename, NULL, NULL, NULL, + size =3D load_elf(firmware_filename, NULL, translate, NULL, &firmware_entry, &firmware_low, &firmware_high, NULL, true, EM_PARISC, 0, 0); =20 - /* Unfortunately, load_elf sign-extends reading elf32. */ - firmware_entry =3D (target_ureg)firmware_entry; - firmware_low =3D (target_ureg)firmware_low; - firmware_high =3D (target_ureg)firmware_high; - if (size < 0) { error_report("could not load firmware '%s'", firmware_filename); exit(1); @@ -319,7 +337,8 @@ static void machine_hppa_init(MachineState *machine) qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n", firmware_low, firmware_high, firmware_entry); - if (firmware_low < FIRMWARE_START || firmware_high >=3D FIRMWARE_END) { + if (firmware_low < translate(NULL, FIRMWARE_START) || + firmware_high >=3D translate(NULL, FIRMWARE_END)) { error_report("Firmware overlaps with memory or IO space"); exit(1); } @@ -328,18 +347,16 @@ static void machine_hppa_init(MachineState *machine) rom_region =3D g_new(MemoryRegion, 1); memory_region_init_ram(rom_region, NULL, "firmware", (FIRMWARE_END - FIRMWARE_START), &error_fatal); - memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region); + memory_region_add_subregion(addr_space, + translate(NULL, FIRMWARE_START), rom_regio= n); =20 /* Load kernel */ if (kernel_filename) { - size =3D load_elf(kernel_filename, NULL, &cpu_hppa_to_phys, + size =3D load_elf(kernel_filename, NULL, linux_kernel_virt_to_phys, NULL, &kernel_entry, &kernel_low, &kernel_high, NU= LL, true, EM_PARISC, 0, 0); =20 - /* Unfortunately, load_elf sign-extends reading elf32. */ - kernel_entry =3D (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry= ); - kernel_low =3D (target_ureg)kernel_low; - kernel_high =3D (target_ureg)kernel_high; + kernel_entry =3D linux_kernel_virt_to_phys(NULL, kernel_entry); =20 if (size < 0) { error_report("could not load kernel '%s'", kernel_filename); --=20 2.34.1