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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id k125-20020a632483000000b005742092c211sm2103096pgk.64.2023.10.18.13.46.08 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 13:46:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697661969; x=1698266769; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=J3OQEiXHHMGRWFPueeKCKBwMI85PiFBLtHqDQ0TceE8=; b=Uu7eLMxJDU35zxqCj6Tyq2QdxeKnWG+MTOU+6Ghf8hJHyvFBi+T5u7fqrDu12gKzGw JPo/JadioTtPZjo+KlA0weziGtkkkaRfm+ZAIXWM/sG1DU9Q5MphSPK8OdFB35WrG7Sb LKJhYNhJe0cWLolbIlQQVW/snLTwPTgVm8RMTydRs0k5JvmhOIFpDwChhMNRMRsi9ulM CZxCAmtilJFrEeRLOMYFcYwdy6/j4zcuKrOoe7sQO9UrnFVt26Uc8LHsqmHgNnB+5Va1 fM/taSOuI6CWqdErtWjSU0SJIyiuhtPHQHgzsV+qyEKPraoPuDw1C6oP+pKa/LTdCEEs DQDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697661969; x=1698266769; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=J3OQEiXHHMGRWFPueeKCKBwMI85PiFBLtHqDQ0TceE8=; b=PrVdrTh6zCkUpB7ZBaTcv2iMCMEBDFCTFzwN72UH5n55a4VnaS0hGho76N0OpldOFM vkEAiSXBnLkKEu8k3SIg2MwD9YQsfvInvyFq+fzKeWCI+49JfNfyn5f/pEU59Ynu6/fA YMkIwkSsFYRGx8O1x+V4v4Pb3Jna4K7xPOeJwi5xxV0dOb7iIZuMYKaMnS46+6WMtbNU EpYwzFXPGx6TexDAZSVnH0IShXPrsSs9ey3FnvOBeViicDh8z27/HOIR7cinUTLFrk+5 8ZkevwcLNuc7rpjIeg6TJIY5isr6TpEWAMdX/iGHYkIA3EWGja9zEpNyLNa5+djBUzBn sHPA== X-Gm-Message-State: AOJu0YwmkvzbfXmDMNgKP3CSIf+F+H3HBVZkLGF30cMX57kbZwdeu2In BrvTQgO7co5FTAryo48LGiKA3c2TAUld2mX0UOQ= X-Google-Smtp-Source: AGHT+IEj+5RUN3sn2fbTUzKxhNg2XoCiNFcLMYsuOQlUbngno6B5xRzBJmDzhXjqfNN8Ftw4HxAdHQ== X-Received: by 2002:a05:6a20:8e0a:b0:14e:2208:d62f with SMTP id y10-20020a056a208e0a00b0014e2208d62fmr575107pzj.22.1697661969038; Wed, 18 Oct 2023 13:46:09 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 1/2] tcg: Improve expansion of deposit of constant Date: Wed, 18 Oct 2023 13:46:05 -0700 Message-Id: <20231018204606.1545518-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231018204606.1545518-1-richard.henderson@linaro.org> References: <20231018204606.1545518-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1697662018315100002 Content-Type: text/plain; charset="utf-8" The extract2 expansion is too difficult for the optimizer to simplify. If we have an immediate input, use and+or instead, skipping the and if the field becomes all 1's. Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 393dbcd01c..2ef4b866e2 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -602,6 +602,7 @@ void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, T= CGv_i32 arg2, { uint32_t mask; TCGv_i32 t1; + TCGTemp *ts; =20 tcg_debug_assert(ofs < 32); tcg_debug_assert(len > 0); @@ -617,6 +618,19 @@ void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, = TCGv_i32 arg2, return; } =20 + /* Deposit of a constant into a value. */ + ts =3D tcgv_i32_temp(arg2); + if (ts->kind =3D=3D TEMP_CONST) { + uint32_t mask0 =3D deposit32(-1, ofs, len, 0); + uint32_t maski =3D deposit32(0, ofs, len, ts->val); + + if (mask0 !=3D ~maski) { + tcg_gen_andi_i32(ret, arg1, mask0); + } + tcg_gen_ori_i32(ret, ret, maski); + return; + } + t1 =3D tcg_temp_ebb_new_i32(); =20 if (TCG_TARGET_HAS_extract2_i32) { @@ -2217,6 +2231,7 @@ void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1,= TCGv_i64 arg2, { uint64_t mask; TCGv_i64 t1; + TCGTemp *ts; =20 tcg_debug_assert(ofs < 64); tcg_debug_assert(len > 0); @@ -2232,6 +2247,19 @@ void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1= , TCGv_i64 arg2, return; } =20 + /* Deposit of a constant into a value. */ + ts =3D tcgv_i64_temp(arg2); + if (ts->kind =3D=3D TEMP_CONST) { + uint64_t mask0 =3D deposit64(-1, ofs, len, 0); + uint64_t maski =3D deposit64(0, ofs, len, ts->val); + + if (mask0 !=3D ~maski) { + tcg_gen_andi_i64(ret, arg1, mask0); + } + tcg_gen_ori_i64(ret, ret, maski); + return; + } + if (TCG_TARGET_REG_BITS =3D=3D 32) { if (ofs >=3D 32) { tcg_gen_deposit_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), --=20 2.34.1