From nobody Wed Nov 27 17:41:44 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1697662017; cv=none; d=zohomail.com; s=zohoarc; b=bP6lzT00TKq33cmoBnOIdUKDWD8JLyNvvVhk18leYnWNWZagS0IHu8k9OKmgCr5+FhHw82kSpwc7V75SPL/CRSLe8UCEwBTcZlfBm0kn7vMPDKENkxV4LtSmLhkF2intlxAG3/Dd4ZCiwRiBlDemhWew4jpoYbUQE0KfhftxmyE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1697662017; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=J3OQEiXHHMGRWFPueeKCKBwMI85PiFBLtHqDQ0TceE8=; b=fM+o5L+qITLFWRDyAUisnCeZlKFi71j4yjSQ1PKWGxFZKE89jrXh7I7J0j/oFTaU4gbVZZRCMUbKDO07H4ajYHnlF0cPtSWX+/A3bsAcEfcZs5WHW7MATqUahEK/n7CpBz7abR5a7uxD9nrtyaLx1FUPZlkXl5TUQSBo8j1T5q0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1697662017871232.78109507037038; Wed, 18 Oct 2023 13:46:57 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qtDQl-0000UY-5Z; Wed, 18 Oct 2023 16:46:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qtDQi-0000Tq-U0 for qemu-devel@nongnu.org; Wed, 18 Oct 2023 16:46:12 -0400 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qtDQg-0002Wj-RE for qemu-devel@nongnu.org; Wed, 18 Oct 2023 16:46:12 -0400 Received: by mail-pf1-x430.google.com with SMTP id d2e1a72fcca58-6b44befac59so85047b3a.0 for ; Wed, 18 Oct 2023 13:46:10 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id k125-20020a632483000000b005742092c211sm2103096pgk.64.2023.10.18.13.46.08 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 13:46:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697661969; x=1698266769; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=J3OQEiXHHMGRWFPueeKCKBwMI85PiFBLtHqDQ0TceE8=; b=Uu7eLMxJDU35zxqCj6Tyq2QdxeKnWG+MTOU+6Ghf8hJHyvFBi+T5u7fqrDu12gKzGw JPo/JadioTtPZjo+KlA0weziGtkkkaRfm+ZAIXWM/sG1DU9Q5MphSPK8OdFB35WrG7Sb LKJhYNhJe0cWLolbIlQQVW/snLTwPTgVm8RMTydRs0k5JvmhOIFpDwChhMNRMRsi9ulM CZxCAmtilJFrEeRLOMYFcYwdy6/j4zcuKrOoe7sQO9UrnFVt26Uc8LHsqmHgNnB+5Va1 fM/taSOuI6CWqdErtWjSU0SJIyiuhtPHQHgzsV+qyEKPraoPuDw1C6oP+pKa/LTdCEEs DQDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697661969; x=1698266769; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=J3OQEiXHHMGRWFPueeKCKBwMI85PiFBLtHqDQ0TceE8=; b=PrVdrTh6zCkUpB7ZBaTcv2iMCMEBDFCTFzwN72UH5n55a4VnaS0hGho76N0OpldOFM vkEAiSXBnLkKEu8k3SIg2MwD9YQsfvInvyFq+fzKeWCI+49JfNfyn5f/pEU59Ynu6/fA YMkIwkSsFYRGx8O1x+V4v4Pb3Jna4K7xPOeJwi5xxV0dOb7iIZuMYKaMnS46+6WMtbNU EpYwzFXPGx6TexDAZSVnH0IShXPrsSs9ey3FnvOBeViicDh8z27/HOIR7cinUTLFrk+5 8ZkevwcLNuc7rpjIeg6TJIY5isr6TpEWAMdX/iGHYkIA3EWGja9zEpNyLNa5+djBUzBn sHPA== X-Gm-Message-State: AOJu0YwmkvzbfXmDMNgKP3CSIf+F+H3HBVZkLGF30cMX57kbZwdeu2In BrvTQgO7co5FTAryo48LGiKA3c2TAUld2mX0UOQ= X-Google-Smtp-Source: AGHT+IEj+5RUN3sn2fbTUzKxhNg2XoCiNFcLMYsuOQlUbngno6B5xRzBJmDzhXjqfNN8Ftw4HxAdHQ== X-Received: by 2002:a05:6a20:8e0a:b0:14e:2208:d62f with SMTP id y10-20020a056a208e0a00b0014e2208d62fmr575107pzj.22.1697661969038; Wed, 18 Oct 2023 13:46:09 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 1/2] tcg: Improve expansion of deposit of constant Date: Wed, 18 Oct 2023 13:46:05 -0700 Message-Id: <20231018204606.1545518-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231018204606.1545518-1-richard.henderson@linaro.org> References: <20231018204606.1545518-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1697662018315100002 Content-Type: text/plain; charset="utf-8" The extract2 expansion is too difficult for the optimizer to simplify. If we have an immediate input, use and+or instead, skipping the and if the field becomes all 1's. Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 393dbcd01c..2ef4b866e2 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -602,6 +602,7 @@ void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, T= CGv_i32 arg2, { uint32_t mask; TCGv_i32 t1; + TCGTemp *ts; =20 tcg_debug_assert(ofs < 32); tcg_debug_assert(len > 0); @@ -617,6 +618,19 @@ void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, = TCGv_i32 arg2, return; } =20 + /* Deposit of a constant into a value. */ + ts =3D tcgv_i32_temp(arg2); + if (ts->kind =3D=3D TEMP_CONST) { + uint32_t mask0 =3D deposit32(-1, ofs, len, 0); + uint32_t maski =3D deposit32(0, ofs, len, ts->val); + + if (mask0 !=3D ~maski) { + tcg_gen_andi_i32(ret, arg1, mask0); + } + tcg_gen_ori_i32(ret, ret, maski); + return; + } + t1 =3D tcg_temp_ebb_new_i32(); =20 if (TCG_TARGET_HAS_extract2_i32) { @@ -2217,6 +2231,7 @@ void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1,= TCGv_i64 arg2, { uint64_t mask; TCGv_i64 t1; + TCGTemp *ts; =20 tcg_debug_assert(ofs < 64); tcg_debug_assert(len > 0); @@ -2232,6 +2247,19 @@ void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1= , TCGv_i64 arg2, return; } =20 + /* Deposit of a constant into a value. */ + ts =3D tcgv_i64_temp(arg2); + if (ts->kind =3D=3D TEMP_CONST) { + uint64_t mask0 =3D deposit64(-1, ofs, len, 0); + uint64_t maski =3D deposit64(0, ofs, len, ts->val); + + if (mask0 !=3D ~maski) { + tcg_gen_andi_i64(ret, arg1, mask0); + } + tcg_gen_ori_i64(ret, ret, maski); + return; + } + if (TCG_TARGET_REG_BITS =3D=3D 32) { if (ofs >=3D 32) { tcg_gen_deposit_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), --=20 2.34.1 From nobody Wed Nov 27 17:41:44 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1697662017; cv=none; d=zohomail.com; s=zohoarc; b=dPfpGnA6mOd4QXCiM6HEiVf0GCtor22dOvCNU1pNxv5d9Pofh1DYMqGyOe6HmDqXmySopRUU2Q+CtbazN4ZrTwvdKUQ0avvI81kTGs6hsAIj4k0XQ8OOE/h7nFkTlJn0hi9STVOE6I9tha2dK78lc2a1ot/VO+K5VAGTLQlP1c4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1697662017; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=2zsMSRhlbZwVzQVen6DKnQDDskBCrZAwA6YeAeDVn/c=; b=aCBm3R9i3/Ib3u8HuZ5mml/CAjLg85ClPqrne/I6XTiwNZean211d7NHWaSJVDpvlXXmGbrd5FFALA3q4iDaIIuR/TvrPS7Tv1tFltcyvBbH18M1mbzlbaW5XJqjWeD6OmYMODHEl9wj7g3gFrF2TRka11Q2nUHV8iGe6Ebon/A= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1697662017764952.5399205726922; Wed, 18 Oct 2023 13:46:57 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qtDQl-0000UX-4s; Wed, 18 Oct 2023 16:46:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qtDQk-0000U6-5l for qemu-devel@nongnu.org; Wed, 18 Oct 2023 16:46:14 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qtDQh-0002Wo-EK for qemu-devel@nongnu.org; Wed, 18 Oct 2023 16:46:13 -0400 Received: by mail-pj1-x1031.google.com with SMTP id 98e67ed59e1d1-27d104fa285so5941304a91.2 for ; Wed, 18 Oct 2023 13:46:11 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id k125-20020a632483000000b005742092c211sm2103096pgk.64.2023.10.18.13.46.09 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 13:46:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697661970; x=1698266770; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=2zsMSRhlbZwVzQVen6DKnQDDskBCrZAwA6YeAeDVn/c=; b=ErZWRhpUKGdLedMS6zhvV73KG2HzJ4PrAUoON6/LdrWdko8aVLWbEuIywNIHpX0Oie Ew8HFcSZqVAjsmLHtDYGxoFPpQg9FQXcpdRizy+yvxa2z4cVI10b5TZYwab9w+jJLcq5 0YnsrLwi5CrS1iqJCKTHcbYsbrQg918Wj1hcyb2NOCKQhaHSk9F4jRnjPMBhzOXXQCLf jAvOyZ0dFJIGoQRfyDvwGZMTngSiohkY0tcLuc5OjbNaTTuddJayDoqCejZK0c8epCYT l/emkTkz3we0uiETTDDLGJkWyDKx1pJ9M/CRWzrVvuZ+MfMT1s+iCrzlqwmzbQDqIlTk VfzA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697661970; x=1698266770; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2zsMSRhlbZwVzQVen6DKnQDDskBCrZAwA6YeAeDVn/c=; b=OyrlENpSyX3jxouYVIwPQnPTEonxOdc3P/2SZwNTnkUPDAInwCQQBGmdD1AHG+NwkR 8J5jjc9jh7nTflfVdYLcxHhDRn+Jx5Ol2u8Njw7qoLFJ4kHJdsCNA4bjb1aRgs9yhdmT gAOQSQQLNMkxPqVNaqmPA1DR2X/g3Q8sopd+PaqRbV+1UFR2YZkrDMCTCMs1H+HT9iVI ySZlkBdCwqFM5z93yoTTXEfcP7Cejpk8cn9p2nv0e0Qr2+hVQ5TkdASq8WsBVn7UbHhU arhZotLUc8Ma2yhLsDieDWZFajrFRWyQze+UHo8ZHFuE/sP70yBsM7h8WdFebBEzRSN9 Z6UA== X-Gm-Message-State: AOJu0Ywy+mIqLxAFd9u4ZB/wkioJu+OgwhC9eeLvLiUaKtridqosNTja +m0+VPmZa+EKqBiampss3RUo2XR9Q/mX26SPU1I= X-Google-Smtp-Source: AGHT+IG7+IP+3LoTmY9H8LVRhuUKiW7acXWuuGZ9piKBr61hpqnBb76ZChGlGMRwWojBgxxZmdXo8g== X-Received: by 2002:a17:90b:892:b0:27d:2054:9641 with SMTP id bj18-20020a17090b089200b0027d20549641mr273819pjb.36.1697661969860; Wed, 18 Oct 2023 13:46:09 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 2/2] tcg: Improve expansion of deposit into a constant Date: Wed, 18 Oct 2023 13:46:06 -0700 Message-Id: <20231018204606.1545518-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231018204606.1545518-1-richard.henderson@linaro.org> References: <20231018204606.1545518-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1697662018297100001 Content-Type: text/plain; charset="utf-8" Generalize tcg_gen_deposit_z_* from 0 to any constant. Use this to automatically simplify tcg_gen_deposit_*. Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 295 ++++++++++++++++++++++++++++++--------------------- 1 file changed, 174 insertions(+), 121 deletions(-) diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 2ef4b866e2..049b684ccc 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -597,6 +597,70 @@ void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, in= t32_t arg2) } } =20 +static void tcg_gen_deposit_i_i32(TCGv_i32 ret, uint32_t i, TCGv_i32 arg, + unsigned int ofs, unsigned int len) +{ + i =3D deposit32(i, ofs, len, 0); + + if (ofs + len =3D=3D 32) { + tcg_gen_shli_i32(ret, arg, ofs); + goto finish; + } + if (ofs =3D=3D 0) { + tcg_gen_andi_i32(ret, arg, (1u << len) - 1); + goto finish; + } + if (TCG_TARGET_HAS_deposit_i32 + && TCG_TARGET_deposit_i32_valid(ofs, len)) { + tcg_gen_op5ii_i32(INDEX_op_deposit_i32, ret, + tcg_constant_i32(i), arg, ofs, len); + return; + } + + /* + * To help two-operand hosts we prefer to zero-extend first, + * which allows ARG to stay live. + */ + switch (len) { + case 16: + if (TCG_TARGET_HAS_ext16u_i32) { + tcg_gen_ext16u_i32(ret, arg); + tcg_gen_shli_i32(ret, ret, ofs); + goto finish; + } + break; + case 8: + if (TCG_TARGET_HAS_ext8u_i32) { + tcg_gen_ext8u_i32(ret, arg); + tcg_gen_shli_i32(ret, ret, ofs); + goto finish; + } + break; + } + /* Otherwise prefer zero-extension over AND for code size. */ + switch (ofs + len) { + case 16: + if (TCG_TARGET_HAS_ext16u_i32) { + tcg_gen_shli_i32(ret, arg, ofs); + tcg_gen_ext16u_i32(ret, ret); + goto finish; + } + break; + case 8: + if (TCG_TARGET_HAS_ext8u_i32) { + tcg_gen_shli_i32(ret, arg, ofs); + tcg_gen_ext8u_i32(ret, ret); + goto finish; + } + break; + } + tcg_gen_andi_i32(ret, arg, (1u << len) - 1); + tcg_gen_shli_i32(ret, ret, ofs); + + finish: + tcg_gen_ori_i32(ret, ret, i); +} + void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2, unsigned int ofs, unsigned int len) { @@ -613,6 +677,14 @@ void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, = TCGv_i32 arg2, tcg_gen_mov_i32(ret, arg2); return; } + + /* Deposit of a value into a constant. */ + ts =3D tcgv_i32_temp(arg1); + if (ts->kind =3D=3D TEMP_CONST) { + tcg_gen_deposit_i_i32(ret, ts->val, arg2, ofs, len); + return; + } + if (TCG_TARGET_HAS_deposit_i32 && TCG_TARGET_deposit_i32_valid(ofs, le= n)) { tcg_gen_op5ii_i32(INDEX_op_deposit_i32, ret, arg1, arg2, ofs, len); return; @@ -667,53 +739,7 @@ void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg, tcg_debug_assert(len <=3D 32); tcg_debug_assert(ofs + len <=3D 32); =20 - if (ofs + len =3D=3D 32) { - tcg_gen_shli_i32(ret, arg, ofs); - } else if (ofs =3D=3D 0) { - tcg_gen_andi_i32(ret, arg, (1u << len) - 1); - } else if (TCG_TARGET_HAS_deposit_i32 - && TCG_TARGET_deposit_i32_valid(ofs, len)) { - TCGv_i32 zero =3D tcg_constant_i32(0); - tcg_gen_op5ii_i32(INDEX_op_deposit_i32, ret, zero, arg, ofs, len); - } else { - /* To help two-operand hosts we prefer to zero-extend first, - which allows ARG to stay live. */ - switch (len) { - case 16: - if (TCG_TARGET_HAS_ext16u_i32) { - tcg_gen_ext16u_i32(ret, arg); - tcg_gen_shli_i32(ret, ret, ofs); - return; - } - break; - case 8: - if (TCG_TARGET_HAS_ext8u_i32) { - tcg_gen_ext8u_i32(ret, arg); - tcg_gen_shli_i32(ret, ret, ofs); - return; - } - break; - } - /* Otherwise prefer zero-extension over AND for code size. */ - switch (ofs + len) { - case 16: - if (TCG_TARGET_HAS_ext16u_i32) { - tcg_gen_shli_i32(ret, arg, ofs); - tcg_gen_ext16u_i32(ret, ret); - return; - } - break; - case 8: - if (TCG_TARGET_HAS_ext8u_i32) { - tcg_gen_shli_i32(ret, arg, ofs); - tcg_gen_ext8u_i32(ret, ret); - return; - } - break; - } - tcg_gen_andi_i32(ret, arg, (1u << len) - 1); - tcg_gen_shli_i32(ret, ret, ofs); - } + tcg_gen_deposit_i_i32(ret, 0, arg, ofs, len); } =20 void tcg_gen_extract_i32(TCGv_i32 ret, TCGv_i32 arg, @@ -2226,6 +2252,98 @@ void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, = int64_t arg2) } } =20 +static void tcg_gen_deposit_i_i64(TCGv_i64 ret, uint64_t i, TCGv_i64 arg, + unsigned int ofs, unsigned int len) +{ + i =3D deposit64(i, ofs, len, 0); + + if (ofs + len =3D=3D 64) { + tcg_gen_shli_i64(ret, arg, ofs); + goto finish; + } + if (ofs =3D=3D 0) { + tcg_gen_andi_i64(ret, arg, (1ull << len) - 1); + goto finish; + } + if (TCG_TARGET_HAS_deposit_i64 + && TCG_TARGET_deposit_i64_valid(ofs, len)) { + tcg_gen_op5ii_i64(INDEX_op_deposit_i64, ret, + tcg_constant_i64(i), arg, ofs, len); + return; + } + + if (TCG_TARGET_REG_BITS =3D=3D 32) { + if (ofs >=3D 32) { + tcg_gen_deposit_i_i32(TCGV_HIGH(ret), i >> 32, + TCGV_LOW(arg), ofs - 32, len); + tcg_gen_movi_i32(TCGV_LOW(ret), i); + return; + } + if (ofs + len <=3D 32) { + tcg_gen_deposit_i_i32(TCGV_LOW(ret), i, TCGV_LOW(arg), ofs, le= n); + tcg_gen_movi_i32(TCGV_HIGH(ret), i >> 32); + return; + } + } + + /* + * To help two-operand hosts we prefer to zero-extend first, + * which allows ARG to stay live. + */ + switch (len) { + case 32: + if (TCG_TARGET_HAS_ext32u_i64) { + tcg_gen_ext32u_i64(ret, arg); + tcg_gen_shli_i64(ret, ret, ofs); + goto finish; + } + break; + case 16: + if (TCG_TARGET_HAS_ext16u_i64) { + tcg_gen_ext16u_i64(ret, arg); + tcg_gen_shli_i64(ret, ret, ofs); + goto finish; + } + break; + case 8: + if (TCG_TARGET_HAS_ext8u_i64) { + tcg_gen_ext8u_i64(ret, arg); + tcg_gen_shli_i64(ret, ret, ofs); + goto finish; + } + break; + } + /* Otherwise prefer zero-extension over AND for code size. */ + switch (ofs + len) { + case 32: + if (TCG_TARGET_HAS_ext32u_i64) { + tcg_gen_shli_i64(ret, arg, ofs); + tcg_gen_ext32u_i64(ret, ret); + goto finish; + } + break; + case 16: + if (TCG_TARGET_HAS_ext16u_i64) { + tcg_gen_shli_i64(ret, arg, ofs); + tcg_gen_ext16u_i64(ret, ret); + goto finish; + } + break; + case 8: + if (TCG_TARGET_HAS_ext8u_i64) { + tcg_gen_shli_i64(ret, arg, ofs); + tcg_gen_ext8u_i64(ret, ret); + goto finish; + } + break; + } + tcg_gen_andi_i64(ret, arg, (1ull << len) - 1); + tcg_gen_shli_i64(ret, ret, ofs); + + finish: + tcg_gen_ori_i64(ret, ret, i); +} + void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2, unsigned int ofs, unsigned int len) { @@ -2242,6 +2360,14 @@ void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1= , TCGv_i64 arg2, tcg_gen_mov_i64(ret, arg2); return; } + + /* Deposit of a value into a constant. */ + ts =3D tcgv_i64_temp(arg1); + if (ts->kind =3D=3D TEMP_CONST) { + tcg_gen_deposit_i_i64(ret, ts->val, arg2, ofs, len); + return; + } + if (TCG_TARGET_HAS_deposit_i64 && TCG_TARGET_deposit_i64_valid(ofs, le= n)) { tcg_gen_op5ii_i64(INDEX_op_deposit_i64, ret, arg1, arg2, ofs, len); return; @@ -2311,80 +2437,7 @@ void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 ar= g, tcg_debug_assert(len <=3D 64); tcg_debug_assert(ofs + len <=3D 64); =20 - if (ofs + len =3D=3D 64) { - tcg_gen_shli_i64(ret, arg, ofs); - } else if (ofs =3D=3D 0) { - tcg_gen_andi_i64(ret, arg, (1ull << len) - 1); - } else if (TCG_TARGET_HAS_deposit_i64 - && TCG_TARGET_deposit_i64_valid(ofs, len)) { - TCGv_i64 zero =3D tcg_constant_i64(0); - tcg_gen_op5ii_i64(INDEX_op_deposit_i64, ret, zero, arg, ofs, len); - } else { - if (TCG_TARGET_REG_BITS =3D=3D 32) { - if (ofs >=3D 32) { - tcg_gen_deposit_z_i32(TCGV_HIGH(ret), TCGV_LOW(arg), - ofs - 32, len); - tcg_gen_movi_i32(TCGV_LOW(ret), 0); - return; - } - if (ofs + len <=3D 32) { - tcg_gen_deposit_z_i32(TCGV_LOW(ret), TCGV_LOW(arg), ofs, l= en); - tcg_gen_movi_i32(TCGV_HIGH(ret), 0); - return; - } - } - /* To help two-operand hosts we prefer to zero-extend first, - which allows ARG to stay live. */ - switch (len) { - case 32: - if (TCG_TARGET_HAS_ext32u_i64) { - tcg_gen_ext32u_i64(ret, arg); - tcg_gen_shli_i64(ret, ret, ofs); - return; - } - break; - case 16: - if (TCG_TARGET_HAS_ext16u_i64) { - tcg_gen_ext16u_i64(ret, arg); - tcg_gen_shli_i64(ret, ret, ofs); - return; - } - break; - case 8: - if (TCG_TARGET_HAS_ext8u_i64) { - tcg_gen_ext8u_i64(ret, arg); - tcg_gen_shli_i64(ret, ret, ofs); - return; - } - break; - } - /* Otherwise prefer zero-extension over AND for code size. */ - switch (ofs + len) { - case 32: - if (TCG_TARGET_HAS_ext32u_i64) { - tcg_gen_shli_i64(ret, arg, ofs); - tcg_gen_ext32u_i64(ret, ret); - return; - } - break; - case 16: - if (TCG_TARGET_HAS_ext16u_i64) { - tcg_gen_shli_i64(ret, arg, ofs); - tcg_gen_ext16u_i64(ret, ret); - return; - } - break; - case 8: - if (TCG_TARGET_HAS_ext8u_i64) { - tcg_gen_shli_i64(ret, arg, ofs); - tcg_gen_ext8u_i64(ret, ret); - return; - } - break; - } - tcg_gen_andi_i64(ret, arg, (1ull << len) - 1); - tcg_gen_shli_i64(ret, ret, ofs); - } + tcg_gen_deposit_i_i64(ret, 0, arg, ofs, len); } =20 void tcg_gen_extract_i64(TCGv_i64 ret, TCGv_i64 arg, --=20 2.34.1