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Wed, 18 Oct 2023 09:37:35 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFsVsvwM8AftE624x8/7EsDbNLyTKsH42sL7YhGWsGCoBbDPPXgZ/gHL9kBMXlGoCd4RusZQA== X-Received: by 2002:a17:906:ee86:b0:9be:cdca:dae9 with SMTP id wt6-20020a170906ee8600b009becdcadae9mr4588595ejb.36.1697647055496; Wed, 18 Oct 2023 09:37:35 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 03/17] kvm: require KVM_CAP_SIGNAL_MSI Date: Wed, 18 Oct 2023 18:37:14 +0200 Message-ID: <20231018163728.363879-4-pbonzini@redhat.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231018163728.363879-1-pbonzini@redhat.com> References: <20231018163728.363879-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1697647120445100023 Content-Type: text/plain; charset="utf-8" This was introduced in KVM in Linux 3.5, we can require it unconditionally in kvm_irqchip_send_msi(). However, not all architectures have to implement it so check it only in x86, the only architecture that ever had MSI injecti= on but not KVM_CAP_SIGNAL_MSI. ARM uses it to detect the presence of the ITS emulation in the kernel, introduced in Linux 4.8. Assume that it's there and possibly fail when realizing the arm-its-kvm device. Signed-off-by: Paolo Bonzini --- accel/kvm/kvm-all.c | 102 +++------------------------------ accel/stubs/kvm-stub.c | 1 - hw/intc/arm_gicv3_its_common.c | 3 +- include/sysemu/kvm.h | 9 --- include/sysemu/kvm_int.h | 1 - target/i386/kvm/kvm.c | 1 + 6 files changed, 9 insertions(+), 108 deletions(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 8eee5042252..0c7b0569da4 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -99,7 +99,6 @@ bool kvm_gsi_direct_mapping; bool kvm_allowed; bool kvm_readonly_mem_allowed; bool kvm_vm_attributes_allowed; -bool kvm_direct_msi_allowed; bool kvm_ioeventfd_any_length_allowed; bool kvm_msi_use_devid; bool kvm_has_guest_debug; @@ -1848,7 +1847,7 @@ static void clear_gsi(KVMState *s, unsigned int gsi) =20 void kvm_init_irq_routing(KVMState *s) { - int gsi_count, i; + int gsi_count; =20 gsi_count =3D kvm_check_extension(s, KVM_CAP_IRQ_ROUTING) - 1; if (gsi_count > 0) { @@ -1860,12 +1859,6 @@ void kvm_init_irq_routing(KVMState *s) s->irq_routes =3D g_malloc0(sizeof(*s->irq_routes)); s->nr_allocated_irq_routes =3D 0; =20 - if (!kvm_direct_msi_allowed) { - for (i =3D 0; i < KVM_MSI_HASHTAB_SIZE; i++) { - QTAILQ_INIT(&s->msi_hashtab[i]); - } - } - kvm_arch_init_irq_routing(s); } =20 @@ -1985,41 +1978,10 @@ void kvm_irqchip_change_notify(void) notifier_list_notify(&kvm_irqchip_change_notifiers, NULL); } =20 -static unsigned int kvm_hash_msi(uint32_t data) -{ - /* This is optimized for IA32 MSI layout. However, no other arch shall - * repeat the mistake of not providing a direct MSI injection API. */ - return data & 0xff; -} - -static void kvm_flush_dynamic_msi_routes(KVMState *s) -{ - KVMMSIRoute *route, *next; - unsigned int hash; - - for (hash =3D 0; hash < KVM_MSI_HASHTAB_SIZE; hash++) { - QTAILQ_FOREACH_SAFE(route, &s->msi_hashtab[hash], entry, next) { - kvm_irqchip_release_virq(s, route->kroute.gsi); - QTAILQ_REMOVE(&s->msi_hashtab[hash], route, entry); - g_free(route); - } - } -} - static int kvm_irqchip_get_virq(KVMState *s) { int next_virq; =20 - /* - * PIC and IOAPIC share the first 16 GSI numbers, thus the available - * GSI numbers are more than the number of IRQ route. Allocating a GSI - * number can succeed even though a new route entry cannot be added. - * When this happens, flush dynamic MSI entries to free IRQ route entr= ies. - */ - if (!kvm_direct_msi_allowed && s->irq_routes->nr =3D=3D s->gsi_count) { - kvm_flush_dynamic_msi_routes(s); - } - /* Return the lowest unused GSI in the bitmap */ next_virq =3D find_first_zero_bit(s->used_gsi_bitmap, s->gsi_count); if (next_virq >=3D s->gsi_count) { @@ -2029,63 +1991,17 @@ static int kvm_irqchip_get_virq(KVMState *s) } } =20 -static KVMMSIRoute *kvm_lookup_msi_route(KVMState *s, MSIMessage msg) -{ - unsigned int hash =3D kvm_hash_msi(msg.data); - KVMMSIRoute *route; - - QTAILQ_FOREACH(route, &s->msi_hashtab[hash], entry) { - if (route->kroute.u.msi.address_lo =3D=3D (uint32_t)msg.address && - route->kroute.u.msi.address_hi =3D=3D (msg.address >> 32) && - route->kroute.u.msi.data =3D=3D le32_to_cpu(msg.data)) { - return route; - } - } - return NULL; -} - int kvm_irqchip_send_msi(KVMState *s, MSIMessage msg) { struct kvm_msi msi; - KVMMSIRoute *route; =20 - if (kvm_direct_msi_allowed) { - msi.address_lo =3D (uint32_t)msg.address; - msi.address_hi =3D msg.address >> 32; - msi.data =3D le32_to_cpu(msg.data); - msi.flags =3D 0; - memset(msi.pad, 0, sizeof(msi.pad)); + msi.address_lo =3D (uint32_t)msg.address; + msi.address_hi =3D msg.address >> 32; + msi.data =3D le32_to_cpu(msg.data); + msi.flags =3D 0; + memset(msi.pad, 0, sizeof(msi.pad)); =20 - return kvm_vm_ioctl(s, KVM_SIGNAL_MSI, &msi); - } - - route =3D kvm_lookup_msi_route(s, msg); - if (!route) { - int virq; - - virq =3D kvm_irqchip_get_virq(s); - if (virq < 0) { - return virq; - } - - route =3D g_new0(KVMMSIRoute, 1); - route->kroute.gsi =3D virq; - route->kroute.type =3D KVM_IRQ_ROUTING_MSI; - route->kroute.flags =3D 0; - route->kroute.u.msi.address_lo =3D (uint32_t)msg.address; - route->kroute.u.msi.address_hi =3D msg.address >> 32; - route->kroute.u.msi.data =3D le32_to_cpu(msg.data); - - kvm_add_routing_entry(s, &route->kroute); - kvm_irqchip_commit_routes(s); - - QTAILQ_INSERT_TAIL(&s->msi_hashtab[kvm_hash_msi(msg.data)], route, - entry); - } - - assert(route->kroute.type =3D=3D KVM_IRQ_ROUTING_MSI); - - return kvm_set_irq(s, route->kroute.gsi, 1); + return kvm_vm_ioctl(s, KVM_SIGNAL_MSI, &msi); } =20 int kvm_irqchip_add_msi_route(KVMRouteChange *c, int vector, PCIDevice *de= v) @@ -2660,10 +2576,6 @@ static int kvm_init(MachineState *ms) =20 s->max_nested_state_len =3D kvm_check_extension(s, KVM_CAP_NESTED_STAT= E); =20 -#ifdef KVM_CAP_IRQ_ROUTING - kvm_direct_msi_allowed =3D (kvm_check_extension(s, KVM_CAP_SIGNAL_MSI)= > 0); -#endif - s->intx_set_mask =3D kvm_check_extension(s, KVM_CAP_PCI_2_3); =20 s->irq_set_ioctl =3D KVM_IRQ_LINE; diff --git a/accel/stubs/kvm-stub.c b/accel/stubs/kvm-stub.c index a323252f8e2..bce005adad8 100644 --- a/accel/stubs/kvm-stub.c +++ b/accel/stubs/kvm-stub.c @@ -27,7 +27,6 @@ bool kvm_allowed; bool kvm_readonly_mem_allowed; bool kvm_ioeventfd_any_length_allowed; bool kvm_msi_use_devid; -bool kvm_direct_msi_allowed; =20 void kvm_flush_coalesced_mmio_buffer(void) { diff --git a/hw/intc/arm_gicv3_its_common.c b/hw/intc/arm_gicv3_its_common.c index abaf77057e1..fddd6d490c2 100644 --- a/hw/intc/arm_gicv3_its_common.c +++ b/hw/intc/arm_gicv3_its_common.c @@ -163,8 +163,7 @@ type_init(gicv3_its_common_register_types) const char *its_class_name(void) { if (kvm_irqchip_in_kernel()) { - /* KVM implementation requires this capability */ - return kvm_direct_msi_enabled() ? "arm-its-kvm" : NULL; + return "arm-its-kvm"; } else { /* Software emulation based model */ return "arm-gicv3-its"; diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index 97a8a4f201c..93dccf5dd92 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -43,7 +43,6 @@ extern bool kvm_msi_via_irqfd_allowed; extern bool kvm_gsi_routing_allowed; extern bool kvm_gsi_direct_mapping; extern bool kvm_readonly_mem_allowed; -extern bool kvm_direct_msi_allowed; extern bool kvm_ioeventfd_any_length_allowed; extern bool kvm_msi_use_devid; =20 @@ -147,13 +146,6 @@ extern bool kvm_msi_use_devid; */ #define kvm_readonly_mem_enabled() (kvm_readonly_mem_allowed) =20 -/** - * kvm_direct_msi_enabled: - * - * Returns: true if KVM allows direct MSI injection. - */ -#define kvm_direct_msi_enabled() (kvm_direct_msi_allowed) - /** * kvm_ioeventfd_any_length_enabled: * Returns: true if KVM allows any length io eventfd. @@ -181,7 +173,6 @@ extern bool kvm_msi_use_devid; #define kvm_gsi_routing_allowed() (false) #define kvm_gsi_direct_mapping() (false) #define kvm_readonly_mem_enabled() (false) -#define kvm_direct_msi_enabled() (false) #define kvm_ioeventfd_any_length_enabled() (false) #define kvm_msi_devid_required() (false) =20 diff --git a/include/sysemu/kvm_int.h b/include/sysemu/kvm_int.h index 075939a3c4f..a7dacd12d6c 100644 --- a/include/sysemu/kvm_int.h +++ b/include/sysemu/kvm_int.h @@ -103,7 +103,6 @@ struct KVMState int nr_allocated_irq_routes; unsigned long *used_gsi_bitmap; unsigned int gsi_count; - QTAILQ_HEAD(, KVMMSIRoute) msi_hashtab[KVM_MSI_HASHTAB_SIZE]; #endif KVMMemoryListener memory_listener; QLIST_HEAD(, KVMParkedVcpu) kvm_parked_vcpus; diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index ab72bcdfad1..ab7d39d5399 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -91,6 +91,7 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = =3D { KVM_CAP_INFO(SET_TSS_ADDR), KVM_CAP_INFO(EXT_CPUID), KVM_CAP_INFO(MP_STATE), + KVM_CAP_INFO(SIGNAL_MSI), KVM_CAP_LAST_INFO }; =20 --=20 2.41.0