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[176.171.218.149]) by smtp.gmail.com with ESMTPSA id j20-20020a05600c1c1400b004065daba6casm1709424wms.46.2023.10.18.06.31.26 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 18 Oct 2023 06:31:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697635887; x=1698240687; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lu/LAV3gHNQX3jkZpzINwdsDxIlwSvdZerkbZ9OixCM=; b=Flwtg+G381XLPe8uX9Qnes0U+mWxW26DggCSREM3Om6K5MyyYaeaBEC4KFhWwp4WNZ MyFj2RuB8kPT01kvzn8K1a00GJQiVz2EdpuN61W6rRDopB0KCMcO6v/j3MwqkUAwnmcC 1J8o/lR8FbNqXuPwKRQ5OyrULVq88Qpw/EtigmUlC7xl4PWylPLibS2Psa2S6VO4YzYf qDeOthmt9XeCCtBopzgpG69pCN1UiqWnKGoJbXMfnscUthf+RNABD+jT0Z8oo+YX73Da KejyulFn5c8HWFCfNlT3QjQKU4D+yT8pfY3TdfHgjWKtWqKiuzDcgrlGouHlXjxSKSOP M5xg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697635887; x=1698240687; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lu/LAV3gHNQX3jkZpzINwdsDxIlwSvdZerkbZ9OixCM=; b=NFgin2qaQa4qnZ2Xl6fVEmUKFO7gqq3qRAR/ZDt0RpZX2s8ZcS6NzFg94nhgttuL8x HDkAVZQhY4F/CNcCEWYS9Ik0h83m3jz5Er511Exjm0tYkFrrGcYmUD+5jTN9bTORRmbt WNZ5s5hXFDUeNFw7e3kxTht84K7Zh//QyAx940P73wAkpmNfVbdNKEHHt+my2qF9dtx6 dqIaXk/uSQs9tcvfm36rWpUXRoYEnjqkRn5/ZlaM23OG2H2Y3cRP80QeiccOJ7ySC3id gvduwJ1o9vLM3NiwMQYH128lHrn47Zxb4G379VHhTJduUBSujPJl59iVcQSVj7VTs8x8 C6nw== X-Gm-Message-State: AOJu0YwTNpUHckA4cXxnyGO1bFi5amMMtJvRom9oof7fkDNwv9TQYg+g Ydho9wYJjmp7c7I4kARA05odxO/piGikelEhrI4= X-Google-Smtp-Source: AGHT+IGIFCzR94M+GERBn5gvDvTexmVFoJjkQXqILgYsAGPeTOLKM2xlrb6NmZxLj4WqKMU5SqoILg== X-Received: by 2002:a2e:b558:0:b0:2c5:1ad0:e306 with SMTP id a24-20020a2eb558000000b002c51ad0e306mr3437827ljn.8.1697635887546; Wed, 18 Oct 2023 06:31:27 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Gibson , =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Barrat?= , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Harsh Prateek Bora , Nicholas Piggin , Daniel Henrique Barboza , qemu-ppc@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 4/6] hw/ppc/pnv: Do not use SysBus API to map local MMIO region Date: Wed, 18 Oct 2023 15:30:57 +0200 Message-ID: <20231018133059.85765-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231018133059.85765-1-philmd@linaro.org> References: <20231018133059.85765-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::235; envelope-from=philmd@linaro.org; helo=mail-lj1-x235.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1697635938088100003 There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Thomas Huth --- hw/ppc/pnv.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 10158f7684..c0e34fffbc 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1217,10 +1217,9 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Er= ror **errp) =20 name =3D g_strdup_printf("icp-%x", chip->chip_id); memory_region_init(&chip8->icp_mmio, OBJECT(chip), name, PNV_ICP_SIZE); - sysbus_init_mmio(SYS_BUS_DEVICE(chip), &chip8->icp_mmio); g_free(name); - - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 1, PNV_ICP_BASE(chip)); + memory_region_add_subregion(get_system_memory(), PNV_ICP_BASE(chip), + &chip8->icp_mmio); =20 /* Map the ICP registers for each thread */ for (i =3D 0; i < chip->nr_cores; i++) { --=20 2.41.0