From nobody Mon Feb 9 11:33:19 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1695658734; cv=none; d=zohomail.com; s=zohoarc; b=mUGh6WkKN1PIzx6HKWHEc0DJwEf8rrgrxNCH6ANCdja0rJ9TEYoFEZ4jCj5Z5QdT/Ua3zkL4O7o2sq8VGMkMSxui7lTte/1J6J66xU/luEFQVYscaRtAB6RTa35XuXw3/8ROCR1ZxC4DZ6y7vieJmxA+rz6Rm9H6Mit9duegDr8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1695658734; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=aLwJl8I/US4ah+xujR5Yenfi2CDPHe0RGqyDiBquf+4=; b=SmgPledS3iWYHgyWolaz/KsDwblSv40WivoYsO5XDA+6Ge1yMvZlsMGaBI0azyrM5nwezPoZr7jYPCWxZolfT//yHXx4Dm3xKfhcwmE7oDfS0WzE1O+yUpaJmFTLf9zUytkmNmx2f50izwrB/I787Lxa5ihtK2+VVMJ8rrpeUI8= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1695658734157632.650870627271; Mon, 25 Sep 2023 09:18:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qkoI7-0004so-Nf; Mon, 25 Sep 2023 12:18:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qkoI6-0004rD-5h for qemu-devel@nongnu.org; Mon, 25 Sep 2023 12:18:34 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qkoI4-0001T9-6x for qemu-devel@nongnu.org; Mon, 25 Sep 2023 12:18:33 -0400 Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.206]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4RvSbd0HsXz6K9qs; Tue, 26 Sep 2023 00:13:33 +0800 (CST) Received: from SecurePC-101-06.china.huawei.com (10.122.247.231) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Mon, 25 Sep 2023 17:18:29 +0100 To: , , Michael Tsirkin CC: , Fan Ni , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Davidlohr Bueso , Gregory Price , Klaus Jensen , Corey Minyard , Klaus Jensen Subject: [PATCH 14/19] hw/cxl/mbox: Add support for background operations Date: Mon, 25 Sep 2023 17:11:19 +0100 Message-ID: <20230925161124.18940-15-Jonathan.Cameron@huawei.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230925161124.18940-1-Jonathan.Cameron@huawei.com> References: <20230925161124.18940-1-Jonathan.Cameron@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.122.247.231] X-ClientProxiedBy: lhrpeml100001.china.huawei.com (7.191.160.183) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=185.176.79.56; envelope-from=jonathan.cameron@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jonathan Cameron From: Jonathan Cameron via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1695658735795100003 Content-Type: text/plain; charset="utf-8" From: Davidlohr Bueso Support background commands in the mailbox, and update cmd_infostat_bg_op_sts() accordingly. This patch does not implement mbox interrupts upon completion, so the kernel driver must rely on polling to know when the operation is done. Signed-off-by: Davidlohr Bueso Signed-off-by: Jonathan Cameron --- hw/cxl/cxl-device-utils.c | 5 +-- hw/cxl/cxl-mailbox-utils.c | 92 +++++++++++++++++++++++++++++++++++++- 2 files changed, 93 insertions(+), 4 deletions(-) diff --git a/hw/cxl/cxl-device-utils.c b/hw/cxl/cxl-device-utils.c index 3dd45fb262..88f0256c79 100644 --- a/hw/cxl/cxl-device-utils.c +++ b/hw/cxl/cxl-device-utils.c @@ -133,8 +133,7 @@ static void mailbox_mem_writeq(uint64_t *reg_state, hwa= ddr offset, case A_CXL_DEV_MAILBOX_CMD: break; case A_CXL_DEV_BG_CMD_STS: - /* BG not supported */ - /* fallthrough */ + break; case A_CXL_DEV_MAILBOX_STS: /* Read only register, will get updated by the state machine */ return; @@ -346,7 +345,7 @@ static void device_reg_init_common(CXLDeviceState *cxl_= dstate) =20 static void mailbox_reg_init_common(CXLDeviceState *cxl_dstate) { - /* 2048 payload size, with no interrupt or background support */ + /* 2048 payload size, with no interrupt */ ARRAY_FIELD_DP32(cxl_dstate->mbox_reg_state32, CXL_DEV_MAILBOX_CAP, PAYLOAD_SIZE, CXL_MAILBOX_PAYLOAD_SHIFT); cxl_dstate->payload_size =3D CXL_MAILBOX_MAX_PAYLOAD_SIZE; diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index d9785f324a..63acbc1214 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -977,6 +977,8 @@ static CXLRetCode cmd_media_clear_poison(const struct c= xl_cmd *cmd, #define IMMEDIATE_DATA_CHANGE (1 << 2) #define IMMEDIATE_POLICY_CHANGE (1 << 3) #define IMMEDIATE_LOG_CHANGE (1 << 4) +#define SECURITY_STATE_CHANGE (1 << 5) +#define BACKGROUND_OPERATION (1 << 6) =20 static const struct cxl_cmd cxl_cmd_set[256][256] =3D { [EVENTS][GET_RECORDS] =3D { "EVENTS_GET_RECORDS", @@ -1027,10 +1029,19 @@ static const struct cxl_cmd cxl_cmd_set_sw[256][256= ] =3D { cmd_get_physical_port_state, ~0, ~0 }, }; =20 +/* + * While the command is executing in the background, the device should + * update the percentage complete in the Background Command Status Register + * at least once per second. + */ + +#define CXL_MBOX_BG_UPDATE_FREQ 1000UL + int cxl_process_cci_message(CXLCCI *cci, uint8_t set, uint8_t cmd, size_t len_in, uint8_t *pl_in, size_t *len_out, uint8_t *pl_out, bool *bg_started) { + int ret; const struct cxl_cmd *cxl_cmd; opcode_handler h; =20 @@ -1047,7 +1058,81 @@ int cxl_process_cci_message(CXLCCI *cci, uint8_t set= , uint8_t cmd, return CXL_MBOX_INVALID_PAYLOAD_LENGTH; } =20 - return (*h)(cxl_cmd, pl_in, len_in, pl_out, len_out, cci); + /* Only one bg command at a time */ + if ((cxl_cmd->effect & BACKGROUND_OPERATION) && + cci->bg.runtime > 0) { + return CXL_MBOX_BUSY; + } + + ret =3D (*h)(cxl_cmd, pl_in, len_in, pl_out, len_out, cci); + if ((cxl_cmd->effect & BACKGROUND_OPERATION) && + ret =3D=3D CXL_MBOX_BG_STARTED) { + *bg_started =3D true; + } else { + *bg_started =3D false; + } + + /* Set bg and the return code */ + if (*bg_started) { + uint64_t now; + + cci->bg.opcode =3D (set << 8) | cmd; + + cci->bg.complete_pct =3D 0; + cci->bg.ret_code =3D 0; + + now =3D qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL); + cci->bg.starttime =3D now; + timer_mod(cci->bg.timer, now + CXL_MBOX_BG_UPDATE_FREQ); + } + + return ret; +} + +static void bg_timercb(void *opaque) +{ + CXLCCI *cci =3D opaque; + CXLDeviceState *cxl_dstate =3D &CXL_TYPE3(cci->d)->cxl_dstate; + uint64_t bg_status_reg =3D 0; + uint64_t now =3D qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL); + uint64_t total_time =3D cci->bg.starttime + cci->bg.runtime; + + assert(cci->bg.runtime > 0); + bg_status_reg =3D FIELD_DP64(bg_status_reg, CXL_DEV_BG_CMD_STS, + OP, cci->bg.opcode); + + if (now >=3D total_time) { /* we are done */ + uint64_t status_reg; + uint16_t ret =3D CXL_MBOX_SUCCESS; + + cci->bg.complete_pct =3D 100; + /* Clear bg */ + status_reg =3D FIELD_DP64(0, CXL_DEV_MAILBOX_STS, BG_OP, 0); + cxl_dstate->mbox_reg_state64[R_CXL_DEV_MAILBOX_STS] =3D status_reg; + + bg_status_reg =3D FIELD_DP64(bg_status_reg, CXL_DEV_BG_CMD_STS, + RET_CODE, ret); + + /* TODO add ad-hoc cmd succesful completion handling */ + + qemu_log("Background command %04xh finished: %s\n", + cci->bg.opcode, + ret =3D=3D CXL_MBOX_SUCCESS ? "success" : "aborted"); + } else { + /* estimate only */ + cci->bg.complete_pct =3D 100 * now / total_time; + timer_mod(cci->bg.timer, now + CXL_MBOX_BG_UPDATE_FREQ); + } + + bg_status_reg =3D FIELD_DP64(bg_status_reg, CXL_DEV_BG_CMD_STS, + PERCENTAGE_COMP, cci->bg.complete_pct); + cxl_dstate->mbox_reg_state64[R_CXL_DEV_BG_CMD_STS] =3D bg_status_reg; + + if (cci->bg.complete_pct =3D=3D 100) { + cci->bg.starttime =3D 0; + /* registers are updated, allow new bg-capable cmds */ + cci->bg.runtime =3D 0; + } } =20 void cxl_init_cci(CXLCCI *cci, size_t payload_max) @@ -1066,6 +1151,11 @@ void cxl_init_cci(CXLCCI *cci, size_t payload_max) } } } + cci->bg.complete_pct =3D 0; + cci->bg.starttime =3D 0; + cci->bg.runtime =3D 0; + cci->bg.timer =3D timer_new_ms(QEMU_CLOCK_VIRTUAL, + bg_timercb, cci); } =20 void cxl_initialize_mailbox_swcci(CXLCCI *cci, DeviceState *intf, --=20 2.39.2