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([71.212.131.115]) by smtp.gmail.com with ESMTPSA id s187-20020a6377c4000000b00577f55e4a4esm3010087pgc.20.2023.09.15.09.42.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Sep 2023 09:42:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1694796169; x=1695400969; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+M2eLP1MxR8ITUHAyqevQXr9QFlyFahQKSge9OJBONo=; b=vZjifz+tfhcOdUjJoAeQUXBlEao50fxlO8brSd24jT9+yf80gl59kdpx1PDzd+Pfpo 2PfDPepM9h0WgINr2mpUYc5w61QUV8WkkFuafsXKZtnf7OJck28bKa2K5vZnps9R8H55 tOMgk8u28gHWrMVb7SnbfD81ooIRNVXWoxIm2PaVeEhte48z025PaO3V+4jPjNKM15nr rE6Yv9TdIQ9+AcjMdLUfAlQTzM4h8KybtmZgX9dzxh55UPo+fs3mqJinTlVeLaTSR+gs UD9UxPFx92PBhql/X9dafNuGopCVmI0+slCjBq2SEiCHLxwr4l5r1FgrLyeEuafa4ivJ mq7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1694796169; x=1695400969; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+M2eLP1MxR8ITUHAyqevQXr9QFlyFahQKSge9OJBONo=; b=uO0PfmSEYPkdb4/N83+OfqLR4nzmcD0Sr2cHA3b8Fkp8am0/yMEp2arZZT1jRHm3Ck a6NfwGO0naLZuZF2t9YxZPp1EiRLJ63EdYUXihs4d8Gb5850dlTFiibjBoILPLBIJuzZ jn+ZiiF14Q1tncrhAynHY4uKTZ+6tYhYCo76W1gbsxBF/2xoHQoAw8Z4uSic5m0M/DzH WURfyysnMS0LhLucOgxWoAtN3oU6MLHzIvZzxBgzV6BQ1LhCN8opf0SDSvD0TsGk0kxl KLNreHNw7psJYj8Vf/LKK6YhjjwvH1H0dwHm4NLXGcuAyxC32TbNfDnh+Xphcsox8WsQ 1yyQ== X-Gm-Message-State: AOJu0YynMDf+Xhf2Xqw2q2kMYwz0dAbluHz3uaEnJWf2XX0ZZ9oK9/ev kBBkB6gWaHqjuAves7WauOENhlkQjaUMWw3aOMs= X-Google-Smtp-Source: AGHT+IHnv95qoNqNd6dMBhTQm4EtFGdgRyz4vUJIsrQQLP4S1JB25heoKGGIUdfItyB6ZHxEYKdKFA== X-Received: by 2002:a05:6a20:12ca:b0:131:a21:9f96 with SMTP id v10-20020a056a2012ca00b001310a219f96mr2914813pzg.6.1694796168907; Fri, 15 Sep 2023 09:42:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Ard Biesheuvel Subject: [PULL 18/19] host/include/i386: Implement clmul.h Date: Fri, 15 Sep 2023 09:42:30 -0700 Message-Id: <20230915164231.123580-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230915164231.123580-1-richard.henderson@linaro.org> References: <20230915164231.123580-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1694796227104100003 Content-Type: text/plain; charset="utf-8" Detect PCLMUL in cpuinfo; implement the accel hook. Reviewed-by: Ard Biesheuvel Signed-off-by: Richard Henderson --- host/include/i386/host/cpuinfo.h | 1 + host/include/i386/host/crypto/clmul.h | 29 +++++++++++++++++++++++++ host/include/x86_64/host/crypto/clmul.h | 1 + include/qemu/cpuid.h | 3 +++ util/cpuinfo-i386.c | 1 + 5 files changed, 35 insertions(+) create mode 100644 host/include/i386/host/crypto/clmul.h create mode 100644 host/include/x86_64/host/crypto/clmul.h diff --git a/host/include/i386/host/cpuinfo.h b/host/include/i386/host/cpui= nfo.h index 073d0a426f..7ae21568f7 100644 --- a/host/include/i386/host/cpuinfo.h +++ b/host/include/i386/host/cpuinfo.h @@ -27,6 +27,7 @@ #define CPUINFO_ATOMIC_VMOVDQA (1u << 16) #define CPUINFO_ATOMIC_VMOVDQU (1u << 17) #define CPUINFO_AES (1u << 18) +#define CPUINFO_PCLMUL (1u << 19) =20 /* Initialized with a constructor. */ extern unsigned cpuinfo; diff --git a/host/include/i386/host/crypto/clmul.h b/host/include/i386/host= /crypto/clmul.h new file mode 100644 index 0000000000..dc3c814797 --- /dev/null +++ b/host/include/i386/host/crypto/clmul.h @@ -0,0 +1,29 @@ +/* + * x86 specific clmul acceleration. + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef X86_HOST_CRYPTO_CLMUL_H +#define X86_HOST_CRYPTO_CLMUL_H + +#include "host/cpuinfo.h" +#include + +#if defined(__PCLMUL__) +# define HAVE_CLMUL_ACCEL true +# define ATTR_CLMUL_ACCEL +#else +# define HAVE_CLMUL_ACCEL likely(cpuinfo & CPUINFO_PCLMUL) +# define ATTR_CLMUL_ACCEL __attribute__((target("pclmul"))) +#endif + +static inline Int128 ATTR_CLMUL_ACCEL +clmul_64_accel(uint64_t n, uint64_t m) +{ + union { __m128i v; Int128 s; } u; + + u.v =3D _mm_clmulepi64_si128(_mm_set_epi64x(0, n), _mm_set_epi64x(0, m= ), 0); + return u.s; +} + +#endif /* X86_HOST_CRYPTO_CLMUL_H */ diff --git a/host/include/x86_64/host/crypto/clmul.h b/host/include/x86_64/= host/crypto/clmul.h new file mode 100644 index 0000000000..f25eced416 --- /dev/null +++ b/host/include/x86_64/host/crypto/clmul.h @@ -0,0 +1 @@ +#include "host/include/i386/host/crypto/clmul.h" diff --git a/include/qemu/cpuid.h b/include/qemu/cpuid.h index 35325f1995..b11161555b 100644 --- a/include/qemu/cpuid.h +++ b/include/qemu/cpuid.h @@ -25,6 +25,9 @@ #endif =20 /* Leaf 1, %ecx */ +#ifndef bit_PCLMUL +#define bit_PCLMUL (1 << 1) +#endif #ifndef bit_SSE4_1 #define bit_SSE4_1 (1 << 19) #endif diff --git a/util/cpuinfo-i386.c b/util/cpuinfo-i386.c index b2ed65bb10..9fddb18303 100644 --- a/util/cpuinfo-i386.c +++ b/util/cpuinfo-i386.c @@ -39,6 +39,7 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) info |=3D (c & bit_SSE4_1 ? CPUINFO_SSE4 : 0); info |=3D (c & bit_MOVBE ? CPUINFO_MOVBE : 0); info |=3D (c & bit_POPCNT ? CPUINFO_POPCNT : 0); + info |=3D (c & bit_PCLMUL ? CPUINFO_PCLMUL : 0); =20 /* Our AES support requires PSHUFB as well. */ info |=3D ((c & bit_AES) && (c & bit_SSSE3) ? CPUINFO_AES : 0); --=20 2.34.1