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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::12a; envelope-from=baturo.alexey@gmail.com; helo=mail-lf1-x12a.google.com X-Spam_score_int: -7 X-Spam_score: -0.8 X-Spam_bar: / X-Spam_report: (-0.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, TVD_PH_SUBJ_META1=1.249, T_SPF_HELO_TEMPERROR=0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1694197671365100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: Alexey Baturo --- target/riscv/translate.c | 21 +++++++++++++++++++-- target/riscv/vector_helper.c | 7 +++++++ 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 3434ba58b6..4aa0e2b9e1 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -581,7 +581,15 @@ static TCGv get_address(DisasContext *ctx, int rs1, in= t imm) TCGv src1 =3D get_gpr(ctx, rs1, EXT_NONE); =20 tcg_gen_addi_tl(addr, src1, imm); - if (get_address_xl(ctx) =3D=3D MXL_RV32) { + if (ctx->pm_enabled) { + tcg_gen_shl_tl(addr, addr, pm_n_bits); + /* sign extend address by first non-masked bit otherwise zero exte= nd */ + if (ctx->pm_signext) { + tcg_gen_sar_tl(addr, addr, pm_n_bits); + } else { + tcg_gen_shr_tl(addr, addr, pm_n_bits); + } + } else if (get_address_xl(ctx) =3D=3D MXL_RV32) { tcg_gen_ext32u_tl(addr, addr); } =20 @@ -595,7 +603,16 @@ static TCGv get_address_indexed(DisasContext *ctx, int= rs1, TCGv offs) TCGv src1 =3D get_gpr(ctx, rs1, EXT_NONE); =20 tcg_gen_add_tl(addr, src1, offs); - if (get_xl(ctx) =3D=3D MXL_RV32) { + /* sign extend address by first non-masked bit */ + if (ctx->pm_enabled) { + tcg_gen_shl_tl(addr, addr, pm_n_bits); + /* sign extend address by first non-masked bit otherwise zero exte= nd */ + if (ctx->pm_signext) { + tcg_gen_sar_tl(addr, addr, pm_n_bits); + } else { + tcg_gen_shr_tl(addr, addr, pm_n_bits); + } + } else if (get_xl(ctx) =3D=3D MXL_RV32) { tcg_gen_ext32u_tl(addr, addr); } return addr; diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index af07e1067d..d3ddc2fd41 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -169,6 +169,13 @@ static inline uint32_t vext_get_total_elems(CPURISCVSt= ate *env, uint32_t desc, =20 static inline target_ulong adjust_addr(CPURISCVState *env, target_ulong ad= dr) { + addr =3D addr << env->pm_n_bits; + /* sign/zero extend masked address by N-1 bit */ + if (env->pm_signext) { + addr =3D (target_long)addr >> env->pm_n_bits; + } else { + addr =3D addr >> env->pm_n_bits; + } return addr; } =20 --=20 2.34.1