From nobody Thu Nov 28 10:44:09 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1694075904298538.8149003939822; Thu, 7 Sep 2023 01:38:24 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qeARV-0004Dr-4s; Thu, 07 Sep 2023 04:32:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qeART-000464-3T for qemu-devel@nongnu.org; Thu, 07 Sep 2023 04:32:47 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qeARQ-0002Ll-28 for qemu-devel@nongnu.org; Thu, 07 Sep 2023 04:32:46 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8DxPOueivlkKTkhAA--.60829S3; Thu, 07 Sep 2023 16:32:30 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Bxxsx+ivlk8FVwAA--.49124S34; Thu, 07 Sep 2023 16:32:28 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org, maobibo@loongson.cn Subject: [PATCH RESEND v5 32/57] target/loongarch: Implement xvmskltz/xvmskgez/xvmsknz Date: Thu, 7 Sep 2023 16:31:33 +0800 Message-Id: <20230907083158.3975132-33-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230907083158.3975132-1-gaosong@loongson.cn> References: <20230907083158.3975132-1-gaosong@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: AQAAf8Bxxsx+ivlk8FVwAA--.49124S34 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1694075905089100009 Content-Type: text/plain; charset="utf-8" This patch includes: - XVMSKLTZ.{B/H/W/D}; - XVMSKGEZ.B; - XVMSKNZ.B. Signed-off-by: Song Gao Reviewed-by: Richard Henderson --- target/loongarch/insns.decode | 7 ++ target/loongarch/disas.c | 7 ++ target/loongarch/vec_helper.c | 78 ++++++++++++++------- target/loongarch/insn_trans/trans_vec.c.inc | 6 ++ 4 files changed, 74 insertions(+), 24 deletions(-) diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode index 7bbda1a142..6a161d6d20 100644 --- a/target/loongarch/insns.decode +++ b/target/loongarch/insns.decode @@ -1598,6 +1598,13 @@ xvsigncov_h 0111 01010010 11101 ..... ..... ...= .. @vvv xvsigncov_w 0111 01010010 11110 ..... ..... ..... @vvv xvsigncov_d 0111 01010010 11111 ..... ..... ..... @vvv =20 +xvmskltz_b 0111 01101001 11000 10000 ..... ..... @vv +xvmskltz_h 0111 01101001 11000 10001 ..... ..... @vv +xvmskltz_w 0111 01101001 11000 10010 ..... ..... @vv +xvmskltz_d 0111 01101001 11000 10011 ..... ..... @vv +xvmskgez_b 0111 01101001 11000 10100 ..... ..... @vv +xvmsknz_b 0111 01101001 11000 11000 ..... ..... @vv + xvreplgr2vr_b 0111 01101001 11110 00000 ..... ..... @vr xvreplgr2vr_h 0111 01101001 11110 00001 ..... ..... @vr xvreplgr2vr_w 0111 01101001 11110 00010 ..... ..... @vr diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c index 1f01ec99d5..05710098ad 100644 --- a/target/loongarch/disas.c +++ b/target/loongarch/disas.c @@ -2015,6 +2015,13 @@ INSN_LASX(xvsigncov_h, vvv) INSN_LASX(xvsigncov_w, vvv) INSN_LASX(xvsigncov_d, vvv) =20 +INSN_LASX(xvmskltz_b, vv) +INSN_LASX(xvmskltz_h, vv) +INSN_LASX(xvmskltz_w, vv) +INSN_LASX(xvmskltz_d, vv) +INSN_LASX(xvmskgez_b, vv) +INSN_LASX(xvmsknz_b, vv) + INSN_LASX(xvreplgr2vr_b, vr) INSN_LASX(xvreplgr2vr_h, vr) INSN_LASX(xvreplgr2vr_w, vr) diff --git a/target/loongarch/vec_helper.c b/target/loongarch/vec_helper.c index 3dc20243fd..f749800880 100644 --- a/target/loongarch/vec_helper.c +++ b/target/loongarch/vec_helper.c @@ -810,14 +810,19 @@ static uint64_t do_vmskltz_b(int64_t val) =20 void HELPER(vmskltz_b)(void *vd, void *vj, uint32_t desc) { + int i; uint16_t temp =3D 0; VReg *Vd =3D (VReg *)vd; VReg *Vj =3D (VReg *)vj; + int oprsz =3D simd_oprsz(desc); =20 - temp =3D do_vmskltz_b(Vj->D(0)); - temp |=3D (do_vmskltz_b(Vj->D(1)) << 8); - Vd->D(0) =3D temp; - Vd->D(1) =3D 0; + for (i =3D 0; i < oprsz / 16; i++) { + temp =3D 0; + temp =3D do_vmskltz_b(Vj->D(2 * i)); + temp |=3D (do_vmskltz_b(Vj->D(2 * i + 1)) << 8); + Vd->D(2 * i) =3D temp; + Vd->D(2 * i + 1) =3D 0; + } } =20 static uint64_t do_vmskltz_h(int64_t val) @@ -831,14 +836,19 @@ static uint64_t do_vmskltz_h(int64_t val) =20 void HELPER(vmskltz_h)(void *vd, void *vj, uint32_t desc) { + int i; uint16_t temp =3D 0; VReg *Vd =3D (VReg *)vd; VReg *Vj =3D (VReg *)vj; + int oprsz =3D simd_oprsz(desc); =20 - temp =3D do_vmskltz_h(Vj->D(0)); - temp |=3D (do_vmskltz_h(Vj->D(1)) << 4); - Vd->D(0) =3D temp; - Vd->D(1) =3D 0; + for (i =3D 0; i < oprsz / 16; i++) { + temp =3D 0; + temp =3D do_vmskltz_h(Vj->D(2 * i)); + temp |=3D (do_vmskltz_h(Vj->D(2 * i + 1)) << 4); + Vd->D(2 * i) =3D temp; + Vd->D(2 * i + 1) =3D 0; + } } =20 static uint64_t do_vmskltz_w(int64_t val) @@ -851,14 +861,19 @@ static uint64_t do_vmskltz_w(int64_t val) =20 void HELPER(vmskltz_w)(void *vd, void *vj, uint32_t desc) { + int i; uint16_t temp =3D 0; VReg *Vd =3D (VReg *)vd; VReg *Vj =3D (VReg *)vj; + int oprsz =3D simd_oprsz(desc); =20 - temp =3D do_vmskltz_w(Vj->D(0)); - temp |=3D (do_vmskltz_w(Vj->D(1)) << 2); - Vd->D(0) =3D temp; - Vd->D(1) =3D 0; + for (i =3D 0; i < oprsz / 16; i++) { + temp =3D 0; + temp =3D do_vmskltz_w(Vj->D(2 * i)); + temp |=3D (do_vmskltz_w(Vj->D(2 * i + 1)) << 2); + Vd->D(2 * i) =3D temp; + Vd->D(2 * i + 1) =3D 0; + } } =20 static uint64_t do_vmskltz_d(int64_t val) @@ -867,26 +882,36 @@ static uint64_t do_vmskltz_d(int64_t val) } void HELPER(vmskltz_d)(void *vd, void *vj, uint32_t desc) { + int i; uint16_t temp =3D 0; VReg *Vd =3D (VReg *)vd; VReg *Vj =3D (VReg *)vj; + int oprsz =3D simd_oprsz(desc); =20 - temp =3D do_vmskltz_d(Vj->D(0)); - temp |=3D (do_vmskltz_d(Vj->D(1)) << 1); - Vd->D(0) =3D temp; - Vd->D(1) =3D 0; + for (i =3D 0; i < oprsz / 16; i++) { + temp =3D 0; + temp =3D do_vmskltz_d(Vj->D(2 * i)); + temp |=3D (do_vmskltz_d(Vj->D(2 * i + 1)) << 1); + Vd->D(2 * i) =3D temp; + Vd->D(2 * i + 1) =3D 0; + } } =20 void HELPER(vmskgez_b)(void *vd, void *vj, uint32_t desc) { + int i; uint16_t temp =3D 0; VReg *Vd =3D (VReg *)vd; VReg *Vj =3D (VReg *)vj; + int oprsz =3D simd_oprsz(desc); =20 - temp =3D do_vmskltz_b(Vj->D(0)); - temp |=3D (do_vmskltz_b(Vj->D(1)) << 8); - Vd->D(0) =3D (uint16_t)(~temp); - Vd->D(1) =3D 0; + for (i =3D 0; i < oprsz / 16; i++) { + temp =3D 0; + temp =3D do_vmskltz_b(Vj->D(2 * i)); + temp |=3D (do_vmskltz_b(Vj->D(2 * i + 1)) << 8); + Vd->D(2 * i) =3D (uint16_t)(~temp); + Vd->D(2 * i + 1) =3D 0; + } } =20 static uint64_t do_vmskez_b(uint64_t a) @@ -901,14 +926,19 @@ static uint64_t do_vmskez_b(uint64_t a) =20 void HELPER(vmsknz_b)(void *vd, void *vj, uint32_t desc) { + int i; uint16_t temp =3D 0; VReg *Vd =3D (VReg *)vd; VReg *Vj =3D (VReg *)vj; + int oprsz =3D simd_oprsz(desc); =20 - temp =3D do_vmskez_b(Vj->D(0)); - temp |=3D (do_vmskez_b(Vj->D(1)) << 8); - Vd->D(0) =3D (uint16_t)(~temp); - Vd->D(1) =3D 0; + for (i =3D 0; i < oprsz / 16; i++) { + temp =3D 0; + temp =3D do_vmskez_b(Vj->D(2 * i)); + temp |=3D (do_vmskez_b(Vj->D(2 * i + 1)) << 8); + Vd->D(2 * i) =3D (uint16_t)(~temp); + Vd->D(2 * i + 1) =3D 0; + } } =20 void HELPER(vnori_b)(void *vd, void *vj, uint64_t imm, uint32_t v) diff --git a/target/loongarch/insn_trans/trans_vec.c.inc b/target/loongarch= /insn_trans/trans_vec.c.inc index 604e85b654..b889b6c966 100644 --- a/target/loongarch/insn_trans/trans_vec.c.inc +++ b/target/loongarch/insn_trans/trans_vec.c.inc @@ -3483,6 +3483,12 @@ TRANS(vmskltz_w, LSX, gen_vv, gen_helper_vmskltz_w) TRANS(vmskltz_d, LSX, gen_vv, gen_helper_vmskltz_d) TRANS(vmskgez_b, LSX, gen_vv, gen_helper_vmskgez_b) TRANS(vmsknz_b, LSX, gen_vv, gen_helper_vmsknz_b) +TRANS(xvmskltz_b, LASX, gen_xx, gen_helper_vmskltz_b) +TRANS(xvmskltz_h, LASX, gen_xx, gen_helper_vmskltz_h) +TRANS(xvmskltz_w, LASX, gen_xx, gen_helper_vmskltz_w) +TRANS(xvmskltz_d, LASX, gen_xx, gen_helper_vmskltz_d) +TRANS(xvmskgez_b, LASX, gen_xx, gen_helper_vmskgez_b) +TRANS(xvmsknz_b, LASX, gen_xx, gen_helper_vmsknz_b) =20 #define EXPAND_BYTE(bit) ((uint64_t)(bit ? 0xff : 0)) =20 --=20 2.39.1