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Thu, 07 Sep 2023 16:32:12 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Bxxsx+ivlk8FVwAA--.49124S14; Thu, 07 Sep 2023 16:32:11 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org, maobibo@loongson.cn Subject: [PATCH RESEND v5 12/57] target/loongarch: check_vec support check LASX instructions Date: Thu, 7 Sep 2023 16:31:13 +0800 Message-Id: <20230907083158.3975132-13-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230907083158.3975132-1-gaosong@loongson.cn> References: <20230907083158.3975132-1-gaosong@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: AQAAf8Bxxsx+ivlk8FVwAA--.49124S14 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1694075969262100001 Content-Type: text/plain; charset="utf-8" Reviewed-by: Richard Henderson Signed-off-by: Song Gao --- target/loongarch/cpu.h | 2 ++ target/loongarch/cpu.c | 2 ++ target/loongarch/insn_trans/trans_vec.c.inc | 6 ++++++ 3 files changed, 10 insertions(+) diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index 347ad1c8a9..f125a8e49b 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -462,6 +462,7 @@ static inline void set_pc(CPULoongArchState *env, uint6= 4_t value) #define HW_FLAGS_CRMD_PG R_CSR_CRMD_PG_MASK /* 0x10 */ #define HW_FLAGS_EUEN_FPE 0x04 #define HW_FLAGS_EUEN_SXE 0x08 +#define HW_FLAGS_EUEN_ASXE 0x10 #define HW_FLAGS_VA32 0x20 =20 static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc, @@ -472,6 +473,7 @@ static inline void cpu_get_tb_cpu_state(CPULoongArchSta= te *env, vaddr *pc, *flags =3D env->CSR_CRMD & (R_CSR_CRMD_PLV_MASK | R_CSR_CRMD_PG_MASK); *flags |=3D FIELD_EX64(env->CSR_EUEN, CSR_EUEN, FPE) * HW_FLAGS_EUEN_F= PE; *flags |=3D FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE) * HW_FLAGS_EUEN_S= XE; + *flags |=3D FIELD_EX64(env->CSR_EUEN, CSR_EUEN, ASXE) * HW_FLAGS_EUEN_= ASXE; *flags |=3D is_va32(env) * HW_FLAGS_VA32; } =20 diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 4d72e905aa..a1d3f680d8 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -55,6 +55,7 @@ static const char * const excp_names[] =3D { [EXCCODE_DBP] =3D "Debug breakpoint", [EXCCODE_BCE] =3D "Bound Check Exception", [EXCCODE_SXD] =3D "128 bit vector instructions Disable exception", + [EXCCODE_ASXD] =3D "256 bit vector instructions Disable exception", }; =20 const char *loongarch_exception_name(int32_t exception) @@ -190,6 +191,7 @@ static void loongarch_cpu_do_interrupt(CPUState *cs) case EXCCODE_FPD: case EXCCODE_FPE: case EXCCODE_SXD: + case EXCCODE_ASXD: env->CSR_BADV =3D env->pc; QEMU_FALLTHROUGH; case EXCCODE_BCE: diff --git a/target/loongarch/insn_trans/trans_vec.c.inc b/target/loongarch= /insn_trans/trans_vec.c.inc index 0985191c70..a90afd3b82 100644 --- a/target/loongarch/insn_trans/trans_vec.c.inc +++ b/target/loongarch/insn_trans/trans_vec.c.inc @@ -12,6 +12,12 @@ static bool check_vec(DisasContext *ctx, uint32_t oprsz) generate_exception(ctx, EXCCODE_SXD); return false; } + + if ((oprsz =3D=3D 32) && ((ctx->base.tb->flags & HW_FLAGS_EUEN_ASXE) = =3D=3D 0)) { + generate_exception(ctx, EXCCODE_ASXD); + return false; + } + return true; } =20 --=20 2.39.1