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bh=mg3kYlTtUJFXrNtJeRlzw2RfhuRF2qfghP+aKgkkZ+E=; b=gkoBwU2ADPmfq01gAXB0ttxy6kNpxnN4H/y8nAbcriycBAKME/2C+Ir3M4U+Fc/8vp6Vej syJWODg7xLr9OLgG+gWoi7feyUCSePRwzZxv5BTL6FL/Nj7pSmWl4zTiuiVcZkTn96UouM MEb7yvYnVmJ1CnoZ24NyvhFKlLxNGM0= X-MC-Unique: drCx-XxMNoSexSX1dRpybg-1 From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, imp@bsdimp.com, kevans@freebsd.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, wangyanan55@huawei.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, richard.henderson@linaro.org, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, yangxiaojuan@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, clg@kaod.org, david@gibson.dropbear.id.au, groug@kaod.org, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, mark.cave-ayland@ilande.co.uk, atar4qemu@gmail.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, pbonzini@redhat.com, imammedo@redhat.com, shan.gavin@gmail.com Subject: [PATCH v3 21/32] target/microblaze: Implement microblaze_cpu_list() Date: Thu, 7 Sep 2023 10:35:42 +1000 Message-ID: <20230907003553.1636896-22-gshan@redhat.com> In-Reply-To: <20230907003553.1636896-1-gshan@redhat.com> References: <20230907003553.1636896-1-gshan@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.1 on 10.11.54.8 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1694047366938100001 Content-Type: text/plain; charset="utf-8" Implement microblaze_cpu_list() to support cpu_list(). With this applied, the available CPU model names, same to the CPU type names, are shown as below. $ ./build/qemu-system-hppa -cpu ? Available CPUs: microblaze-cpu Signed-off-by: Gavin Shan --- target/microblaze/cpu.c | 20 ++++++++++++++++++++ target/microblaze/cpu.h | 3 +++ 2 files changed, 23 insertions(+) diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 03c2c4db1f..fc7a5dee5b 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -24,6 +24,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qapi/error.h" +#include "qemu/qemu-print.h" #include "cpu.h" #include "qemu/module.h" #include "hw/qdev-properties.h" @@ -291,6 +292,25 @@ static void mb_cpu_realizefn(DeviceState *dev, Error *= *errp) mcc->parent_realize(dev, errp); } =20 +static void microblaze_cpu_list_entry(gpointer data, gpointer user_data) +{ + const char *typename =3D object_class_get_name(OBJECT_CLASS(data)); + char *model =3D cpu_model_from_type(typename); + + qemu_printf(" %s\n", model); + g_free(model); +} + +void microblaze_cpu_list(void) +{ + GSList *list; + + list =3D object_class_get_list_sorted(TYPE_MICROBLAZE_CPU, false); + qemu_printf("Available CPUs:\n"); + g_slist_foreach(list, microblaze_cpu_list_entry, NULL); + g_slist_free(list); +} + static void mb_cpu_initfn(Object *obj) { MicroBlazeCPU *cpu =3D MICROBLAZE_CPU(obj); diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index f6cab6ce19..b5775c2966 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -372,6 +372,9 @@ int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray = *buf, int reg); int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); int mb_cpu_gdb_read_stack_protect(CPUArchState *cpu, GByteArray *buf, int = reg); int mb_cpu_gdb_write_stack_protect(CPUArchState *cpu, uint8_t *buf, int re= g); +void microblaze_cpu_list(void); + +#define cpu_list microblaze_cpu_list =20 static inline uint32_t mb_cpu_read_msr(const CPUMBState *env) { --=20 2.41.0