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bh=AHeRbe1aDL94lupPs+/BMLBD1wSoPr3zaknBi0ZyXHs=; b=Zxj1CWpWCScOHWOMQxRtrJnEBaO/tP8WA/wh7mbz1/a9J56qqRRNpe9AcOea41B6XbOTNg RlV547YpNWYG8DYyC1axpglm1deWF0b9il9hPaNWgYQ/4zi9I3D77by1ueL8PwE08jvkaK eFi7bcw6cNPzY7OTmp184pKt1eGMZtE= X-MC-Unique: fX3uU0-sOHSbYOY_XgOUTA-1 From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, imp@bsdimp.com, kevans@freebsd.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, wangyanan55@huawei.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, richard.henderson@linaro.org, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, yangxiaojuan@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, clg@kaod.org, david@gibson.dropbear.id.au, groug@kaod.org, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, mark.cave-ayland@ilande.co.uk, atar4qemu@gmail.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, pbonzini@redhat.com, imammedo@redhat.com, shan.gavin@gmail.com Subject: [PATCH v3 10/32] target/mips: Use generic helper to show CPU model names Date: Thu, 7 Sep 2023 10:35:31 +1000 Message-ID: <20230907003553.1636896-11-gshan@redhat.com> In-Reply-To: <20230907003553.1636896-1-gshan@redhat.com> References: <20230907003553.1636896-1-gshan@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.1 on 10.11.54.8 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1694047186623100002 Content-Type: text/plain; charset="utf-8" For target/mips, the CPU type name is always the combination of the CPU model name and suffix. The CPU model names have been shown correctly in mips_cpu_list(), which fetches the CPU model names from the pre-defined array. It's different from other targets and lack of flexibility. Implement mips_cpu_list() by fetching the CPU model names from the available CPU classes. Besides, the retrieved class needs to be validated before it's returned in mips_cpu_class_by_name(), as other targets do. Signed-off-by: Gavin Shan --- target/mips/cpu-defs.c.inc | 9 --------- target/mips/cpu.c | 25 ++++++++++++++++++++++++- target/mips/sysemu/mips-qmp-cmds.c | 3 +-- 3 files changed, 25 insertions(+), 12 deletions(-) diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc index c0c389c59a..fbf787d8ce 100644 --- a/target/mips/cpu-defs.c.inc +++ b/target/mips/cpu-defs.c.inc @@ -1018,15 +1018,6 @@ const mips_def_t mips_defs[] =3D }; const int mips_defs_number =3D ARRAY_SIZE(mips_defs); =20 -void mips_cpu_list(void) -{ - int i; - - for (i =3D 0; i < ARRAY_SIZE(mips_defs); i++) { - qemu_printf("MIPS '%s'\n", mips_defs[i].name); - } -} - static void fpu_init (CPUMIPSState *env, const mips_def_t *def) { int i; diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 63da1948fd..3431acbd99 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -532,7 +532,12 @@ static ObjectClass *mips_cpu_class_by_name(const char = *cpu_model) typename =3D mips_cpu_type_name(cpu_model); oc =3D object_class_by_name(typename); g_free(typename); - return oc; + if (object_class_dynamic_cast(oc, TYPE_MIPS_CPU) && + !object_class_is_abstract(oc)) { + return oc; + } + + return NULL; } =20 #ifndef CONFIG_USER_ONLY @@ -566,6 +571,24 @@ static const struct TCGCPUOps mips_tcg_ops =3D { }; #endif /* CONFIG_TCG */ =20 +static void mips_cpu_list_entry(gpointer data, gpointer user_data) +{ + const char *typename =3D object_class_get_name(OBJECT_CLASS(data)); + char *model =3D cpu_model_from_type(typename); + + qemu_printf(" %s\n", model); + g_free(model); +} + +void mips_cpu_list(void) +{ + GSList *list; + list =3D object_class_get_list_sorted(TYPE_MIPS_CPU, false); + qemu_printf("Available CPUs:\n"); + g_slist_foreach(list, mips_cpu_list_entry, NULL); + g_slist_free(list); +} + static void mips_cpu_class_init(ObjectClass *c, void *data) { MIPSCPUClass *mcc =3D MIPS_CPU_CLASS(c); diff --git a/target/mips/sysemu/mips-qmp-cmds.c b/target/mips/sysemu/mips-q= mp-cmds.c index 6db4626412..7340ac70ba 100644 --- a/target/mips/sysemu/mips-qmp-cmds.c +++ b/target/mips/sysemu/mips-qmp-cmds.c @@ -19,8 +19,7 @@ static void mips_cpu_add_definition(gpointer data, gpoint= er user_data) =20 typename =3D object_class_get_name(oc); info =3D g_malloc0(sizeof(*info)); - info->name =3D g_strndup(typename, - strlen(typename) - strlen("-" TYPE_MIPS_CPU)); + info->name =3D cpu_model_from_type(typename); info->q_typename =3D g_strdup(typename); =20 QAPI_LIST_PREPEND(*cpu_list, info); --=20 2.41.0