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([177.94.15.194]) by smtp.gmail.com with ESMTPSA id n21-20020a9d6f15000000b006b75242d6c3sm6229228otq.38.2023.09.06.02.17.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Sep 2023 02:17:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1693991848; x=1694596648; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=GNwYRcF/ah5M2Lkpnd1nk5/sQynl6I3tpewm61MeLZQ=; b=o6wL7xJ8RjxOvcIWRf1OTfKJtc6uorbwRZcvxOC5BiqomUwLhuxmKzxCmsX+1KENVb atRg5fYlH0ldpkM2O94ZvP5vlixZN8WZHnjmTRU5w7sQy0OpuPrHXTxpRqDjYdmZG0yG vJE25PypzLFVSBqlcELTN+KaBWDSJHoG1fLMCgqqrDzSXXVEqFEyJLl2/on8ynfs6j5O G0TkhIH36ambIIgS/OQWj6L7QYYBfWFOMWHEhEXf8YiGtWFOOUSx03jgnk7kLoCbwcpJ aKFEE/nNXQCdEWAHPOYx+gDWm8nK3HQ3dS6O1sjsnFRz3pF8ae3T7kr2AvDJ4e+ygvyQ eOJQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1693991848; x=1694596648; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GNwYRcF/ah5M2Lkpnd1nk5/sQynl6I3tpewm61MeLZQ=; b=dnUhDp7pzRG2CmBP9vj4IXgK/wQN2w71JmpPXxCraeThMoOqyJFMLkb2leMGgw1Odp aiyPJasKi8HIeyLFsSmfMw5dWtFA0brkPHpM7kyuQOKGHiVrkh3I5htodSRs+dGTRJUN Oz+IkOm641q9jkaRXFAYoY+imTg1ZVA8zgwWPhJZM/niJKZho7cxceCWndu6l4RD9cnK /9tKhCD08aVo3gNCrdU91oCs8uN1LORLO+AiIfyQfDEjOC7qlO+UuW8liRyTGZYKWNVU K7L+c8z//rgY/GnHasolyyZv9eg3ZV8Z8sa+foRXI2ZIBBexnvyt5vWe/BuzbAruSBzQ ScTw== X-Gm-Message-State: AOJu0YzdllmYctmmRf3pFmFDuhlu6zrIcZYYUZpprkMSFnFSGWvq+7iS R6e6XP/HuHqHx9/XwB1JtMw8SJSvH91/BVi+0nQ= X-Google-Smtp-Source: AGHT+IHFQ4EkSxqGoIHbB3RTkajHV65iDPmkwyK8//RmWZ/Es18IkKBG7rDeZKso01u/y6Hc30fE8Q== X-Received: by 2002:a05:6870:c21e:b0:1bb:7d24:eabb with SMTP id z30-20020a056870c21e00b001bb7d24eabbmr18856215oae.0.1693991847936; Wed, 06 Sep 2023 02:17:27 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, philmd@linaro.org, Daniel Henrique Barboza Subject: [PATCH v2 10/19] target/riscv: remove kvm-stub.c Date: Wed, 6 Sep 2023 06:16:37 -0300 Message-ID: <20230906091647.1667171-11-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230906091647.1667171-1-dbarboza@ventanamicro.com> References: <20230906091647.1667171-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:4860:4864:20::2d; envelope-from=dbarboza@ventanamicro.com; helo=mail-oa1-x2d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1693992109487100003 Content-Type: text/plain; charset="utf-8" This file is not needed for some time now. All the stubs implemented in it (kvm_riscv_reset_vcpu() and kvm_riscv_set_irq()) are wrapped in 'if kvm_enabled()' blocks that the compiler will rip it out in non-KVM builds. We'll also add non-KVM stubs for all functions declared in kvm_riscv.h. All stubs are implemented as g_asserted_not_reached(), meaning that we won't support them in non-KVM builds. This is done by other kvm headers like kvm_arm.h and kvm_ppc.h. Signed-off-by: Daniel Henrique Barboza --- target/riscv/kvm-stub.c | 30 ------------------------------ target/riscv/kvm_riscv.h | 31 +++++++++++++++++++++++++++++++ target/riscv/meson.build | 2 +- 3 files changed, 32 insertions(+), 31 deletions(-) delete mode 100644 target/riscv/kvm-stub.c diff --git a/target/riscv/kvm-stub.c b/target/riscv/kvm-stub.c deleted file mode 100644 index 4e8fc31a21..0000000000 --- a/target/riscv/kvm-stub.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * QEMU KVM RISC-V specific function stubs - * - * Copyright (c) 2020 Huawei Technologies Co., Ltd - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2 or later, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License f= or - * more details. - * - * You should have received a copy of the GNU General Public License along= with - * this program. If not, see . - */ -#include "qemu/osdep.h" -#include "cpu.h" -#include "kvm_riscv.h" - -void kvm_riscv_reset_vcpu(RISCVCPU *cpu) -{ - abort(); -} - -void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level) -{ - abort(); -} diff --git a/target/riscv/kvm_riscv.h b/target/riscv/kvm_riscv.h index f6501e68e2..c9ecd9a967 100644 --- a/target/riscv/kvm_riscv.h +++ b/target/riscv/kvm_riscv.h @@ -19,6 +19,7 @@ #ifndef QEMU_KVM_RISCV_H #define QEMU_KVM_RISCV_H =20 +#ifdef CONFIG_KVM void kvm_riscv_cpu_add_kvm_properties(Object *obj); void kvm_riscv_reset_vcpu(RISCVCPU *cpu); void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level); @@ -27,5 +28,35 @@ void kvm_riscv_aia_create(MachineState *machine, uint64_= t group_shift, uint64_t aplic_base, uint64_t imsic_base, uint64_t guest_num); void riscv_kvm_aplic_request(void *opaque, int irq, int level); +#else +static inline void kvm_riscv_cpu_add_kvm_properties(Object *obj) +{ + g_assert_not_reached(); +} + +static inline void kvm_riscv_reset_vcpu(RISCVCPU *cpu) +{ + g_assert_not_reached(); +} + +static inline void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level) +{ + g_assert_not_reached(); +} + +static inline void kvm_riscv_aia_create(MachineState *machine, + uint64_t group_shift, uint64_t aia_irq_num, + uint64_t aia_msi_num, uint64_t aplic_base, + uint64_t imsic_base, uint64_t guest_num) +{ + g_assert_not_reached(); +} + +static inline void riscv_kvm_aplic_request(void *opaque, int irq, int leve= l) +{ + g_assert_not_reached(); +} + +#endif /* CONFIG_KVM */ =20 #endif diff --git a/target/riscv/meson.build b/target/riscv/meson.build index f0486183fa..3323b78b84 100644 --- a/target/riscv/meson.build +++ b/target/riscv/meson.build @@ -24,7 +24,7 @@ riscv_ss.add(files( 'zce_helper.c', 'vcrypto_helper.c' )) -riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files(= 'kvm-stub.c')) +riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c')) =20 riscv_system_ss =3D ss.source_set() riscv_system_ss.add(files( --=20 2.41.0