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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1142; envelope-from=gourry.memverge@gmail.com; helo=mail-yw1-x1142.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_12_24=1.049, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1694044197970100001 Content-Type: text/plain; charset="utf-8" Preparation for allowing devices to define their own CCI commands Signed-off-by: Gregory Price --- hw/cxl/cxl-mailbox-utils.c | 30 +++++++++++++----------------- include/hw/cxl/cxl_mailbox.h | 18 ++++++++++++++++++ 2 files changed, 31 insertions(+), 17 deletions(-) create mode 100644 include/hw/cxl/cxl_mailbox.h diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index 4e8651ebe2..b64bbdf45d 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -12,6 +12,7 @@ #include "hw/pci/msix.h" #include "hw/cxl/cxl.h" #include "hw/cxl/cxl_events.h" +#include "hw/cxl/cxl_mailbox.h" #include "hw/pci/pci.h" #include "hw/pci-bridge/cxl_upstream_port.h" #include "qemu/cutils.h" @@ -1561,28 +1562,21 @@ static CXLRetCode cmd_dcd_release_dyn_cap(const str= uct cxl_cmd *cmd, return CXL_MBOX_SUCCESS; } =20 -#define IMMEDIATE_CONFIG_CHANGE (1 << 1) -#define IMMEDIATE_DATA_CHANGE (1 << 2) -#define IMMEDIATE_POLICY_CHANGE (1 << 3) -#define IMMEDIATE_LOG_CHANGE (1 << 4) -#define SECURITY_STATE_CHANGE (1 << 5) -#define BACKGROUND_OPERATION (1 << 6) - static const struct cxl_cmd cxl_cmd_set[256][256] =3D { [EVENTS][GET_RECORDS] =3D { "EVENTS_GET_RECORDS", cmd_events_get_records, 1, 0 }, [EVENTS][CLEAR_RECORDS] =3D { "EVENTS_CLEAR_RECORDS", - cmd_events_clear_records, ~0, IMMEDIATE_LOG_CHANGE }, + cmd_events_clear_records, ~0, CXL_MBOX_IMMEDIATE_LOG_CHANGE }, [EVENTS][GET_INTERRUPT_POLICY] =3D { "EVENTS_GET_INTERRUPT_POLICY", cmd_events_get_interrupt_policy, 0, = 0 }, [EVENTS][SET_INTERRUPT_POLICY] =3D { "EVENTS_SET_INTERRUPT_POLICY", cmd_events_set_interrupt_policy, - ~0, IMMEDIATE_CONFIG_CHANGE }, + ~0, CXL_MBOX_IMMEDIATE_CONFIG_CHANGE= }, [FIRMWARE_UPDATE][GET_INFO] =3D { "FIRMWARE_UPDATE_GET_INFO", cmd_firmware_update_get_info, 0, 0 }, [TIMESTAMP][GET] =3D { "TIMESTAMP_GET", cmd_timestamp_get, 0, 0 }, [TIMESTAMP][SET] =3D { "TIMESTAMP_SET", cmd_timestamp_set, 8, - IMMEDIATE_POLICY_CHANGE }, + CXL_MBOX_IMMEDIATE_POLICY_CHANGE }, [LOGS][GET_SUPPORTED] =3D { "LOGS_GET_SUPPORTED", cmd_logs_get_support= ed, 0, 0 }, [LOGS][GET_LOG] =3D { "LOGS_GET_LOG", cmd_logs_get_log, 0x18, 0 }, [IDENTIFY][MEMORY_DEVICE] =3D { "IDENTIFY_MEMORY_DEVICE", @@ -1591,9 +1585,11 @@ static const struct cxl_cmd cxl_cmd_set[256][256] = =3D { cmd_ccls_get_partition_info, 0, 0 }, [CCLS][GET_LSA] =3D { "CCLS_GET_LSA", cmd_ccls_get_lsa, 8, 0 }, [CCLS][SET_LSA] =3D { "CCLS_SET_LSA", cmd_ccls_set_lsa, - ~0, IMMEDIATE_CONFIG_CHANGE | IMMEDIATE_DATA_CHANGE }, + ~0, CXL_MBOX_IMMEDIATE_CONFIG_CHANGE | CXL_MBOX_IMMEDIATE_DATA_CHA= NGE }, [SANITIZE][OVERWRITE] =3D { "SANITIZE_OVERWRITE", cmd_sanitize_overwri= te, 0, - IMMEDIATE_DATA_CHANGE | SECURITY_STATE_CHANGE | BACKGROUND_OPERATI= ON }, + (CXL_MBOX_IMMEDIATE_DATA_CHANGE | + CXL_MBOX_SECURITY_STATE_CHANGE | + CXL_MBOX_BACKGROUND_OPERATION)}, [PERSISTENT_MEM][GET_SECURITY_STATE] =3D { "GET_SECURITY_STATE", cmd_get_security_state, 0, 0 }, [MEDIA_AND_POISON][GET_POISON_LIST] =3D { "MEDIA_AND_POISON_GET_POISON= _LIST", @@ -1612,10 +1608,10 @@ static const struct cxl_cmd cxl_cmd_set_dcd[256][25= 6] =3D { 8, 0 }, [DCD_CONFIG][ADD_DYN_CAP_RSP] =3D { "ADD_DCD_DYNAMIC_CAPACITY_RESPONSE", cmd_dcd_add_dyn_cap_rsp, - ~0, IMMEDIATE_DATA_CHANGE }, + ~0, CXL_MBOX_IMMEDIATE_DATA_CHANGE }, [DCD_CONFIG][RELEASE_DYN_CAP] =3D { "RELEASE_DCD_DYNAMIC_CAPACITY", cmd_dcd_release_dyn_cap, - ~0, IMMEDIATE_DATA_CHANGE }, + ~0, CXL_MBOX_IMMEDIATE_DATA_CHANGE }, }; =20 static const struct cxl_cmd cxl_cmd_set_sw[256][256] =3D { @@ -1628,7 +1624,7 @@ static const struct cxl_cmd cxl_cmd_set_sw[256][256] = =3D { */ [TIMESTAMP][GET] =3D { "TIMESTAMP_GET", cmd_timestamp_get, 0, 0 }, [TIMESTAMP][SET] =3D { "TIMESTAMP_SET", cmd_timestamp_set, 8, - IMMEDIATE_POLICY_CHANGE }, + CXL_MBOX_IMMEDIATE_POLICY_CHANGE }, [LOGS][GET_SUPPORTED] =3D { "LOGS_GET_SUPPORTED", cmd_logs_get_support= ed, 0, 0 }, [LOGS][GET_LOG] =3D { "LOGS_GET_LOG", cmd_logs_get_log, 0x18, 0 }, @@ -1670,7 +1666,7 @@ int cxl_process_cci_message(CXLCCI *cci, uint8_t set,= uint8_t cmd, } =20 /* Only one bg command at a time */ - if ((cxl_cmd->effect & BACKGROUND_OPERATION) && + if ((cxl_cmd->effect & CXL_MBOX_BACKGROUND_OPERATION) && cci->bg.runtime > 0) { return CXL_MBOX_BUSY; } @@ -1691,7 +1687,7 @@ int cxl_process_cci_message(CXLCCI *cci, uint8_t set,= uint8_t cmd, } =20 ret =3D (*h)(cxl_cmd, pl_in, len_in, pl_out, len_out, cci); - if ((cxl_cmd->effect & BACKGROUND_OPERATION) && + if ((cxl_cmd->effect & CXL_MBOX_BACKGROUND_OPERATION) && ret =3D=3D CXL_MBOX_BG_STARTED) { *bg_started =3D true; } else { diff --git a/include/hw/cxl/cxl_mailbox.h b/include/hw/cxl/cxl_mailbox.h new file mode 100644 index 0000000000..beb048052e --- /dev/null +++ b/include/hw/cxl/cxl_mailbox.h @@ -0,0 +1,18 @@ +/* + * QEMU CXL Mailbox + * + * This work is licensed under the terms of the GNU GPL, version 2. See the + * COPYING file in the top-level directory. + */ + +#ifndef CXL_MAILBOX_H +#define CXL_MAILBOX_H + +#define CXL_MBOX_IMMEDIATE_CONFIG_CHANGE (1 << 1) +#define CXL_MBOX_IMMEDIATE_DATA_CHANGE (1 << 2) +#define CXL_MBOX_IMMEDIATE_POLICY_CHANGE (1 << 3) +#define CXL_MBOX_IMMEDIATE_LOG_CHANGE (1 << 4) +#define CXL_MBOX_SECURITY_STATE_CHANGE (1 << 5) +#define CXL_MBOX_BACKGROUND_OPERATION (1 << 6) + +#endif --=20 2.39.1 From nobody Thu May 16 19:33:22 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1694044136; cv=none; d=zohomail.com; s=zohoarc; b=CLxoAeDa0XqHRYORHKg8A7qHmkN1pYE8xVl2m1AONtAQExaHdjRUaqKknru5JPr/rYVy1aABPJ8s/3xfTlbP+4phNsoPzv2cAdmHiRdBpB5daim8jlVPQ2PexvyQAFlsKLT340LECmUH0i/myp5foUBCDKUaHNA8jZJrw77Ja5s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1694044136; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=6pq4K1DRMCsdduEbuGuJ200122U1I+V8+TOdtq9hf9Q=; b=LZsK9/fCpnDrKqN3wh3ceSVidnh3RZ/enwqq5tlbJn33Adr5/GbyAGq7Ld2odoer2bzxegp/VWhKw66LmscET4XhjDay0OKx1qxGYw9c5lRQPP5nLSkftqjkflF4lFaqau9iMlomKRYKnjiA16f+OCsylMiOxJ4oWjoNukm6pv0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1694044136871108.86223253668572; Wed, 6 Sep 2023 16:48:56 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qe2Fj-0006BS-0H; Wed, 06 Sep 2023 19:48:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qe2Fh-0006BJ-1Z for qemu-devel@nongnu.org; Wed, 06 Sep 2023 19:48:05 -0400 Received: from mail-yw1-x1143.google.com ([2607:f8b0:4864:20::1143]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qe2Fe-0006ab-Qs for qemu-devel@nongnu.org; Wed, 06 Sep 2023 19:48:04 -0400 Received: by mail-yw1-x1143.google.com with SMTP id 00721157ae682-59288c68eb8so4560417b3.0 for ; Wed, 06 Sep 2023 16:48:02 -0700 (PDT) Received: from fedora.mshome.net (pool-173-79-56-208.washdc.fios.verizon.net. [173.79.56.208]) by smtp.gmail.com with ESMTPSA id v191-20020a8148c8000000b005832fe29034sm332107ywa.89.2023.09.06.16.48.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Sep 2023 16:48:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1694044081; x=1694648881; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6pq4K1DRMCsdduEbuGuJ200122U1I+V8+TOdtq9hf9Q=; b=GBmv1XSkLCSk58eQtyQWGP8VnxCoicbB6KK6a/mSgmApPFqHtzl9zihOiOpW5F+Cp6 s5L24t69tQkewPmjfSJHmltxln9f3FsORD2c7SWb+vq5tVO237cMd2gZXs5yWqWIMMyN aN3DCfWTUzaqS0yKjR3wsu+wFbikvggXssP8i9vQsEIrnKXFrp3cr32sK9dmhpfSX70/ hSgL0h7dphBawG09gPloKDFEYkwBfgrwux5uCC1X9nhMOR5KWrvrRzMsGCNSDJ9hWUqH ygLZuAOoWeqOrB5PLQo/oyDBHBiJZ8RuNZ4Vy74nTs9UtI9DMtp2jSbPjRHomFa9Eua2 mpgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1694044081; x=1694648881; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6pq4K1DRMCsdduEbuGuJ200122U1I+V8+TOdtq9hf9Q=; b=LjdeoWHWrLBLE4HJE2rLcaatYQ+wXzcshpxcJzwTc4ji5eUfDDja33olhO//cO5Jr+ PSt95OaP9MWH679K3L+twc1zCQIh1X049e2D6T06VCcoYtOIdeXPePT2+f0biF8YxgBn zGNpm2K17jidSFcH7aB3UXk2rPKegHw2XKcj9iQsOnALOHRCA5z3/PWUiszqB9F+WujN nFd4nywTFE0pfTeOxUKrmFGeA54/TLKdm9ixs0bGHa2oPE68KWQfW75eUHtuQlsHUFG5 +hSLApvy6OmIz6swfmeJNK+VZeBZgCCGU1x3ynQYDD1bonTfw1t/0Ypez2e/18jnrZ3u DNfw== X-Gm-Message-State: AOJu0Yxo9+rxtGAhZbiGsyXOEzr7nC5JBtdl5JOoVFe0rCqZdjp3y96C bZC2BrGXgVyV8qtzJoRZ/NeqJWzQ9hrt X-Google-Smtp-Source: AGHT+IH/ubpKztgn1qDvJM/VkrWOg2yBzVO3CflsLQdbMmkZBe+KAhcEoIrZzMeoczKFrs8vbymL6Q== X-Received: by 2002:a0d:d685:0:b0:589:db22:bfd6 with SMTP id y127-20020a0dd685000000b00589db22bfd6mr19575436ywd.40.1694044081583; Wed, 06 Sep 2023 16:48:01 -0700 (PDT) From: Gregory Price X-Google-Original-From: Gregory Price To: qemu-devel@nongnu.org Cc: jonathan.cameron@huawei.com, linux-cxl@vger.kernel.org, junhee.ryu@sk.com, kwangjin.ko@sk.com, Gregory Price Subject: [PATCH v3 2/6] cxl/type3: Cleanup multiple CXL_TYPE3() calls in read/write functions Date: Tue, 5 Sep 2023 20:15:13 -0400 Message-Id: <20230906001517.324380-3-gregory.price@memverge.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230906001517.324380-1-gregory.price@memverge.com> References: <20230906001517.324380-1-gregory.price@memverge.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1143; envelope-from=gourry.memverge@gmail.com; helo=mail-yw1-x1143.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_12_24=1.049, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1694044138630100009 Content-Type: text/plain; charset="utf-8" Call CXL_TYPE3 once at top of function to avoid multiple invocations. Signed-off-by: Gregory Price --- hw/mem/cxl_type3.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index fd9d134d46..80d596ee10 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -1248,17 +1248,18 @@ static int cxl_type3_hpa_to_as_and_dpa(CXLType3Dev = *ct3d, MemTxResult cxl_type3_read(PCIDevice *d, hwaddr host_addr, uint64_t *data, unsigned size, MemTxAttrs attrs) { + CXLType3Dev *ct3d =3D CXL_TYPE3(d); uint64_t dpa_offset =3D 0; AddressSpace *as =3D NULL; int res; =20 - res =3D cxl_type3_hpa_to_as_and_dpa(CXL_TYPE3(d), host_addr, size, + res =3D cxl_type3_hpa_to_as_and_dpa(ct3d, host_addr, size, &as, &dpa_offset); if (res) { return MEMTX_ERROR; } =20 - if (sanitize_running(&CXL_TYPE3(d)->cci)) { + if (sanitize_running(&ct3d->cci)) { qemu_guest_getrandom_nofail(data, size); return MEMTX_OK; } @@ -1268,16 +1269,17 @@ MemTxResult cxl_type3_read(PCIDevice *d, hwaddr hos= t_addr, uint64_t *data, MemTxResult cxl_type3_write(PCIDevice *d, hwaddr host_addr, uint64_t data, unsigned size, MemTxAttrs attrs) { + CXLType3Dev *ct3d =3D CXL_TYPE3(d); uint64_t dpa_offset =3D 0; AddressSpace *as =3D NULL; int res; =20 - res =3D cxl_type3_hpa_to_as_and_dpa(CXL_TYPE3(d), host_addr, size, + res =3D cxl_type3_hpa_to_as_and_dpa(ct3d, host_addr, size, &as, &dpa_offset); if (res) { return MEMTX_ERROR; } - if (sanitize_running(&CXL_TYPE3(d)->cci)) { + if (sanitize_running(&ct3d->cci)) { return MEMTX_OK; } return address_space_write(as, dpa_offset, attrs, &data, size); --=20 2.39.1 From nobody Thu May 16 19:33:22 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1694044171; cv=none; d=zohomail.com; s=zohoarc; b=RB44Yb7u4UwFgHqH2ijnB5wfbVeeqWi3R4TgtgPRaYiPby8MMzYfON4ySk4MGiNtkf2m6jaS59OSZHY/oJnhKw+8ucOw4upLbBslRkSAJ7l54xgEZvkyLQQezKw9VXSWksHxw/c+5ydTu7miprulc9CpaM6ZOwAu3fidVlMNoXw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1694044171; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=b2cy+GLqlTQ8dVdKP4BOlp5an3Yg4Ivxw3bTV+3I6Rc=; b=ZD10Y4ZiBFpokY1D3rz6wqVFLTeueEj3/Ri7G+IoUUASehjr2Cu+NeDsXmwIZIU8v3ZVDoxSnutFj5mGCN7HvoQLEjXLHyKNeUK1bHjaC/deC3cEhLEuuPIabl3Dwd4zetBW6w+4fQV4GLFd1pUFzCLoyWb+CPl1weJa6MBY1zg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1694044171245914.4149029057984; Wed, 6 Sep 2023 16:49:31 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qe2Fw-0006EB-TE; Wed, 06 Sep 2023 19:48:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qe2Fp-0006CY-8N for qemu-devel@nongnu.org; Wed, 06 Sep 2023 19:48:13 -0400 Received: from mail-yw1-x1141.google.com ([2607:f8b0:4864:20::1141]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qe2Fg-0006b0-0A for qemu-devel@nongnu.org; Wed, 06 Sep 2023 19:48:06 -0400 Received: by mail-yw1-x1141.google.com with SMTP id 00721157ae682-5920efd91c7so4332307b3.2 for ; Wed, 06 Sep 2023 16:48:03 -0700 (PDT) Received: from fedora.mshome.net (pool-173-79-56-208.washdc.fios.verizon.net. [173.79.56.208]) by smtp.gmail.com with ESMTPSA id v191-20020a8148c8000000b005832fe29034sm332107ywa.89.2023.09.06.16.48.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Sep 2023 16:48:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1694044083; x=1694648883; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=b2cy+GLqlTQ8dVdKP4BOlp5an3Yg4Ivxw3bTV+3I6Rc=; b=QwrQXgio/zJ6uUQ5YVGKTBuvA9DwjsnqB8EN1hxDHGZbJuPNhZLI1qjCkMpnBFRU1H Ole1t+ze5LWmVjQS/BI2172SLjBctPGmusobYmMnuYJFReieeKvGT0eUPyefy+UjvFPy rO2U+v5a6O9oi4QbdvrBwfkDT79PPIcj/3fuXGxkj/Iu7g27zPX3aJMEuw5hfH2So4Vn BB0k7TGRoiRV9kNShdG9++Ar8XFBnuxaKG5DKNH8ndk3yugTxkKtuzj/vSobntWZEC0x Y9+0mlMWXzHICPizB0wHBMJJ7y1LGdw+W1rWti4RCGIio7ILxlxqtpiEqyDBzfGB8JDs gRGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1694044083; x=1694648883; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=b2cy+GLqlTQ8dVdKP4BOlp5an3Yg4Ivxw3bTV+3I6Rc=; b=QUuAqnMqriZbefDhrswqVUvBjcDLWaklJKTVHZMSPDVxVkdw0TH0VNxE0lJeqaQa0T pGMl7X0x6FyyTfE79E6f6mBWmeSOuVoY67KhVo+oTgMyo9RO7YEhGaXAD5xPNyJFSRA4 p96O5Sj5L2kvVhQcAuNO4Jjtr/m0T2MVMoFPG0bk/ACIy47SbCTlWtF9ATNCpwdk16UM RuuuDKb14TvhltwNy8/HsutOViFlNFWUUpQBTFM6lcaB3eHbbEJFml9JBjSSnAKZSbCB OBsxWlAvi3X5x2+xcGxFgL8FF3VYiunQZTtdmmmk1nFFBtIk2to7IOLZk4CsaFt44iGi oYmw== X-Gm-Message-State: AOJu0YxYb7vgsZ8FLnNUUxnl6EjNj/LUQXX7HAc6Ct1MAOZLBXa8gRyD RFkdAnPrFHepDov+DxPaXOQ75kvQR+Mr X-Google-Smtp-Source: AGHT+IESDAYo5PwejGWmAa/zJuBVeaLBycSjoUBB5CtYMOrj5c0JbFybviSnNXYCgPHTFNu2LuPikg== X-Received: by 2002:a81:48ce:0:b0:58c:5299:8033 with SMTP id v197-20020a8148ce000000b0058c52998033mr17140659ywa.17.1694044082780; Wed, 06 Sep 2023 16:48:02 -0700 (PDT) From: Gregory Price X-Google-Original-From: Gregory Price To: qemu-devel@nongnu.org Cc: jonathan.cameron@huawei.com, linux-cxl@vger.kernel.org, junhee.ryu@sk.com, kwangjin.ko@sk.com, Gregory Price Subject: [PATCH v3 3/6] cxl/type3: Expose ct3 functions so that inheriters can call them Date: Tue, 5 Sep 2023 20:15:14 -0400 Message-Id: <20230906001517.324380-4-gregory.price@memverge.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230906001517.324380-1-gregory.price@memverge.com> References: <20230906001517.324380-1-gregory.price@memverge.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1141; envelope-from=gourry.memverge@gmail.com; helo=mail-yw1-x1141.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_12_24=1.049, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1694044172477100001 Content-Type: text/plain; charset="utf-8" For devices built on top of ct3, we need the init, realize, and exit functions exposed to correctly start up and tear down. Signed-off-by: Gregory Price --- hw/mem/cxl_type3.c | 6 +++--- include/hw/cxl/cxl_device.h | 4 ++++ 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 80d596ee10..6e3309dc11 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -950,7 +950,7 @@ static DOEProtocol doe_spdm_prot[] =3D { { } }; =20 -static void ct3_realize(PCIDevice *pci_dev, Error **errp) +void ct3_realize(PCIDevice *pci_dev, Error **errp) { CXLType3Dev *ct3d =3D CXL_TYPE3(pci_dev); CXLComponentState *cxl_cstate =3D &ct3d->cxl_cstate; @@ -1054,7 +1054,7 @@ err_address_space_free: return; } =20 -static void ct3_exit(PCIDevice *pci_dev) +void ct3_exit(PCIDevice *pci_dev) { CXLType3Dev *ct3d =3D CXL_TYPE3(pci_dev); CXLComponentState *cxl_cstate =3D &ct3d->cxl_cstate; @@ -1285,7 +1285,7 @@ MemTxResult cxl_type3_write(PCIDevice *d, hwaddr host= _addr, uint64_t data, return address_space_write(as, dpa_offset, attrs, &data, size); } =20 -static void ct3d_reset(DeviceState *dev) +void ct3d_reset(DeviceState *dev) { CXLType3Dev *ct3d =3D CXL_TYPE3(dev); uint32_t *reg_state =3D ct3d->cxl_cstate.crb.cache_mem_registers; diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index e824c5ade8..9c37a54699 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -524,6 +524,10 @@ MemTxResult cxl_type3_read(PCIDevice *d, hwaddr host_a= ddr, uint64_t *data, MemTxResult cxl_type3_write(PCIDevice *d, hwaddr host_addr, uint64_t data, unsigned size, MemTxAttrs attrs); =20 +void ct3_realize(PCIDevice *pci_dev, Error **errp); +void ct3_exit(PCIDevice *pci_dev); +void ct3d_reset(DeviceState *d); + uint64_t cxl_device_get_timestamp(CXLDeviceState *cxlds); =20 void cxl_event_init(CXLDeviceState *cxlds, int start_msg_num); --=20 2.39.1 From nobody Thu May 16 19:33:22 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1694044155; cv=none; d=zohomail.com; s=zohoarc; b=ZrRhOe1OLIr3uJ4eN7Zc/hWHIwHvEtVrx/nDpL9GY+cbfbfoFJbP5iBKpKmx9Q2Jfyt6/qmWKtlUEV1mQvRd6FnqHy2BJixn80q8WrxxhuA8o/gPg3PvgIMBFAWkN5/01Iz1Pk8WHUaOL4S6b9reifDpatMEXQm1N16MNlR5j5I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1694044155; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=9uQCHpegy+Oy5ZTt5LqLlsA06JmldqXw1wStxlifsWA=; b=MVyhjzyJ/Gq9WllCRQCs5inz3c25SvScOP4cDB86V3J/7GFRXrWfQrmxD54pV6Ee0M9tYl0pEQRqrOLhJCpV/P3h3XmsWE2EcuPzmS1k4+6ASjZTVLVj7ZuC7bTcdEzOclbM1Wu2HwjJgTOjXMWRclVjsFiiO9cOS1x+p2zSkH0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1694044155788660.3577727755456; Wed, 6 Sep 2023 16:49:15 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qe2Fw-0006Dz-Mj; Wed, 06 Sep 2023 19:48:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qe2Fr-0006Cy-75 for qemu-devel@nongnu.org; Wed, 06 Sep 2023 19:48:16 -0400 Received: from mail-yw1-x1141.google.com ([2607:f8b0:4864:20::1141]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qe2Fi-0006bH-4Q for qemu-devel@nongnu.org; Wed, 06 Sep 2023 19:48:14 -0400 Received: by mail-yw1-x1141.google.com with SMTP id 00721157ae682-594f8a7125cso4609917b3.0 for ; Wed, 06 Sep 2023 16:48:04 -0700 (PDT) Received: from fedora.mshome.net (pool-173-79-56-208.washdc.fios.verizon.net. [173.79.56.208]) by smtp.gmail.com with ESMTPSA id v191-20020a8148c8000000b005832fe29034sm332107ywa.89.2023.09.06.16.48.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Sep 2023 16:48:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1694044084; x=1694648884; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9uQCHpegy+Oy5ZTt5LqLlsA06JmldqXw1wStxlifsWA=; b=pt64Oar1KzOoLybv6VGQxkdFllNWYL510cqNin/3+6a91MhI3UjX35KO6Oi+YAMUl0 kT2RArw0Uijfpn5325Yd0VsEPvRLHvNyb9t8yOuR9BNCHM69r3VtmXDVKFapj/ReQrXG fbOW7YiuHejpPGPgEsIOLlt8d4XA1C4+kI2qeXstdLrUYyrHk1gNYGacR6EDfpXersVY udQMVRsVE3xF1y3eUuGsEP9vf03n7DOolR0HNbaHj4YQm91Jr0bRs55iSdiz8JmeOOk5 bQF5gmsKozhmf/cXrfILXE4LQNLpT+5S/GR2ZiB3Nirq5U16QULrWQX9gzBLkMJIzvpr Slyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1694044084; x=1694648884; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9uQCHpegy+Oy5ZTt5LqLlsA06JmldqXw1wStxlifsWA=; b=gfKUZXbrEdzTH9ITepPEYYlyLL+dcwGOTZwic9YgQUlN1nNd3yk2rVoSy+xs8h3EFR UH6rOId7n7TWC6Fw+qtQgOSKa7fyrHD3lUnhRMwWuKFJqbx91IsgIRux6EyF15TcMewe UzhowuNyHWTEff8VDQ2eGfvsVh4zAMLXianbuG4Tvfswv7QvKqX+1/8DxlspVhqo78fk lD7qWih16ZCTRBH8YUtVY3Zs9ECTNrV1XSNIM/4tZyEg7PIFb3bq3vwext6n+5/BPDxd U+o3nUt8P6fto9hwQjLsApAoLzlAFhF7nh0j9yu+S9ifPq4z3FJISbSoImCUeu6SQQTO sEhA== X-Gm-Message-State: AOJu0YzlgJrlMdufYU2m6b2rha4VcxBEty/lDQAGFoajmNHpk1p+ZWcs XXC5+i0MUW2rbZpupR786Ct53YyXB/JP X-Google-Smtp-Source: AGHT+IFMy7ES3j3wkZBhB84OxrmgRJ49qRnJ/3RREn/RM8HAdptZWVyJVzSNKZvrqdGYNDc9F4CBHg== X-Received: by 2002:a0d:d3c1:0:b0:577:25dc:c1fc with SMTP id v184-20020a0dd3c1000000b0057725dcc1fcmr16551998ywd.0.1694044083835; Wed, 06 Sep 2023 16:48:03 -0700 (PDT) From: Gregory Price X-Google-Original-From: Gregory Price To: qemu-devel@nongnu.org Cc: jonathan.cameron@huawei.com, linux-cxl@vger.kernel.org, junhee.ryu@sk.com, kwangjin.ko@sk.com, Gregory Price Subject: [PATCH v3 4/6] cxl/type3: add an optional mhd validation function for memory accesses Date: Tue, 5 Sep 2023 20:15:15 -0400 Message-Id: <20230906001517.324380-5-gregory.price@memverge.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230906001517.324380-1-gregory.price@memverge.com> References: <20230906001517.324380-1-gregory.price@memverge.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1141; envelope-from=gourry.memverge@gmail.com; helo=mail-yw1-x1141.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_12_24=1.049, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1694044156352100007 Content-Type: text/plain; charset="utf-8" When memory accesses are made, some MHSLD's would validate the address is within the scope of allocated sections. To do this, the base device must call an optional function set by inherited devices. Signed-off-by: Gregory Price --- hw/mem/cxl_type3.c | 15 +++++++++++++++ include/hw/cxl/cxl_device.h | 3 +++ 2 files changed, 18 insertions(+) diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 6e3309dc11..1fb3ffeca8 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -1034,6 +1034,7 @@ void ct3_realize(PCIDevice *pci_dev, Error **errp) goto err_release_cdat; } } + return; =20 err_release_cdat: @@ -1249,6 +1250,7 @@ MemTxResult cxl_type3_read(PCIDevice *d, hwaddr host_= addr, uint64_t *data, unsigned size, MemTxAttrs attrs) { CXLType3Dev *ct3d =3D CXL_TYPE3(d); + CXLType3Class *cvc =3D CXL_TYPE3_GET_CLASS(ct3d); uint64_t dpa_offset =3D 0; AddressSpace *as =3D NULL; int res; @@ -1259,6 +1261,11 @@ MemTxResult cxl_type3_read(PCIDevice *d, hwaddr host= _addr, uint64_t *data, return MEMTX_ERROR; } =20 + if (cvc->mhd_access_valid && + !cvc->mhd_access_valid(d, dpa_offset, size)) { + return MEMTX_ERROR; + } + if (sanitize_running(&ct3d->cci)) { qemu_guest_getrandom_nofail(data, size); return MEMTX_OK; @@ -1270,6 +1277,7 @@ MemTxResult cxl_type3_write(PCIDevice *d, hwaddr host= _addr, uint64_t data, unsigned size, MemTxAttrs attrs) { CXLType3Dev *ct3d =3D CXL_TYPE3(d); + CXLType3Class *cvc =3D CXL_TYPE3_GET_CLASS(ct3d); uint64_t dpa_offset =3D 0; AddressSpace *as =3D NULL; int res; @@ -1279,6 +1287,12 @@ MemTxResult cxl_type3_write(PCIDevice *d, hwaddr hos= t_addr, uint64_t data, if (res) { return MEMTX_ERROR; } + + if (cvc->mhd_access_valid && + !cvc->mhd_access_valid(d, dpa_offset, size)) { + return MEMTX_ERROR; + } + if (sanitize_running(&ct3d->cci)) { return MEMTX_OK; } @@ -2106,6 +2120,7 @@ static void ct3_class_init(ObjectClass *oc, void *dat= a) cvc->get_lsa =3D get_lsa; cvc->set_lsa =3D set_lsa; cvc->set_cacheline =3D set_cacheline; + cvc->mhd_access_valid =3D NULL; } =20 static const TypeInfo ct3d_info =3D { diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index 9c37a54699..37893f8626 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -506,6 +506,9 @@ struct CXLType3Class { void (*set_lsa)(CXLType3Dev *ct3d, const void *buf, uint64_t size, uint64_t offset); bool (*set_cacheline)(CXLType3Dev *ct3d, uint64_t dpa_offset, uint8_t = *data); + + /* Multi-headed Device */ + bool (*mhd_access_valid)(PCIDevice *d, uint64_t addr, unsigned int siz= e); }; =20 struct CSWMBCCIDev { --=20 2.39.1 From nobody Thu May 16 19:33:22 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1694044135919184.79973983951754; Wed, 6 Sep 2023 16:48:55 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qe2Fz-0006EI-TG; Wed, 06 Sep 2023 19:48:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qe2Fr-0006Cz-7y for qemu-devel@nongnu.org; Wed, 06 Sep 2023 19:48:16 -0400 Received: from mail-yw1-x1141.google.com ([2607:f8b0:4864:20::1141]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qe2Fm-0006bT-Tq for qemu-devel@nongnu.org; Wed, 06 Sep 2023 19:48:15 -0400 Received: by mail-yw1-x1141.google.com with SMTP id 00721157ae682-58fae4a5285so4269167b3.0 for ; Wed, 06 Sep 2023 16:48:05 -0700 (PDT) Received: from fedora.mshome.net (pool-173-79-56-208.washdc.fios.verizon.net. [173.79.56.208]) by smtp.gmail.com with ESMTPSA id v191-20020a8148c8000000b005832fe29034sm332107ywa.89.2023.09.06.16.48.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Sep 2023 16:48:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1694044085; x=1694648885; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=J3TXSZttiLwQUf7LpcHreKd5DddM8bjWjzB8x7ZghXc=; b=B5+Z3AqcRmKkZ/cPH8Gay62TF8S2aEX7ICblaGI89pnUfAt4+/AHwqm2NRqqLdzQro XFzGGhGM/Lt2J/mivHunNR8CqKubQB7LqTqJGXNMDTDC5lI78Wvu2aIYUWLIlC/STcWJ 63R69rEAfIS1d5ArBeXMNv5iCw86GCeNZNq1TPbW0CcxxSTmvWPtZET4wSX9A3IL2Lxt dQlXMcIuXiwPO07BzxzYNkuIiMp4y0oH2wFQF0DrEXT5WNuMXL86+eXFRGYeZafmOe3u soU/YITenXH6t6OQSQmGvpCbITuNtPrMAukkJePu2Z3C5eP+f4RNmQPM0q3znx+MTSXK PSKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1694044085; x=1694648885; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=J3TXSZttiLwQUf7LpcHreKd5DddM8bjWjzB8x7ZghXc=; b=gvFBgj1UyTcG9nSZ+u35DEHx0wsI5XOY9N0edBxEY0on5ZPmbzel1hTJvbIJfQAQPK 3RQ4QmBff1bjup28tX/TLH21B6uYjZCoeOsSOoJmIKmwth2D9BQuxD41UR+Fq1Oy8uSP U5OIz0t9DnsSrkbPqUk05BTfXDnQUcXbnSywfbdF2cSr8Tm5y0YqL208uJQCC7uiwXRX 2GoFO39q8CnXrifazPO1aQdNW1j9ZdBmeYOXER7eXaeG6jxzEzL1a/QTFU2cG0lI+jEk IBBVk1Z1En3tapdR/9a6vlF/X8f3nAFJ43XZpnYMQiwnmeyOEf4SEu5ZmOppmoM69ITS quxg== X-Gm-Message-State: AOJu0YxrG6I7zCWc5I3LXE72dPqZyqNVVwlb9g0yUo7SXHr4ylPCno6L NtlkpeA1GEdTbRerw4gmo5c46mHQs9m5 X-Google-Smtp-Source: AGHT+IFkOIfbSKj11YwpbzpzJ6Eum4HrDx9FlBBhPK+AeC3/cGJ9KHg82RM0QZl1Sr5foj/nyMhJqw== X-Received: by 2002:a05:690c:290b:b0:598:7885:7b7e with SMTP id eg11-20020a05690c290b00b0059878857b7emr14387412ywb.18.1694044084880; Wed, 06 Sep 2023 16:48:04 -0700 (PDT) From: Gregory Price X-Google-Original-From: Gregory Price To: qemu-devel@nongnu.org Cc: jonathan.cameron@huawei.com, linux-cxl@vger.kernel.org, junhee.ryu@sk.com, kwangjin.ko@sk.com, Gregory Price Subject: [PATCH v3 5/6] cxl/mailbox, type3: Implement MHD get info command callback Date: Tue, 5 Sep 2023 20:15:16 -0400 Message-Id: <20230906001517.324380-6-gregory.price@memverge.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230906001517.324380-1-gregory.price@memverge.com> References: <20230906001517.324380-1-gregory.price@memverge.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1141; envelope-from=gourry.memverge@gmail.com; helo=mail-yw1-x1141.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_12_24=1.049, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1694044138415100005 Content-Type: text/plain; charset="utf-8" For multi-headed type 3 devices, this command reports logical device mappings for each head. Implement a callback which can be initialized by MHD devices to field these commands. Reports "unsupported" if the command is called but the callback is not implemented. Signed-off-by: Gregory Price --- hw/cxl/cxl-mailbox-utils.c | 21 +++++++++++++++++++++ hw/mem/cxl_type3.c | 1 + include/hw/cxl/cxl_device.h | 6 ++++++ 3 files changed, 28 insertions(+) diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index b64bbdf45d..3177a59de3 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -91,6 +91,8 @@ enum { #define GET_PHYSICAL_PORT_STATE 0x1 TUNNEL =3D 0x53, #define MANAGEMENT_COMMAND 0x0 + MHD =3D 0x55, + #define GET_MHD_INFO 0x0 }; =20 /* CCI Message Format CXL r3.0 Figure 7-19 */ @@ -184,6 +186,23 @@ static CXLRetCode cmd_tunnel_management_cmd(const stru= ct cxl_cmd *cmd, return CXL_MBOX_INVALID_INPUT; } =20 +/* + * CXL r3.0 section 7.6.7.5.1 - Get Multi-Headed Info (Opcode 5500h) + */ +static CXLRetCode cmd_mhd_get_info(const struct cxl_cmd *cmd, + uint8_t *payload_in, size_t len_in, + uint8_t *payload_out, size_t *len_out, + CXLCCI *cci) +{ + CXLType3Dev *ct3d =3D CXL_TYPE3(cci->d); + CXLType3Class *cvc =3D CXL_TYPE3_GET_CLASS(ct3d); + if (cvc->mhd_get_info) { + return cvc->mhd_get_info(cmd, payload_in, len_in, payload_out, + len_out, cci); + } + return CXL_MBOX_UNSUPPORTED; +} + static CXLRetCode cmd_events_get_records(const struct cxl_cmd *cmd, uint8_t *payload_in, size_t len_i= n, uint8_t *payload_out, size_t *len= _out, @@ -1598,6 +1617,8 @@ static const struct cxl_cmd cxl_cmd_set[256][256] =3D= { cmd_media_inject_poison, 8, 0 }, [MEDIA_AND_POISON][CLEAR_POISON] =3D { "MEDIA_AND_POISON_CLEAR_POISON", cmd_media_clear_poison, 72, 0 }, + [MHD][GET_MHD_INFO] =3D {"GET_MULTI_HEADED_INFO", + cmd_mhd_get_info, 2, 0}, }; =20 static const struct cxl_cmd cxl_cmd_set_dcd[256][256] =3D { diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 1fb3ffeca8..307d7c1fd8 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -2120,6 +2120,7 @@ static void ct3_class_init(ObjectClass *oc, void *dat= a) cvc->get_lsa =3D get_lsa; cvc->set_lsa =3D set_lsa; cvc->set_cacheline =3D set_cacheline; + cvc->mhd_get_info =3D NULL; cvc->mhd_access_valid =3D NULL; } =20 diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index 37893f8626..4a5d4bd98b 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -508,6 +508,12 @@ struct CXLType3Class { bool (*set_cacheline)(CXLType3Dev *ct3d, uint64_t dpa_offset, uint8_t = *data); =20 /* Multi-headed Device */ + CXLRetCode (*mhd_get_info)(const struct cxl_cmd *cmd, + uint8_t *payload_in, + size_t len_in, + uint8_t *payload_out, + size_t *len_out, + CXLCCI *cci); bool (*mhd_access_valid)(PCIDevice *d, uint64_t addr, unsigned int siz= e); }; =20 --=20 2.39.1 From nobody Thu May 16 19:33:22 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1694044152; cv=none; d=zohomail.com; s=zohoarc; b=GD7Q7eCpo1zYdmum/nWdV4D7aGsRZfibiOl4VCSpVw7t12OYu350seVpmmctJuytMXynC44+wksCWKwSmC0HV7P5B1VBS5GdeBl7hF31iuLuV2NkQAWFF24p+Pm2XN1IyaDZs6BUV59T35oFb4XMaHu9WB9QX1zBamRXmEYO3qU= ARC-Message-Signature: i=1; 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[173.79.56.208]) by smtp.gmail.com with ESMTPSA id v191-20020a8148c8000000b005832fe29034sm332107ywa.89.2023.09.06.16.48.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Sep 2023 16:48:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1694044086; x=1694648886; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XtXC+mUtUZocS4KyX8ZKRklF8M8UO3i1a1QuG7VXsdM=; b=KDM58MouWKfsSnKIlRr1OqbwvPl3cs9PEA+gufHL/xlkQNVlHjJNVxAJdpMYElWKNr Dwxke8W1WYcf5fN8b4kadQ+JRV4DPwcZ3/asZETy5XW2Ytod7Oh67W6o6joT7osAffW/ b+4wB8q4yHX7/oXC+3RvGIichNNUeTYY9ECbJJMmnqt8eSayJad6dGf1j7h5oqPKSVAf 4ciuCvjIxKBAEwDrcgm6Ln7pwJie56gsdv7BtqRT6ORRp4QVPbKVALkFdcLFK1VcNXIY jbmX1GoH41jwYhr5BdjTYpb7hTSddvpRewsIVl8iO2Vg8sqy7wjP8Xb4YeCo7xpKR9VD 1eyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1694044086; x=1694648886; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XtXC+mUtUZocS4KyX8ZKRklF8M8UO3i1a1QuG7VXsdM=; b=eMNZa/xxEMN5CRncjpNDEZFN6lhHsrLEOmWwt7n1wyOitvxOIoqMTfSWCl0ulnuEGB Pa8ZGxrNj7sMmSeM+46IHM3mtqcEBQLE/0k7W8eln5cy44cjx6wiosPPx05I4SdwixVo pD98snbnCn51zaWCYho4pmHgfNxhjDVA2HWeLxuaIgIWDbzHqRVzuUotQfj4kbbe1AKJ BzppDUw/jOMbKaZW6N2T4j+pcF2MwnskRTZ/LoDeSPDe0n3Jw14TP/lc4wTXD3dyWTfZ 4PklVJiIkmU+BpoCBp6iMXMAmiPcHYjkvuf8tQojsHwyVz+NZNPm/R2h409b+13StujH lL7g== X-Gm-Message-State: AOJu0YySwiDE7hwkb/Eovy3APw5fQpUBq0zEKwped/DpnyW7EReHFka9 HIhjM57xJnKrISg6UQIfcvdhCB1VdPoe X-Google-Smtp-Source: AGHT+IGE0qnuxfMmc2AC8w5sX75ZnXcDtLAkaIrswOpyHGKZNBOdjwJqeb0HTm/EZJZHNjjs+YKxvg== X-Received: by 2002:a81:fd07:0:b0:594:e6dc:71cc with SMTP id g7-20020a81fd07000000b00594e6dc71ccmr19873935ywn.48.1694044086071; Wed, 06 Sep 2023 16:48:06 -0700 (PDT) From: Gregory Price X-Google-Original-From: Gregory Price To: qemu-devel@nongnu.org Cc: jonathan.cameron@huawei.com, linux-cxl@vger.kernel.org, junhee.ryu@sk.com, kwangjin.ko@sk.com, Gregory Price Subject: [PATCH v3 6/6] cxl/vendor: SK hynix Niagara Multi-Headed SLD Device Date: Tue, 5 Sep 2023 20:15:17 -0400 Message-Id: <20230906001517.324380-7-gregory.price@memverge.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230906001517.324380-1-gregory.price@memverge.com> References: <20230906001517.324380-1-gregory.price@memverge.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1144; envelope-from=gourry.memverge@gmail.com; helo=mail-yw1-x1144.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_12_24=1.049, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1694044154318100001 Content-Type: text/plain; charset="utf-8" Create a new device to emulate the SK hynix Niagara MHSLD platform. This device has custom CCI commands that allow for applying isolation to each memory block between hosts. This enables an early form of dynamic capacity, whereby the NUMA node maps the entire region, but the host is responsible for asking the device which memory blocks are allocated to it, and therefore may be onlined. To instantiate: -device cxl-skh-niagara,cxl-type3,bus=3Drp0,volatile-memdev=3Dmem0,id=3Dcxl= -mem0,sn=3D66666,mhd-head=3D0,mhd-shmid=3D15 The linux kernel will require raw CXL commands enabled to allow for passing through of Niagara CXL commands via the CCI mailbox. The Niagara MH-SLD has a shared memory region that must be initialized using the 'init_niagara' tool located in the vendor subdirectory usage: init_niagara heads : number of heads on the device sections : number of sections section_size : size of a section in 128mb increments shmid : shmid produced by ipcmk Example: $shmid1=3Dipcmk -M 131072 ./init_niagara 4 32 1 $shmid1 Signed-off-by: Gregory Price --- hw/cxl/Kconfig | 4 + hw/cxl/meson.build | 2 + hw/cxl/vendor/meson.build | 1 + hw/cxl/vendor/skhynix/.gitignore | 1 + hw/cxl/vendor/skhynix/init_niagara.c | 99 +++++ hw/cxl/vendor/skhynix/meson.build | 1 + hw/cxl/vendor/skhynix/skhynix_niagara.c | 514 ++++++++++++++++++++++++ hw/cxl/vendor/skhynix/skhynix_niagara.h | 161 ++++++++ 8 files changed, 783 insertions(+) create mode 100644 hw/cxl/vendor/meson.build create mode 100644 hw/cxl/vendor/skhynix/.gitignore create mode 100644 hw/cxl/vendor/skhynix/init_niagara.c create mode 100644 hw/cxl/vendor/skhynix/meson.build create mode 100644 hw/cxl/vendor/skhynix/skhynix_niagara.c create mode 100644 hw/cxl/vendor/skhynix/skhynix_niagara.h diff --git a/hw/cxl/Kconfig b/hw/cxl/Kconfig index c9b2e46bac..dd6c54b54d 100644 --- a/hw/cxl/Kconfig +++ b/hw/cxl/Kconfig @@ -2,5 +2,9 @@ config CXL bool default y if PCI_EXPRESS =20 +config CXL_VENDOR + bool + default y + config I2C_MCTP_CXL bool diff --git a/hw/cxl/meson.build b/hw/cxl/meson.build index 1393821fc4..e8c8c1355a 100644 --- a/hw/cxl/meson.build +++ b/hw/cxl/meson.build @@ -15,3 +15,5 @@ system_ss.add(when: 'CONFIG_CXL', system_ss.add(when: 'CONFIG_I2C_MCTP_CXL', if_true: files('i2c_mctp_cxl.c'= )) =20 system_ss.add(when: 'CONFIG_ALL', if_true: files('cxl-host-stubs.c')) + +subdir('vendor') diff --git a/hw/cxl/vendor/meson.build b/hw/cxl/vendor/meson.build new file mode 100644 index 0000000000..12db8991f1 --- /dev/null +++ b/hw/cxl/vendor/meson.build @@ -0,0 +1 @@ +subdir('skhynix') diff --git a/hw/cxl/vendor/skhynix/.gitignore b/hw/cxl/vendor/skhynix/.giti= gnore new file mode 100644 index 0000000000..6d96de38ea --- /dev/null +++ b/hw/cxl/vendor/skhynix/.gitignore @@ -0,0 +1 @@ +init_niagara diff --git a/hw/cxl/vendor/skhynix/init_niagara.c b/hw/cxl/vendor/skhynix/i= nit_niagara.c new file mode 100644 index 0000000000..2c189dc33c --- /dev/null +++ b/hw/cxl/vendor/skhynix/init_niagara.c @@ -0,0 +1,99 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * + * Copyright (c) 2023 MemVerge Inc. + * Copyright (c) 2023 SK hynix Inc. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct niagara_state { + uint8_t nr_heads; + uint8_t nr_lds; + uint8_t ldmap[65536]; + uint32_t total_sections; + uint32_t free_sections; + uint32_t section_size; + uint32_t sections[]; +}; + +int main(int argc, char *argv[]) +{ + int shmid =3D 0; + uint32_t sections =3D 0; + uint32_t section_size =3D 0; + uint32_t heads =3D 0; + struct niagara_state *niagara_state =3D NULL; + size_t state_size; + uint8_t i; + + if (argc !=3D 5) { + printf("usage: init_niagara \n" + "\theads : number of heads on the device\n" + "\tsections : number of sections\n" + "\tsection_size : size of a section in 128mb increments\n" + "\tshmid : /tmp/mytoken.tmp\n\n" + "It is recommended your shared memory region is at least 1= 28kb\n"); + return -1; + } + + /* must have at least 1 head */ + heads =3D (uint32_t)atoi(argv[1]); + if (heads =3D=3D 0 || heads > 32) { + printf("bad heads argument (1-32)\n"); + return -1; + } + + /* Get number of sections */ + sections =3D (uint32_t)atoi(argv[2]); + if (sections =3D=3D 0) { + printf("bad sections argument\n"); + return -1; + } + + section_size =3D (uint32_t)atoi(argv[3]); + if (sections =3D=3D 0) { + printf("bad section size argument\n"); + return -1; + } + + shmid =3D (uint32_t)atoi(argv[4]); + if (shmid =3D=3D 0) { + printf("bad shmid argument\n"); + return -1; + } + + niagara_state =3D shmat(shmid, NULL, 0); + if (niagara_state =3D=3D (void *)-1) { + printf("Unable to attach to shared memory\n"); + return -1; + } + + /* Initialize the niagara_state */ + state_size =3D sizeof(struct niagara_state) + (sizeof(uint32_t) * sect= ions); + memset(niagara_state, 0, state_size); + niagara_state->nr_heads =3D heads; + niagara_state->nr_lds =3D heads; + niagara_state->total_sections =3D sections; + niagara_state->free_sections =3D sections; + niagara_state->section_size =3D section_size; + + memset(&niagara_state->ldmap, '\xff', sizeof(niagara_state->ldmap)); + for (i =3D 0; i < heads; i++) { + niagara_state->ldmap[i] =3D i; + } + + printf("niagara initialized\n"); + shmdt(niagara_state); + return 0; +} diff --git a/hw/cxl/vendor/skhynix/meson.build b/hw/cxl/vendor/skhynix/meso= n.build new file mode 100644 index 0000000000..4e57db65f1 --- /dev/null +++ b/hw/cxl/vendor/skhynix/meson.build @@ -0,0 +1 @@ +system_ss.add(when: 'CONFIG_CXL_VENDOR', if_true: files('skhynix_niagara.c= ',)) diff --git a/hw/cxl/vendor/skhynix/skhynix_niagara.c b/hw/cxl/vendor/skhyni= x/skhynix_niagara.c new file mode 100644 index 0000000000..fba90d0661 --- /dev/null +++ b/hw/cxl/vendor/skhynix/skhynix_niagara.c @@ -0,0 +1,514 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * + * Copyright (c) 2023 MemVerge Inc. + * Copyright (c) 2023 SK hynix Inc. + */ + +#include +#include "qemu/osdep.h" +#include "hw/irq.h" +#include "migration/vmstate.h" +#include "qapi/error.h" +#include "hw/cxl/cxl.h" +#include "hw/cxl/cxl_mailbox.h" +#include "hw/cxl/cxl_device.h" +#include "hw/pci/pcie.h" +#include "hw/pci/pcie_port.h" +#include "hw/qdev-properties.h" +#include "skhynix_niagara.h" + +#define TYPE_CXL_NIAGARA "cxl-skh-niagara" +OBJECT_DECLARE_TYPE(CXLNiagaraState, CXLNiagaraClass, CXL_NIAGARA) + +/* + * CXL r3.0 section 7.6.7.5.1 - Get Multi-Headed Info (Opcode 5500h) + * + * This command retrieves the number of heads, number of supported LDs, + * and Head-to-LD mapping of a Multi-Headed device. + */ +static CXLRetCode niagara_mhd_get_info(const struct cxl_cmd *cmd, + uint8_t *payload_in, + size_t len_in, + uint8_t *payload_out, + size_t *len_out, + CXLCCI * cci) +{ + CXLNiagaraState *s =3D CXL_NIAGARA(cci->d); + NiagaraMHDGetInfoInput *input =3D (void *)payload_in; + NiagaraMHDGetInfoOutput *output =3D (void *)payload_out; + + uint8_t start_ld =3D input->start_ld; + uint8_t ldmap_len =3D input->ldmap_len; + uint8_t i; + + if (start_ld >=3D s->mhd_state->nr_lds) { + return CXL_MBOX_INVALID_INPUT; + } + + output->nr_lds =3D s->mhd_state->nr_lds; + output->nr_heads =3D s->mhd_state->nr_heads; + output->resv1 =3D 0; + output->start_ld =3D start_ld; + output->resv2 =3D 0; + + for (i =3D 0; i < ldmap_len && (start_ld + i) < output->nr_lds; i++) { + output->ldmap[i] =3D s->mhd_state->ldmap[start_ld + i]; + } + output->ldmap_len =3D i; + + *len_out =3D sizeof(*output) + output->ldmap_len; + return CXL_MBOX_SUCCESS; +} + +static CXLRetCode cmd_niagara_get_section_status(const struct cxl_cmd *cmd, + uint8_t *payload_in, + size_t len_in, + uint8_t *payload_out, + size_t *len_out, + CXLCCI *cci) +{ + CXLNiagaraState *s =3D CXL_NIAGARA(cci->d); + NiagaraSharedState *nss =3D (NiagaraSharedState *)s->mhd_state; + NiagaraGetSectionStatusOutput *output =3D (void *)payload_out; + + output->total_section_count =3D nss->total_sections; + output->free_section_count =3D nss->free_sections; + + *len_out =3D sizeof(*output); + + return CXL_MBOX_SUCCESS; +} + +static bool niagara_claim_section(CXLNiagaraState *s, + uint32_t *sections, + uint32_t section_idx) +{ + uint32_t *section =3D §ions[section_idx]; + uint32_t old_value =3D __sync_fetch_and_or(section, (1 << s->mhd_head)= ); + + /* if we already owned the section, we haven't claimed it */ + if (old_value & (1 << s->mhd_head)) { + return false; + } + + /* if the old value wasn't 0, this section was already claimed */ + if (old_value !=3D 0) { + __sync_fetch_and_and(section, ~(1 << s->mhd_head)); + return false; + } + return true; +} + +static void niagara_release_sections(CXLNiagaraState *s, + uint32_t *section_ids, + uint32_t count) +{ + NiagaraSharedState *nss =3D s->mhd_state; + uint32_t *sections =3D &nss->sections[0]; + uint32_t section; + uint32_t old_val; + uint32_t i; + + /* free any successfully allocated sections */ + for (i =3D 0; i < count; i++) { + section =3D section_ids[i]; + old_val =3D __sync_fetch_and_and(§ions[section], ~(1 << s->mhd= _head)); + + if (old_val & (1 << s->mhd_head)) { + __sync_fetch_and_add(&nss->free_sections, 1); + } + } +} + +static void niagara_alloc_build_output(NiagaraAllocOutput *output, + size_t *len_out, + uint32_t *section_ids, + uint32_t section_count) +{ + uint32_t extents; + uint32_t previous; + uint32_t i; + + /* Build the output */ + output->section_count =3D section_count; + extents =3D 0; + previous =3D 0; + for (i =3D 0; i < section_count; i++) { + if (i =3D=3D 0) { + /* start the first extent */ + output->extents[extents].start_section_id =3D section_ids[i]; + output->extents[extents].section_count =3D 1; + extents++; + } else if (section_ids[i] =3D=3D (previous + 1)) { + /* increment the current extent */ + output->extents[extents - 1].section_count++; + } else { + /* start a new extent */ + output->extents[extents].start_section_id =3D section_ids[i]; + output->extents[extents].section_count =3D 1; + extents++; + } + previous =3D section_ids[i]; + } + output->extent_count =3D extents; + *len_out =3D 8 + (16 * extents); + return; +} + +static CXLRetCode niagara_alloc_manual(CXLNiagaraState *s, + NiagaraAllocInput *input, + NiagaraAllocOutput *output, + size_t *len_out) +{ + NiagaraSharedState *nss =3D s->mhd_state; + uint32_t cur_extent =3D 0; + g_autofree uint32_t *section_ids =3D NULL; + uint32_t *sections; + uint32_t allocated; + uint32_t i =3D 0; + uint32_t ttl_sec =3D 0; + + /* input validation: iterate extents, count total sectios */ + for (i =3D 0; i < input->extent_count; i++) { + uint32_t start =3D input->extents[i].start_section_id; + uint32_t end =3D start + input->extents[i].section_count; + + if ((start >=3D nss->total_sections) || + (end > nss->total_sections)) { + return CXL_MBOX_INVALID_INPUT; + } + ttl_sec +=3D input->extents[i].section_count; + } + + if (ttl_sec !=3D input->section_count) { + return CXL_MBOX_INVALID_INPUT; + } + + section_ids =3D malloc(input->section_count * sizeof(uint32_t)); + sections =3D &nss->sections[0]; + allocated =3D 0; + + /* for each section requested in the input, try to allocate that secti= on */ + for (cur_extent =3D 0; cur_extent < input->extent_count; cur_extent++)= { + uint32_t start_section =3D input->extents[cur_extent].start_sectio= n_id; + uint32_t section_count =3D input->extents[cur_extent].section_coun= t; + uint32_t cur_section; + + for (cur_section =3D input->extents[cur_extent].start_section_id; + cur_section < start_section + section_count; + cur_section++) { + if (niagara_claim_section(s, sections, cur_section)) { + __sync_fetch_and_sub(&nss->free_sections, 1); + section_ids[allocated++] =3D cur_section; + } + } + } + + if ((input->policy & NIAGARA_SECTION_ALLOC_POLICY_ALL_OR_NOTHING) && + (allocated !=3D input->section_count)) { + niagara_release_sections(s, section_ids, allocated); + return CXL_MBOX_INTERNAL_ERROR; + } + + niagara_alloc_build_output(output, len_out, section_ids, allocated); + return CXL_MBOX_SUCCESS; +} + +static CXLRetCode niagara_alloc_auto(CXLNiagaraState *s, + NiagaraAllocInput *input, + NiagaraAllocOutput *output, + size_t *len_out) +{ + NiagaraSharedState *nss =3D s->mhd_state; + g_autofree uint32_t *section_ids =3D NULL; + uint32_t section_count =3D input->section_count; + uint32_t total_sections =3D nss->total_sections; + uint32_t *sections =3D &nss->sections[0]; + uint32_t allocated =3D 0; + uint32_t cur_section; + + section_ids =3D malloc(section_count * sizeof(uint32_t)); + + /* Iterate the the section list and allocate free sections */ + for (cur_section =3D 0; + (cur_section < total_sections) && (allocated !=3D section_count); + cur_section++) { + if (niagara_claim_section(s, sections, cur_section)) { + __sync_fetch_and_sub(&nss->free_sections, 1); + section_ids[allocated++] =3D cur_section; + } + } + + if ((input->policy & NIAGARA_SECTION_ALLOC_POLICY_ALL_OR_NOTHING) && + (allocated !=3D input->section_count)) { + niagara_release_sections(s, section_ids, allocated); + return CXL_MBOX_INTERNAL_ERROR; + } + + niagara_alloc_build_output(output, len_out, section_ids, allocated); + return CXL_MBOX_SUCCESS; +} + +static CXLRetCode cmd_niagara_set_section_alloc(const struct cxl_cmd *cmd, + uint8_t *payload_in, + size_t len_in, + uint8_t *payload_out, + size_t *len_out, + CXLCCI *cci) +{ + CXLNiagaraState *s =3D CXL_NIAGARA(cci->d); + NiagaraAllocInput *input =3D (void *)payload_in; + NiagaraAllocOutput *output =3D (void *)payload_out; + + if (input->section_count =3D=3D 0 || + input->section_count > s->mhd_state->total_sections) { + return CXL_MBOX_INVALID_INPUT; + } + + if (input->policy & NIAGARA_SECTION_ALLOC_POLICY_MANUAL) { + return niagara_alloc_manual(s, input, output, len_out); + } + + return niagara_alloc_auto(s, input, output, len_out); +} + +static CXLRetCode cmd_niagara_set_section_release(const struct cxl_cmd *cm= d, + uint8_t *payload_in, + size_t len_in, + uint8_t *payload_out, + size_t *len_out, + CXLCCI *cci) +{ + CXLNiagaraState *s =3D CXL_NIAGARA(cci->d); + NiagaraSharedState *nss =3D s->mhd_state; + NiagaraReleaseInput *input =3D (void *)payload_in; + uint32_t i, j; + uint32_t *sections =3D &nss->sections[0]; + + for (i =3D 0; i < input->extent_count; i++) { + uint32_t start =3D input->extents[i].start_section_id; + + for (j =3D 0; j < input->extents[i].section_count; j++) { + uint32_t *cur_section =3D §ions[start + j]; + uint32_t hbit =3D 1 << s->mhd_head; + uint32_t old_val =3D __sync_fetch_and_and(cur_section, ~hbit); + + if (old_val & hbit) { + __sync_fetch_and_add(&nss->free_sections, 1); + } + } + } + return CXL_MBOX_SUCCESS; +} + +static CXLRetCode cmd_niagara_set_section_size(const struct cxl_cmd *cmd, + uint8_t *payload_in, + size_t len_in, + uint8_t *payload_out, + size_t *len_out, + CXLCCI *cci) +{ + CXLNiagaraState *s =3D CXL_NIAGARA(cci->d); + NiagaraSharedState *nss =3D s->mhd_state; + NiagaraSetSectionSizeInput *input =3D (void *)payload_in; + NiagaraSetSectionSizeOutput *output =3D (void *)payload_out; + uint32_t prev_size =3D nss->section_size; + uint32_t prev_ttl =3D nss->total_sections; + + /* Only allow size change if all sections are free */ + if (nss->free_sections !=3D nss->total_sections) { + return CXL_MBOX_INTERNAL_ERROR; + } + + if (nss->section_size !=3D (1 << (input->section_unit - 1))) { + nss->section_size =3D (1 << (input->section_unit - 1)); + nss->total_sections =3D (prev_size * prev_ttl) / nss->section_size; + nss->free_sections =3D nss->total_sections; + } + + output->section_unit =3D input->section_unit; + return CXL_MBOX_SUCCESS; +} + +static CXLRetCode cmd_niagara_get_section_map(const struct cxl_cmd *cmd, + uint8_t *payload_in, + size_t len_in, + uint8_t *payload_out, + size_t *len_out, + CXLCCI *cci) +{ + CXLNiagaraState *s =3D CXL_NIAGARA(cci->d); + NiagaraSharedState *nss =3D s->mhd_state; + NiagaraGetSectionMapInput *input =3D (void *)payload_in; + NiagaraGetSectionMapOutput *output =3D (void *)payload_out; + uint32_t *sections =3D &nss->sections[0]; + uint8_t query_type =3D input->query_type; + uint32_t i; + uint32_t bytes; + + if ((query_type !=3D NIAGARA_GSM_QUERY_FREE) && + (query_type !=3D NIAGARA_GSM_QUERY_ALLOCATED)) { + return CXL_MBOX_INVALID_INPUT; + } + + output->ttl_section_count =3D nss->total_sections; + output->qry_section_count =3D 0; + bytes =3D (output->ttl_section_count / 8); + if (output->ttl_section_count % 8) { + bytes +=3D 1; + } + + for (i =3D 0; i < bytes; i++) { + output->bitset[i] =3D 0x0; + } + + /* Iterate the the section list and check the bits */ + for (i =3D 0; (i < nss->total_sections); i++) { + uint32_t section =3D sections[i]; + + if (((query_type =3D=3D NIAGARA_GSM_QUERY_FREE) && (!section)) || + ((query_type =3D=3D NIAGARA_GSM_QUERY_ALLOCATED) && + (section & (1 << s->mhd_head)))) { + uint32_t byte =3D i / 8; + uint8_t bit =3D 1 << (i % 8); + + output->bitset[byte] |=3D bit; + output->qry_section_count++; + } + } + + *len_out =3D 8 + bytes; + return CXL_MBOX_SUCCESS; +} + +static bool mhdsld_access_valid(PCIDevice *d, + uint64_t dpa_offset, + unsigned int size) +{ + CXLNiagaraState *s =3D CXL_NIAGARA(d); + NiagaraSharedState *nss =3D s->mhd_state; + uint32_t section =3D (dpa_offset / NIAGARA_MIN_MEMBLK); + + return nss->sections[section] & (1 << s->mhd_head); +} + +static const struct cxl_cmd cxl_cmd_set_niagara[256][256] =3D { + [NIAGARA_CMD][GET_SECTION_STATUS] =3D { "GET_SECTION_STATUS", + cmd_niagara_get_section_status, 0, 0 }, + [NIAGARA_CMD][SET_SECTION_ALLOC] =3D { "SET_SECTION_ALLOC", + cmd_niagara_set_section_alloc, ~0, + (CXL_MBOX_IMMEDIATE_CONFIG_CHANGE | CXL_MBOX_IMMEDIATE_DATA_CHANGE= | + CXL_MBOX_IMMEDIATE_POLICY_CHANGE | CXL_MBOX_IMMEDIATE_LOG_CHANGE) + }, + [NIAGARA_CMD][SET_SECTION_RELEASE] =3D { "SET_SECTION_RELEASE", + cmd_niagara_set_section_release, ~0, + (CXL_MBOX_IMMEDIATE_CONFIG_CHANGE | CXL_MBOX_IMMEDIATE_DATA_CHANGE= | + CXL_MBOX_IMMEDIATE_POLICY_CHANGE | CXL_MBOX_IMMEDIATE_LOG_CHANGE) + }, + [NIAGARA_CMD][SET_SECTION_SIZE] =3D { "SET_SECTION_SIZE", + cmd_niagara_set_section_size, 8, + (CXL_MBOX_IMMEDIATE_CONFIG_CHANGE | CXL_MBOX_IMMEDIATE_DATA_CHANGE= | + CXL_MBOX_IMMEDIATE_POLICY_CHANGE | CXL_MBOX_IMMEDIATE_LOG_CHANGE) + }, + [NIAGARA_CMD][GET_SECTION_MAP] =3D { "GET_SECTION_MAP", + cmd_niagara_get_section_map, 8 , CXL_MBOX_IMMEDIATE_DATA_CHANGE }, +}; + +static Property cxl_niagara_props[] =3D { + DEFINE_PROP_UINT32("mhd-head", CXLNiagaraState, mhd_head, ~(0)), + DEFINE_PROP_UINT32("mhd-shmid", CXLNiagaraState, mhd_shmid, 0), + DEFINE_PROP_END_OF_LIST(), +}; + +static void cxl_niagara_realize(PCIDevice *pci_dev, Error **errp) +{ + CXLNiagaraState *s =3D CXL_NIAGARA(pci_dev); + + ct3_realize(pci_dev, errp); + + if (!s->mhd_shmid || s->mhd_head =3D=3D ~(0)) { + error_setg(errp, "is_mhd requires mhd_shmid and mhd_head settings"= ); + return; + } + + if (s->mhd_head >=3D 32) { + error_setg(errp, "MHD Head ID must be between 0-31"); + return; + } + + s->mhd_state =3D shmat(s->mhd_shmid, NULL, 0); + if (s->mhd_state =3D=3D (void *)-1) { + s->mhd_state =3D NULL; + error_setg(errp, "Unable to attach MHD State. Check ipcs is valid"= ); + return; + } + + /* For now, limit the number of LDs to the number of heads (SLD) */ + if (s->mhd_head >=3D s->mhd_state->nr_heads) { + error_setg(errp, "Invalid head ID for multiheaded device."); + return; + } + + if (s->mhd_state->nr_lds <=3D s->mhd_head) { + error_setg(errp, "MHD Shared state does not have sufficient lds."); + return; + } + + s->mhd_state->ldmap[s->mhd_head] =3D s->mhd_head; + return; +} + +static void cxl_niagara_exit(PCIDevice *pci_dev) +{ + CXLNiagaraState *s =3D CXL_NIAGARA(pci_dev); + + ct3_exit(pci_dev); + + if (s->mhd_state) { + shmdt(s->mhd_state); + } +} + +static void cxl_niagara_reset(DeviceState *d) +{ + CXLNiagaraState *s =3D CXL_NIAGARA(d); + + ct3d_reset(d); + cxl_add_cci_commands(&s->ct3d.cci, cxl_cmd_set_niagara, 512); +} + +static void cxl_niagara_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + PCIDeviceClass *pc =3D PCI_DEVICE_CLASS(klass); + CXLType3Class *cvc =3D CXL_TYPE3_CLASS(klass); + + pc->realize =3D cxl_niagara_realize; + pc->exit =3D cxl_niagara_exit; + dc->reset =3D cxl_niagara_reset; + device_class_set_props(dc, cxl_niagara_props); + + cvc->mhd_get_info =3D niagara_mhd_get_info; + cvc->mhd_access_valid =3D mhdsld_access_valid; +} + +static const TypeInfo cxl_niagara_info =3D { + .name =3D TYPE_CXL_NIAGARA, + .parent =3D TYPE_CXL_TYPE3, + .class_size =3D sizeof(struct CXLNiagaraClass), + .class_init =3D cxl_niagara_class_init, + .instance_size =3D sizeof(CXLNiagaraState), + .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_CXL_DEVICE }, + { INTERFACE_PCIE_DEVICE }, + {} + }, +}; + +static void cxl_niagara_register_types(void) +{ + type_register_static(&cxl_niagara_info); +} + +type_init(cxl_niagara_register_types) diff --git a/hw/cxl/vendor/skhynix/skhynix_niagara.h b/hw/cxl/vendor/skhyni= x/skhynix_niagara.h new file mode 100644 index 0000000000..c591b58fd8 --- /dev/null +++ b/hw/cxl/vendor/skhynix/skhynix_niagara.h @@ -0,0 +1,161 @@ +#ifndef CXL_SKH_NIAGARA_H +#define CXL_SKH_NIAGARA_H +#include +#include "hw/cxl/cxl.h" +#include "hw/cxl/cxl_mailbox.h" +#include "hw/cxl/cxl_device.h" +#include "qemu/units.h" + +#define NIAGARA_MIN_MEMBLK (128 * MiB) + +/* + * The shared state cannot have 2 variable sized regions + * so we have to max out the ldmap. + */ +typedef struct NiagaraSharedState { + uint8_t nr_heads; + uint8_t nr_lds; + uint8_t ldmap[65536]; + uint32_t total_sections; + uint32_t free_sections; + uint32_t section_size; + uint32_t sections[]; +} NiagaraSharedState; + +struct CXLNiagaraState { + CXLType3Dev ct3d; + uint32_t mhd_head; + uint32_t mhd_shmid; + NiagaraSharedState *mhd_state; +}; + +struct CXLNiagaraClass { + CXLType3Class parent_class; +}; + +enum { + NIAGARA_CMD =3D 0xC0 + #define GET_SECTION_STATUS 0x0 + #define SET_SECTION_ALLOC 0x1 + #define SET_SECTION_RELEASE 0x2 + #define SET_SECTION_SIZE 0x3 + /* Future: MOVE_DATA 0x4 */ + #define GET_SECTION_MAP 0x5 + /* Future: CLEAR_SECTION 0x99 */ +}; + +typedef struct NiagaraExtent { + uint32_t start_section_id; + uint32_t section_count; + uint8_t reserved[8]; +} QEMU_PACKED NiagaraExtent; + +/* + * MHD Get Info Command + * Returns information the LD's associated with this head + */ +typedef struct NiagaraMHDGetInfoInput { + uint8_t start_ld; + uint8_t ldmap_len; +} QEMU_PACKED NiagaraMHDGetInfoInput; + +typedef struct NiagaraMHDGetInfoOutput { + uint8_t nr_lds; + uint8_t nr_heads; + uint16_t resv1; + uint8_t start_ld; + uint8_t ldmap_len; + uint16_t resv2; + uint8_t ldmap[]; +} QEMU_PACKED NiagaraMHDGetInfoOutput; + +/* + * Niagara Section Status Command + * + * Returns the total sections and number of free sections + */ +typedef struct NiagaraGetSectionStatusOutput { + uint32_t total_section_count; + uint32_t free_section_count; +} QEMU_PACKED NiagaraGetSectionStatusOutput; + +/* + * Niagara Set Section Alloc Command + * + * Policies: + * All or nothing - if fail to allocate any section, nothing is allocat= ed + * Best effort - Allocate as many as possible + * Manual - allocate the provided set of extents + * + * Policies can be combined. + * + * Returns: The allocated sections in extents + */ +#define NIAGARA_SECTION_ALLOC_POLICY_ALL_OR_NOTHING 0 +#define NIAGARA_SECTION_ALLOC_POLICY_BEST_EFFORT 1 +#define NIAGARA_SECTION_ALLOC_POLICY_MANUAL 2 + +typedef struct NiagaraAllocInput { + uint8_t policy; + uint8_t reserved1[3]; + uint32_t section_count; + uint8_t reserved2[4]; + uint32_t extent_count; + NiagaraExtent extents[]; +} QEMU_PACKED NiagaraAllocInput; + +typedef struct NiagaraAllocOutput { + uint32_t section_count; + uint32_t extent_count; + NiagaraExtent extents[]; +} QEMU_PACKED NiagaraAllocOutput; + +/* + * Niagara Set Section Release Command + * + * Releases the provided extents + */ +typedef struct NiagaraReleaseInput { + uint32_t extent_count; + uint8_t policy; + uint8_t reserved[3]; + NiagaraExtent extents[]; +} QEMU_PACKED NiagaraReleaseInput; + +/* + * Niagara Set Section Size + * + * Changes the section size to 128 * (1 << section_unit) + */ +typedef struct NiagaraSetSectionSizeInput { + uint8_t section_unit; + uint8_t reserved[7]; +} QEMU_PACKED NiagaraSetSectionSizeInput; + +typedef struct { + uint8_t section_unit; + uint8_t reserved[7]; +} QEMU_PACKED NiagaraSetSectionSizeOutput; + +/* + * Niagara Get Section Map Command + * query type: + * Free - Map of free sections + * Allocated - What sections are allocated for this head + * Returns a map of the requested type of sections + */ +#define NIAGARA_GSM_QUERY_FREE 0 +#define NIAGARA_GSM_QUERY_ALLOCATED 1 + +typedef struct NiagaraGetSectionMapInput { + uint8_t query_type; + uint8_t reserved[7]; +} QEMU_PACKED NiagaraGetSectionMapInput; + +typedef struct NiagaraGetSectionMapOutput { + uint32_t ttl_section_count; + uint32_t qry_section_count; + uint8_t bitset[]; +} QEMU_PACKED NiagaraGetSectionMapOutput; + +#endif --=20 2.39.1