From nobody Thu Nov 28 07:44:40 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1693850338; cv=none; d=zohomail.com; s=zohoarc; b=DpoPPlDBGg7Q1Vn3cwT+ZikYSbVnHOJndlhy02Hs4cQHnh4AjWtBAKNj+QLADtmqtKA3+aIjCmcaJqg9jG6lcd8HYOwNcH0z9Q5+MD2Cj8bohHCzVd9d+z/u/cYFOg20xrvcO4H/Bd8ASXKAMN6G+ApkbUSlRX0n5F/IbSuVkIE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1693850338; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=lTFZYQYetN3YbtJ+ArAb/SH0HbjV0k6l6IZ3AogQCbM=; b=mZaDYv5Cvr2kVw32PL1JZq7TkHPYqVseWZvq1IYQEQm1zr05SzHixusJt/VfzjZl/7K2JzbWUk1/dCLUnSCTA3/T1UFZ33sT5w/aodKbjrFbdoqmgw/JbdHUgvaRiUu2qM2QHYEoiT/eUKUQR8o0pyovPS4Y2qvR4jZbGRB3N6I= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1693850338888506.9609501490311; Mon, 4 Sep 2023 10:58:58 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qdDpp-0002rZ-Dz; Mon, 04 Sep 2023 13:58:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qdDpn-0002rI-C3 for qemu-devel@nongnu.org; Mon, 04 Sep 2023 13:57:59 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qdDpk-0004Vf-2w for qemu-devel@nongnu.org; Mon, 04 Sep 2023 13:57:59 -0400 Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.226]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4RfbtC0mNsz67hmj; Tue, 5 Sep 2023 01:56:35 +0800 (CST) Received: from SecurePC-101-06.china.huawei.com (10.122.247.231) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Mon, 4 Sep 2023 18:57:52 +0100 To: , Michael Tsirkin , Fan Ni , CC: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Subject: [PATCH] hw/pci-bridge/cxl-upstream: Add serial number extended capability support Date: Mon, 4 Sep 2023 18:57:52 +0100 Message-ID: <20230904175752.17927-1-Jonathan.Cameron@huawei.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.122.247.231] X-ClientProxiedBy: lhrpeml100003.china.huawei.com (7.191.160.210) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=185.176.79.56; envelope-from=jonathan.cameron@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jonathan Cameron From: Jonathan Cameron via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1693850341598100003 Content-Type: text/plain; charset="utf-8" Will be needed so there is a defined serial number for information queries via the Switch CCI. Signed-off-by: Jonathan Cameron --- No ordering dependencies wrt to other CXL patch sets. Whilst we 'need' it for the Switch CCI set it is valid without it and aligns with existing EP serial number support. Seems sensible to upstream this first and reduce my out of tree backlog a little! hw/pci-bridge/cxl_upstream.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/hw/pci-bridge/cxl_upstream.c b/hw/pci-bridge/cxl_upstream.c index 2b9cf0cc97..15c4d84a56 100644 --- a/hw/pci-bridge/cxl_upstream.c +++ b/hw/pci-bridge/cxl_upstream.c @@ -14,6 +14,11 @@ #include "hw/pci/msi.h" #include "hw/pci/pcie.h" #include "hw/pci/pcie_port.h" +/* + * Null value of all Fs suggested by IEEE RA guidelines for use of + * EU, OUI and CID + */ +#define UI64_NULL (~0ULL) =20 #define CXL_UPSTREAM_PORT_MSI_NR_VECTOR 2 =20 @@ -30,6 +35,7 @@ typedef struct CXLUpstreamPort { /*< public >*/ CXLComponentState cxl_cstate; DOECap doe_cdat; + uint64_t sn; } CXLUpstreamPort; =20 CXLComponentState *cxl_usp_to_cstate(CXLUpstreamPort *usp) @@ -326,8 +332,12 @@ static void cxl_usp_realize(PCIDevice *d, Error **errp) if (rc) { goto err_cap; } - - cxl_cstate->dvsec_offset =3D CXL_UPSTREAM_PORT_DVSEC_OFFSET; + if (usp->sn !=3D UI64_NULL) { + pcie_dev_ser_num_init(d, CXL_UPSTREAM_PORT_DVSEC_OFFSET, usp->sn); + cxl_cstate->dvsec_offset =3D CXL_UPSTREAM_PORT_DVSEC_OFFSET + 0x0c; + } else { + cxl_cstate->dvsec_offset =3D CXL_UPSTREAM_PORT_DVSEC_OFFSET; + } cxl_cstate->pdev =3D d; build_dvsecs(cxl_cstate); cxl_component_register_block_init(OBJECT(d), cxl_cstate, TYPE_CXL_USP); @@ -366,6 +376,7 @@ static void cxl_usp_exitfn(PCIDevice *d) } =20 static Property cxl_upstream_props[] =3D { + DEFINE_PROP_UINT64("sn", CXLUpstreamPort, sn, UI64_NULL), DEFINE_PROP_STRING("cdat", CXLUpstreamPort, cxl_cstate.cdat.filename), DEFINE_PROP_END_OF_LIST() }; --=20 2.39.2