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Thu, 31 Aug 2023 15:56:23 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, David Gibson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alexander Graf , Peter Maydell Subject: [PATCH 02/11] target/arm: Clean up local variable shadowing Date: Fri, 1 Sep 2023 00:55:57 +0200 Message-ID: <20230831225607.30829-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230831225607.30829-1-philmd@linaro.org> References: <20230831225607.30829-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=philmd@linaro.org; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1693522733295100001 Fix: target/arm/tcg/translate-m-nocp.c:509:18: error: declaration shadows a lo= cal variable [-Werror,-Wshadow] TCGv_i32 tmp =3D load_cpu_field(v7m.fpdscr[M_REG_NS]); ^ target/arm/tcg/translate-m-nocp.c:433:14: note: previous declaration is h= ere TCGv_i32 tmp; ^ target/arm/tcg/mve_helper.c:2463:17: error: declaration shadows a local v= ariable [-Werror,-Wshadow] int64_t extval =3D sextract64(src << shift, 0, 48); ^ target/arm/tcg/mve_helper.c:2443:18: note: previous declaration is here int64_t val, extval; ^ target/arm/hvf/hvf.c:1936:13: error: declaration shadows a local variable= [-Werror,-Wshadow] int ret =3D 0; ^ target/arm/hvf/hvf.c:1807:9: note: previous declaration is here int ret; ^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/hvf/hvf.c | 1 - target/arm/tcg/mve_helper.c | 8 ++++---- target/arm/tcg/translate-m-nocp.c | 2 +- 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 486f90be1d..20d534faef 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1933,7 +1933,6 @@ int hvf_vcpu_exec(CPUState *cpu) uint32_t rt =3D (syndrome >> 5) & 0x1f; uint32_t reg =3D syndrome & SYSREG_MASK; uint64_t val; - int ret =3D 0; =20 if (isread) { ret =3D hvf_sysreg_read(cpu, reg, rt); diff --git a/target/arm/tcg/mve_helper.c b/target/arm/tcg/mve_helper.c index 403b345ea3..32087b6f0a 100644 --- a/target/arm/tcg/mve_helper.c +++ b/target/arm/tcg/mve_helper.c @@ -924,8 +924,8 @@ DO_1OP_IMM(vorri, DO_ORRI) bool qc =3D false; \ for (e =3D 0; e < 16 / ESIZE; e++, mask >>=3D ESIZE) { = \ bool sat =3D false; \ - TYPE r =3D FN(n[H##ESIZE(e)], m[H##ESIZE(e)], &sat); \ - mergemask(&d[H##ESIZE(e)], r, mask); \ + TYPE r_ =3D FN(n[H##ESIZE(e)], m[H##ESIZE(e)], &sat); \ + mergemask(&d[H##ESIZE(e)], r_, mask); \ qc |=3D sat & mask & 1; \ } \ if (qc) { \ @@ -2460,7 +2460,7 @@ static inline int64_t do_sqrshl48_d(int64_t src, int6= 4_t shift, return extval; } } else if (shift < 48) { - int64_t extval =3D sextract64(src << shift, 0, 48); + extval =3D sextract64(src << shift, 0, 48); if (!sat || src =3D=3D (extval >> shift)) { return extval; } @@ -2492,7 +2492,7 @@ static inline uint64_t do_uqrshl48_d(uint64_t src, in= t64_t shift, return extval; } } else if (shift < 48) { - uint64_t extval =3D extract64(src << shift, 0, 48); + extval =3D extract64(src << shift, 0, 48); if (!sat || src =3D=3D (extval >> shift)) { return extval; } diff --git a/target/arm/tcg/translate-m-nocp.c b/target/arm/tcg/translate-m= -nocp.c index 33f6478bb9..42308c4db5 100644 --- a/target/arm/tcg/translate-m-nocp.c +++ b/target/arm/tcg/translate-m-nocp.c @@ -506,7 +506,7 @@ static bool gen_M_fp_sysreg_read(DisasContext *s, int r= egno, =20 gen_branch_fpInactive(s, TCG_COND_EQ, lab_active); /* fpInactive case: reads as FPDSCR_NS */ - TCGv_i32 tmp =3D load_cpu_field(v7m.fpdscr[M_REG_NS]); + tmp =3D load_cpu_field(v7m.fpdscr[M_REG_NS]); storefn(s, opaque, tmp, true); lab_end =3D gen_new_label(); tcg_gen_br(lab_end); --=20 2.41.0