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envelope-from=francisco.iglesias@amd.com; helo=NAM11-DM6-obe.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1692902156167100001 Content-Type: text/plain; charset="utf-8" Introduce a model of Xilinx Versal's Configuration Frame Unit's Single Frame Read port (CFU_SFR). Signed-off-by: Francisco Iglesias Reviewed-by: Peter Maydell --- hw/misc/xlnx-versal-cfu.c | 87 +++++++++++++++++++++++++++++++ include/hw/misc/xlnx-versal-cfu.h | 15 ++++++ 2 files changed, 102 insertions(+) diff --git a/hw/misc/xlnx-versal-cfu.c b/hw/misc/xlnx-versal-cfu.c index 255c1bf4b8..8e588ac1d8 100644 --- a/hw/misc/xlnx-versal-cfu.c +++ b/hw/misc/xlnx-versal-cfu.c @@ -264,6 +264,31 @@ static void cfu_stream_write(void *opaque, hwaddr addr= , uint64_t value, } } =20 +static uint64_t cfu_sfr_read(void *opaque, hwaddr addr, unsigned size) +{ + qemu_log_mask(LOG_GUEST_ERROR, "%s: Unsupported read from addr=3D%" + HWADDR_PRIx "\n", __func__, addr); + return 0; +} + +static void cfu_sfr_write(void *opaque, hwaddr addr, uint64_t value, + unsigned size) +{ + XlnxVersalCFUSFR *s =3D XLNX_VERSAL_CFU_SFR(opaque); + uint32_t wfifo[WFIFO_SZ]; + + if (update_wfifo(addr, value, s->wfifo, wfifo)) { + uint8_t row_addr =3D extract32(wfifo[0], 23, 5); + uint32_t frame_addr =3D extract32(wfifo[0], 0, 23); + XlnxCfiPacket pkt =3D { .reg_addr =3D CFRAME_SFR, + .data[0] =3D frame_addr }; + + if (s->cfg.cfu) { + cfu_transfer_cfi_packet(s->cfg.cfu, row_addr, &pkt); + } + } +} + static uint64_t cfu_fdro_read(void *opaque, hwaddr addr, unsigned size) { XlnxVersalCFUFDRO *s =3D XLNX_VERSAL_CFU_FDRO(opaque); @@ -293,6 +318,16 @@ static const MemoryRegionOps cfu_stream_ops =3D { }, }; =20 +static const MemoryRegionOps cfu_sfr_ops =3D { + .read =3D cfu_sfr_read, + .write =3D cfu_sfr_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, + .valid =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + }, +}; + static const MemoryRegionOps cfu_fdro_ops =3D { .read =3D cfu_fdro_read, .write =3D cfu_fdro_write, @@ -334,6 +369,23 @@ static void cfu_apb_init(Object *obj) sysbus_init_irq(sbd, &s->irq_cfu_imr); } =20 +static void cfu_sfr_init(Object *obj) +{ + XlnxVersalCFUSFR *s =3D XLNX_VERSAL_CFU_SFR(obj); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); + + memory_region_init_io(&s->iomem_sfr, obj, &cfu_sfr_ops, s, + TYPE_XLNX_VERSAL_CFU_SFR, KEYHOLE_STREAM_4K); + sysbus_init_mmio(sbd, &s->iomem_sfr); +} + +static void cfu_sfr_reset_enter(Object *obj, ResetType type) +{ + XlnxVersalCFUSFR *s =3D XLNX_VERSAL_CFU_SFR(obj); + + memset(s->wfifo, 0, WFIFO_SZ * sizeof(uint32_t)); +} + static void cfu_fdro_init(Object *obj) { XlnxVersalCFUFDRO *s =3D XLNX_VERSAL_CFU_FDRO(obj); @@ -401,6 +453,12 @@ static Property cfu_props[] =3D { DEFINE_PROP_END_OF_LIST(), }; =20 +static Property cfu_sfr_props[] =3D { + DEFINE_PROP_LINK("cfu", XlnxVersalCFUSFR, cfg.cfu, + TYPE_XLNX_VERSAL_CFU_APB, XlnxVersalCFUAPB *), + DEFINE_PROP_END_OF_LIST(), +}; + static const VMStateDescription vmstate_cfu_apb =3D { .name =3D TYPE_XLNX_VERSAL_CFU_APB, .version_id =3D 1, @@ -423,6 +481,16 @@ static const VMStateDescription vmstate_cfu_fdro =3D { } }; =20 +static const VMStateDescription vmstate_cfu_sfr =3D { + .name =3D TYPE_XLNX_VERSAL_CFU_SFR, + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (VMStateField[]) { + VMSTATE_UINT32_ARRAY(wfifo, XlnxVersalCFUSFR, 4), + VMSTATE_END_OF_LIST(), + } +}; + static void cfu_apb_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); @@ -443,6 +511,16 @@ static void cfu_fdro_class_init(ObjectClass *klass, vo= id *data) rc->phases.enter =3D cfu_fdro_reset_enter; } =20 +static void cfu_sfr_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + ResettableClass *rc =3D RESETTABLE_CLASS(klass); + + device_class_set_props(dc, cfu_sfr_props); + dc->vmsd =3D &vmstate_cfu_sfr; + rc->phases.enter =3D cfu_sfr_reset_enter; +} + static const TypeInfo cfu_apb_info =3D { .name =3D TYPE_XLNX_VERSAL_CFU_APB, .parent =3D TYPE_SYS_BUS_DEVICE, @@ -467,10 +545,19 @@ static const TypeInfo cfu_fdro_info =3D { } }; =20 +static const TypeInfo cfu_sfr_info =3D { + .name =3D TYPE_XLNX_VERSAL_CFU_SFR, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(XlnxVersalCFUSFR), + .class_init =3D cfu_sfr_class_init, + .instance_init =3D cfu_sfr_init, +}; + static void cfu_apb_register_types(void) { type_register_static(&cfu_apb_info); type_register_static(&cfu_fdro_info); + type_register_static(&cfu_sfr_info); } =20 type_init(cfu_apb_register_types) diff --git a/include/hw/misc/xlnx-versal-cfu.h b/include/hw/misc/xlnx-versa= l-cfu.h index 73e9a21af4..86fb841053 100644 --- a/include/hw/misc/xlnx-versal-cfu.h +++ b/include/hw/misc/xlnx-versal-cfu.h @@ -28,6 +28,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(XlnxVersalCFUAPB, XLNX_VERSAL_= CFU_APB) #define TYPE_XLNX_VERSAL_CFU_FDRO "xlnx,versal-cfu-fdro" OBJECT_DECLARE_SIMPLE_TYPE(XlnxVersalCFUFDRO, XLNX_VERSAL_CFU_FDRO) =20 +#define TYPE_XLNX_VERSAL_CFU_SFR "xlnx,versal-cfu-sfr" +OBJECT_DECLARE_SIMPLE_TYPE(XlnxVersalCFUSFR, XLNX_VERSAL_CFU_SFR) + REG32(CFU_ISR, 0x0) FIELD(CFU_ISR, USR_GTS_EVENT, 9, 1) FIELD(CFU_ISR, USR_GSR_EVENT, 8, 1) @@ -222,6 +225,18 @@ struct XlnxVersalCFUFDRO { Fifo32 fdro_data; }; =20 +struct XlnxVersalCFUSFR { + SysBusDevice parent_obj; + MemoryRegion iomem_sfr; + + /* 128-bit wfifo. */ + uint32_t wfifo[WFIFO_SZ]; + + struct { + XlnxVersalCFUAPB *cfu; + } cfg; +}; + /** * This is a helper function for updating a CFI data write fifo, an array = of 4 * uint32_t and 128 bits of data that are allowed to be written through 4 --=20 2.34.1