From nobody Tue Feb 10 13:36:12 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1692264840515597.5206482551877; Thu, 17 Aug 2023 02:34:00 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qWZNy-0002CD-4w; Thu, 17 Aug 2023 05:33:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qWZNv-0001gh-CT for qemu-devel@nongnu.org; Thu, 17 Aug 2023 05:33:43 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qWZNo-0002xK-Hi for qemu-devel@nongnu.org; Thu, 17 Aug 2023 05:33:42 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8AxV_H56N1kiXUZAA--.52746S3; Thu, 17 Aug 2023 17:31:37 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by localhost.localdomain (Coremail) with SMTP id AQAAf8AxTSPs6N1kjKdcAA--.12060S20; Thu, 17 Aug 2023 17:31:36 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org, c@jia.je, philmd@linaro.org, maobibo@loongson.cn, yangxiaojuan@loongson.cn, yijun@loongson.cn, shenjinyang@loongson.cn Subject: [PATCH v3 18/18] target/loongarch: Add avail_IOCSR to check iocsr instructions Date: Thu, 17 Aug 2023 17:31:21 +0800 Message-Id: <20230817093121.1053890-19-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230817093121.1053890-1-gaosong@loongson.cn> References: <20230817093121.1053890-1-gaosong@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: AQAAf8AxTSPs6N1kjKdcAA--.12060S20 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1692264840984100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: Song Gao Reviewed-by: Richard Henderson --- .../loongarch/insn_trans/trans_privileged.c.inc | 16 ++++++++-------- target/loongarch/translate.h | 2 +- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/target/loongarch/insn_trans/trans_privileged.c.inc b/target/lo= ongarch/insn_trans/trans_privileged.c.inc index 099cd871f0..4cb701b4b5 100644 --- a/target/loongarch/insn_trans/trans_privileged.c.inc +++ b/target/loongarch/insn_trans/trans_privileged.c.inc @@ -312,14 +312,14 @@ static bool gen_iocsrwr(DisasContext *ctx, arg_rr *a, return true; } =20 -TRANS(iocsrrd_b, ALL, gen_iocsrrd, gen_helper_iocsrrd_b) -TRANS(iocsrrd_h, ALL, gen_iocsrrd, gen_helper_iocsrrd_h) -TRANS(iocsrrd_w, ALL, gen_iocsrrd, gen_helper_iocsrrd_w) -TRANS(iocsrrd_d, ALL, gen_iocsrrd, gen_helper_iocsrrd_d) -TRANS(iocsrwr_b, ALL, gen_iocsrwr, gen_helper_iocsrwr_b) -TRANS(iocsrwr_h, ALL, gen_iocsrwr, gen_helper_iocsrwr_h) -TRANS(iocsrwr_w, ALL, gen_iocsrwr, gen_helper_iocsrwr_w) -TRANS(iocsrwr_d, ALL, gen_iocsrwr, gen_helper_iocsrwr_d) +TRANS(iocsrrd_b, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_b) +TRANS(iocsrrd_h, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_h) +TRANS(iocsrrd_w, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_w) +TRANS(iocsrrd_d, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_d) +TRANS(iocsrwr_b, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_b) +TRANS(iocsrwr_h, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_h) +TRANS(iocsrwr_w, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_w) +TRANS(iocsrwr_d, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_d) =20 static void check_mmu_idx(DisasContext *ctx) { diff --git a/target/loongarch/translate.h b/target/loongarch/translate.h index db46e9aa0f..89b49a859e 100644 --- a/target/loongarch/translate.h +++ b/target/loongarch/translate.h @@ -23,7 +23,7 @@ #define avail_LSPW(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, LSPW)) #define avail_LAM(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, LAM)) #define avail_LSX(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, LSX)) - +#define avail_IOCSR(C) (FIELD_EX32((C)->cpucfg1, CPUCFG1, IOCSR)) =20 /* * If an operation is being performed on less than TARGET_LONG_BITS, --=20 2.39.1