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[189.69.160.189]) by smtp.gmail.com with ESMTPSA id be15-20020a056808218f00b003a40b3fce01sm5903418oib.10.2023.08.15.15.38.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Aug 2023 15:38:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1692139089; x=1692743889; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ijcnw0rMIsKYXNXEvhEuvRumM2r6rsE7c0XzS7gCaHg=; b=DtVGE+mLabqVmDycHoVn79gzSgGqukBsAts6o+ue4DjGcJM1Z4AkYf16WvrZ/ws7Z4 xMhkqSpkF1X/DLw1SlHBdU1x7Qlxsm8/11qV//93rxsh+VwVKTFgsiICO3UB/9e/Lb4H Xw5MSwgRKNEshSEssHkLUA4dexxDrtXZpg5BXN7U/UKTnEWrT1w+BFgnZxluIU9fXpGa kS5nvphlEXSUUA5l+ZL5U2sbigm0rbac2KNnmbad9xRY9zhrLDBsyenylXVFUKoHHM8r 7JbQGuAsG2q4QhIsIv7atBHQHggQFizLOeFTd4ACni+5+QGPZhmREXBhtE22xLgfjMpV 75zA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692139089; x=1692743889; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ijcnw0rMIsKYXNXEvhEuvRumM2r6rsE7c0XzS7gCaHg=; b=IbVsTjg5hp8lCF8XpIh8OfboUEX+ZV+WdlvFod2rRFuys8qzHPDL4Y+zHUQ38l6jHE vpFKRrLZVoKjTJ5hU+9lTExb31g1MIW+Fmkv66CCpTw+fLdsYyLpkGfv4IJFyCk/ZrEZ Lvfv7n5agcZOwuBbEYSCOVri6gMZ+frcF2Nm1udMMLTifP6QLbgttKkTpKF1z1kXA718 eILQoJbniiJZMWMbryjiYj92vPht6i85rYUm1/O8jy4qtq5PVtWvkkEc6EjxXr9j/7pH tWNNF8UbtChvzLoShattrD8857nc0QlkE8rKdvWoNoN58g2eK0ysNSmeu1iwLeDCB255 pqIQ== X-Gm-Message-State: AOJu0YwvF6ohxGZ+j3lZshVei6mqYZrHm8zrie1QMMXxWNJeNC2emcIQ 0mbDjCYtYQOv6b4uxgfNTZixEWhVqI98aqGD5wU= X-Google-Smtp-Source: AGHT+IFbdTJ27FOLUrzs9ga7Qp9PZL1hC79zrqiuWxsD+ATyuOthaStDJdKK+XJ4XjSl4LfBpVFvuQ== X-Received: by 2002:a05:6808:11c5:b0:3a4:317d:eb7c with SMTP id p5-20020a05680811c500b003a4317deb7cmr116747oiv.0.1692139089645; Tue, 15 Aug 2023 15:38:09 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza Subject: [PATCH v8 07/12] target/riscv/cpu.c: add riscv_cpu_add_qdev_prop_array() Date: Tue, 15 Aug 2023 19:37:36 -0300 Message-ID: <20230815223741.433763-8-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230815223741.433763-1-dbarboza@ventanamicro.com> References: <20230815223741.433763-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::22b; envelope-from=dbarboza@ventanamicro.com; helo=mail-oi1-x22b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1692139166783100001 Content-Type: text/plain; charset="utf-8" The code inside riscv_cpu_add_user_properties() became quite repetitive after recent changes. Add a helper to hide the repetition away. Signed-off-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 27 +++++++++++---------------- 1 file changed, 11 insertions(+), 16 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 520c5c9f96..a0c14d1a0c 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1883,6 +1883,13 @@ static void cpu_set_cfg_unavailable(Object *obj, Vis= itor *v, } #endif =20 +static void riscv_cpu_add_qdev_prop_array(DeviceState *dev, Property *arra= y) +{ + for (Property *prop =3D array; prop && prop->name; prop++) { + qdev_property_add_static(dev, prop); + } +} + #ifndef CONFIG_USER_ONLY static void riscv_cpu_add_kvm_unavail_prop(Object *obj, const char *prop_n= ame) { @@ -1939,7 +1946,6 @@ static void riscv_cpu_add_kvm_properties(Object *obj) */ static void riscv_cpu_add_user_properties(Object *obj) { - Property *prop; DeviceState *dev =3D DEVICE(obj); =20 #ifndef CONFIG_USER_ONLY @@ -1953,21 +1959,10 @@ static void riscv_cpu_add_user_properties(Object *o= bj) =20 riscv_cpu_add_misa_properties(obj); =20 - for (prop =3D riscv_cpu_extensions; prop && prop->name; prop++) { - qdev_property_add_static(dev, prop); - } - - for (prop =3D riscv_cpu_options; prop && prop->name; prop++) { - qdev_property_add_static(dev, prop); - } - - for (prop =3D riscv_cpu_vendor_exts; prop && prop->name; prop++) { - qdev_property_add_static(dev, prop); - } - - for (prop =3D riscv_cpu_experimental_exts; prop && prop->name; prop++)= { - qdev_property_add_static(dev, prop); - } + riscv_cpu_add_qdev_prop_array(dev, riscv_cpu_extensions); + riscv_cpu_add_qdev_prop_array(dev, riscv_cpu_options); + riscv_cpu_add_qdev_prop_array(dev, riscv_cpu_vendor_exts); + riscv_cpu_add_qdev_prop_array(dev, riscv_cpu_experimental_exts); } =20 static Property riscv_cpu_properties[] =3D { --=20 2.41.0