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(unknown [166.111.226.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) (Authenticated sender: c@jia.je) by hognose1.porkbun.com (Postfix) with ESMTPSA id 23D8B44018; Wed, 9 Aug 2023 08:33:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jia.je; s=default; t=1691570007; bh=pPVeLw5Ke/6zjZzDYhr652dbJXYnLiaCXXK+JK80oLY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=KXzCS2b/x3lqAxf+rLx2UKrT+2Jo91XyzhcsjuvdwCbaG78KFDqZWpFU9/GCvA4vg IwoSbhbeG5RWDCFV0NZqZL9VcbuwkQhNeVqxZ/5Dm4XMENG3n7V5IU563uVnpTExOz nGPuF842nVV1S/9gfGAOqHfNdHQ26utRjIjpVyho= From: Jiajie Chen To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org, yijun@loongson.cn, shenjinyang@loongson.cn, gaosong@loongson.cn, i.qemu@xen0n.name, Jiajie Chen , Xiaojuan Yang , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v5 03/11] target/loongarch: Add GDB support for loongarch32 mode Date: Wed, 9 Aug 2023 16:26:31 +0800 Message-ID: <20230809083258.1787464-4-c@jia.je> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230809083258.1787464-1-c@jia.je> References: <20230809083258.1787464-1-c@jia.je> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=35.82.102.206; envelope-from=c@jia.je; helo=hognose1.porkbun.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @jia.je) X-ZM-MESSAGEID: 1691570036083100003 Content-Type: text/plain; charset="utf-8" GPRs and PC are 32-bit wide in loongarch32 mode. Signed-off-by: Jiajie Chen Reviewed-by: Richard Henderson --- configs/targets/loongarch64-softmmu.mak | 2 +- gdb-xml/loongarch-base32.xml | 45 +++++++++++++++++++++++++ target/loongarch/cpu.c | 10 +++++- target/loongarch/gdbstub.c | 32 ++++++++++++++---- 4 files changed, 80 insertions(+), 9 deletions(-) create mode 100644 gdb-xml/loongarch-base32.xml diff --git a/configs/targets/loongarch64-softmmu.mak b/configs/targets/loon= garch64-softmmu.mak index 9abc99056f..f23780fdd8 100644 --- a/configs/targets/loongarch64-softmmu.mak +++ b/configs/targets/loongarch64-softmmu.mak @@ -1,5 +1,5 @@ TARGET_ARCH=3Dloongarch64 TARGET_BASE_ARCH=3Dloongarch TARGET_SUPPORTS_MTTCG=3Dy -TARGET_XML_FILES=3D gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml +TARGET_XML_FILES=3D gdb-xml/loongarch-base32.xml gdb-xml/loongarch-base64.= xml gdb-xml/loongarch-fpu.xml TARGET_NEED_FDT=3Dy diff --git a/gdb-xml/loongarch-base32.xml b/gdb-xml/loongarch-base32.xml new file mode 100644 index 0000000000..af47bbd3da --- /dev/null +++ b/gdb-xml/loongarch-base32.xml @@ -0,0 +1,45 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index c6b73444b4..30dd70571a 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -694,7 +694,13 @@ static const struct SysemuCPUOps loongarch_sysemu_ops = =3D { =20 static gchar *loongarch_gdb_arch_name(CPUState *cs) { - return g_strdup("loongarch64"); + LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); + CPULoongArchState *env =3D &cpu->env; + if (is_la64(env)) { + return g_strdup("loongarch64"); + } else { + return g_strdup("loongarch32"); + } } =20 static void loongarch_cpu_class_init(ObjectClass *c, void *data) @@ -734,6 +740,8 @@ static void loongarch_cpu_class_init(ObjectClass *c, vo= id *data) =20 static void loongarch32_cpu_class_init(ObjectClass *c, void *data) { + CPUClass *cc =3D CPU_CLASS(c); + cc->gdb_core_xml_file =3D "loongarch-base32.xml"; } =20 #define DEFINE_LOONGARCH_CPU_TYPE(model, initfn) \ diff --git a/target/loongarch/gdbstub.c b/target/loongarch/gdbstub.c index 0752fff924..a462e25737 100644 --- a/target/loongarch/gdbstub.c +++ b/target/loongarch/gdbstub.c @@ -34,16 +34,25 @@ int loongarch_cpu_gdb_read_register(CPUState *cs, GByte= Array *mem_buf, int n) { LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); CPULoongArchState *env =3D &cpu->env; + uint64_t val; =20 if (0 <=3D n && n < 32) { - return gdb_get_regl(mem_buf, env->gpr[n]); + val =3D env->gpr[n]; } else if (n =3D=3D 32) { /* orig_a0 */ - return gdb_get_regl(mem_buf, 0); + val =3D 0; } else if (n =3D=3D 33) { - return gdb_get_regl(mem_buf, env->pc); + val =3D env->pc; } else if (n =3D=3D 34) { - return gdb_get_regl(mem_buf, env->CSR_BADV); + val =3D env->CSR_BADV; + } + + if (0 <=3D n && n <=3D 34) { + if (is_la64(env)) { + return gdb_get_reg64(mem_buf, val); + } else { + return gdb_get_reg32(mem_buf, val); + } } return 0; } @@ -52,15 +61,24 @@ int loongarch_cpu_gdb_write_register(CPUState *cs, uint= 8_t *mem_buf, int n) { LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); CPULoongArchState *env =3D &cpu->env; - target_ulong tmp =3D ldtul_p(mem_buf); + target_ulong tmp; + int read_length; int length =3D 0; =20 + if (is_la64(env)) { + tmp =3D ldq_p(mem_buf); + read_length =3D 8; + } else { + tmp =3D ldl_p(mem_buf); + read_length =3D 4; + } + if (0 <=3D n && n < 32) { env->gpr[n] =3D tmp; - length =3D sizeof(target_ulong); + length =3D read_length; } else if (n =3D=3D 33) { env->pc =3D tmp; - length =3D sizeof(target_ulong); + length =3D read_length; } return length; } --=20 2.41.0