From nobody Sun May 12 15:13:57 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=sifive.com ARC-Seal: i=1; a=rsa-sha256; t=1688460110; cv=none; d=zohomail.com; s=zohoarc; b=YdlD3a3ZDor4oGwcx1Udd1SYb/sqXAHREfWnjyB5a8HXL0JjlB5FuY+Y3xfmbnR3zfrHNzSUIY98rYXo5zgpQE/gpQpk10zyDp5St8QSzSOmgjbSTyMNwUWDUA9kk8O81Qqu2kY0/qBjvm7JQ1fdadJtOqtpa6v+8GiyC4UbpJ8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1688460110; h=Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:Sender:Subject:To; bh=AzQwHilUs2+h3+nromIKPNidcbjRoSUxGEzJrfFiXVs=; b=mqdxQBJu3i/We44+X/JrhYQ/Dw0SzX5pTLfeR7sqm7kegok+fphP+KCAcL6b30scbKHxOuItAtFzEFtArEJdBgfPee8KOE8b7PvJrxS6xMgVCBGy/Jkuya2nh+ouOqf6mDNtY+rldahNtGGhZvaXQ6C7Qb+qB4TQQsN14S8WKXU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1688460110920882.7032878123018; Tue, 4 Jul 2023 01:41:50 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qGbb8-0001No-F3; Tue, 04 Jul 2023 04:41:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qGbb7-0001NS-Cb for qemu-devel@nongnu.org; Tue, 04 Jul 2023 04:41:21 -0400 Received: from mail-pg1-x535.google.com ([2607:f8b0:4864:20::535]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qGbb5-00005M-FR for qemu-devel@nongnu.org; Tue, 04 Jul 2023 04:41:20 -0400 Received: by mail-pg1-x535.google.com with SMTP id 41be03b00d2f7-55af0a816e4so2721949a12.1 for ; Tue, 04 Jul 2023 01:41:19 -0700 (PDT) Received: from hsinchu26.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id f1-20020a170902ab8100b001b80b428d4bsm13870188plr.67.2023.07.04.01.41.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Jul 2023 01:41:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1688460078; x=1691052078; h=message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AzQwHilUs2+h3+nromIKPNidcbjRoSUxGEzJrfFiXVs=; b=mpcVt1iaFZezX07RMdpb+pWV3H9LWWJOUdgjCLeeObyq8iLnutYz92JzEjPW5SA6tq /bG49B/Yjmh095FCdmTyEv5eltp1PJBBihQg9a3SjuT28wQuh+s55OGffyBHZ+1c8Izb VziXrOmzLag2D94QlMdPEjr5kkmCAcA4GE5kw8hfsx35bVJEzF1B8Kl8yvzzpfcaB3WZ yHxiEL9GF4ApNpsz5A34etcqEz4JweM2X5vTztUoOZ0KfGgDMMUJEwCRfOmpsgChIQan a9ETf36PcPmSiKJLXrbiyqphjgWD0FbpqZuLr6mVm/4DnZ6F3kCd+9Y4mjVDt3ISwlpV dv9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688460078; x=1691052078; h=message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AzQwHilUs2+h3+nromIKPNidcbjRoSUxGEzJrfFiXVs=; b=g0pEpX/q5NDb3HQBsKJUeKH5MA1OFvuE5313LBJHhOGrFpl2dKvPTJcDljMxnVKz/w yK0d/j2Wc7+Nw6CWNxQHOCycxKcvEbw4cYfAYkDYhwk6pUWJdEszmpYNy/j9NF4RxBcD /FtNMSDLl4VyM+zAJlCA3n4wAS9oyVyvKUX5z5qvG8+l1HrWU0EMln0AGXtcCsLgQqlq l+rj8rtPb5J+Y4823yHgcD5r7PdGAQy98jEA7czcWzu7nEtXdVSMrcxhJezhVSv8sB42 n6ekGhV29jeVlMTs/gV5M4P7TiXywVXcDVoA6Q7Vd0HcMUH2idrX18QU+Xh6xEyVOsC6 yKRw== X-Gm-Message-State: AC+VfDz6NDIdaBw0AdqJ6ZILOpdq7BUIOsKEFswb0Rp/i4OaR2nuP5Ej AFLzEM4j/caK4rKTii+0YxHc+jFgvkGUX0Q0kCKUlWfveZiK3XyaJSP92xtkVt+012PwdqqdZ/Z 1U6tpyzn1M+GK7DGB3P+AGITcdNkmtC7PeH2f/MrvzJ5OD5mMW0sew9HhswV1kyKf4O/qKxHdgl 7CGQ== X-Google-Smtp-Source: ACHHUZ59u0NA2vfQbDTqTWiGhs2RRDG1P0Npmnmqs1+xE1URZGAdm5RlX3YFj1KJQw/nE7C3HpRf2g== X-Received: by 2002:a05:6a20:3212:b0:12c:763b:f098 with SMTP id hl18-20020a056a20321200b0012c763bf098mr8898296pzc.11.1688460077504; Tue, 04 Jul 2023 01:41:17 -0700 (PDT) From: Jason Chien To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Jason Chien , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei Subject: [PATCH] target/riscv: Add Zihintntl extension ISA string to DTS Date: Tue, 4 Jul 2023 08:40:10 +0000 Message-Id: <20230704084013.21749-1-jason.chien@sifive.com> X-Mailer: git-send-email 2.17.1 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=jason.chien@sifive.com; helo=mail-pg1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @sifive.com) X-ZM-MESSAGEID: 1688460113455100001 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" RVA23 Profiles states: The RVA23 profiles are intended to be used for 64-bit application processors that will run rich OS stacks from standard binary OS distributions and with a substantial number of third-party binary user applications that will be supported over a considerable length of time in the field. The chapter 4 of the unprivileged spec introduces the Zihintntl extension and Zihintntl is a mandatory extension presented in RVA23 Profiles, whose purpose is to enable application and operating system portability across different implementations. Thus the DTS should contain the Zihintntl ISA string in order to pass to software. The unprivileged spec states: Like any HINTs, these instructions may be freely ignored. Hence, although they are described in terms of cache-based memory hierarchies, they do not mandate the provision of caches. These instructions are encoded with used opcode, e.g. ADD x0, x0, x2, which QEMU already supports, and QEMU does not emulate cache. Therefore these instructions can be considered as a no-op, and we only need to add a new property for the Zihintntl extension. Signed-off-by: Jason Chien Reviewed-by: Alistair Francis Reviewed-by: Frank Chang --- target/riscv/cpu.c | 2 ++ target/riscv/cpu_cfg.h | 1 + 2 files changed, 3 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 881bddf393..6fd21466a4 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -81,6 +81,7 @@ static const struct isa_ext_data isa_edata_arr[] =3D { ISA_EXT_DATA_ENTRY(zicond, PRIV_VERSION_1_12_0, ext_zicond), ISA_EXT_DATA_ENTRY(zicsr, PRIV_VERSION_1_10_0, ext_icsr), ISA_EXT_DATA_ENTRY(zifencei, PRIV_VERSION_1_10_0, ext_ifencei), + ISA_EXT_DATA_ENTRY(zihintntl, PRIV_VERSION_1_10_0, ext_zihintntl), ISA_EXT_DATA_ENTRY(zihintpause, PRIV_VERSION_1_10_0, ext_zihintpause), ISA_EXT_DATA_ENTRY(zawrs, PRIV_VERSION_1_12_0, ext_zawrs), ISA_EXT_DATA_ENTRY(zfh, PRIV_VERSION_1_11_0, ext_zfh), @@ -1598,6 +1599,7 @@ static Property riscv_cpu_extensions[] =3D { DEFINE_PROP_BOOL("sscofpmf", RISCVCPU, cfg.ext_sscofpmf, false), DEFINE_PROP_BOOL("Zifencei", RISCVCPU, cfg.ext_ifencei, true), DEFINE_PROP_BOOL("Zicsr", RISCVCPU, cfg.ext_icsr, true), + DEFINE_PROP_BOOL("Zihintntl", RISCVCPU, cfg.ext_zihintntl, true), DEFINE_PROP_BOOL("Zihintpause", RISCVCPU, cfg.ext_zihintpause, true), DEFINE_PROP_BOOL("Zawrs", RISCVCPU, cfg.ext_zawrs, true), DEFINE_PROP_BOOL("Zfh", RISCVCPU, cfg.ext_zfh, false), diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h index c4a627d335..c7da2facef 100644 --- a/target/riscv/cpu_cfg.h +++ b/target/riscv/cpu_cfg.h @@ -66,6 +66,7 @@ struct RISCVCPUConfig { bool ext_icbom; bool ext_icboz; bool ext_zicond; + bool ext_zihintntl; bool ext_zihintpause; bool ext_smstateen; bool ext_sstc; --=20 2.17.1