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Thu, 29 Jun 2023 05:03:05 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Marcel Apfelbaum , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Richard Henderson , Yanan Wang , Alistair Francis , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Weiwei Li , Palmer Dabbelt , Eduardo Habkost , Liu Zhiwei , =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PATCH 1/2] target/riscv: Check for CF_PARALLEL instead of qemu_tcg_mttcg_enabled Date: Thu, 29 Jun 2023 14:02:54 +0200 Message-Id: <20230629120255.85581-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230629120255.85581-1-philmd@linaro.org> References: <20230629120255.85581-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1688040203477100005 A CPU knows whether MTTCG is enabled or not because it is reflected in its TCG flags via the CF_PARALLEL bit. Suggested-by: Alex Benn=C3=A9e Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/riscv/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 4035fe0e62..4dfa64af6a 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -473,7 +473,7 @@ static void rv64_veyron_v1_cpu_init(Object *obj) =20 static void rv128_base_cpu_init(Object *obj) { - if (qemu_tcg_mttcg_enabled()) { + if (CPU(obj)->tcg_cflags & CF_PARALLEL) { /* Missing 128-bit aligned atomics */ error_report("128-bit RISC-V currently does not work with Multi " "Threaded TCG. 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Thu, 29 Jun 2023 05:03:12 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Marcel Apfelbaum , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Richard Henderson , Yanan Wang , Alistair Francis , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Weiwei Li , Palmer Dabbelt , Eduardo Habkost , Liu Zhiwei Subject: [PATCH 2/2] accel/tcg: Replace qemu_tcg_mttcg_enabled() by mttcg_enabled Date: Thu, 29 Jun 2023 14:02:55 +0200 Message-Id: <20230629120255.85581-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230629120255.85581-1-philmd@linaro.org> References: <20230629120255.85581-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1688040239304100003 Move 'mttcg_enabled' declaration to "tcg-accel-ops-mttcg.h" which is a TCG-internal header; un-inline and remove the qemu_tcg_mttcg_enabled() definition. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- accel/tcg/tcg-accel-ops-mttcg.h | 8 ++++++++ include/hw/core/cpu.h | 9 --------- accel/tcg/tcg-accel-ops.c | 2 +- tcg/region.c | 3 ++- 4 files changed, 11 insertions(+), 11 deletions(-) diff --git a/accel/tcg/tcg-accel-ops-mttcg.h b/accel/tcg/tcg-accel-ops-mttc= g.h index 8ffa7a9a9f..1ffe8f3ac2 100644 --- a/accel/tcg/tcg-accel-ops-mttcg.h +++ b/accel/tcg/tcg-accel-ops-mttcg.h @@ -10,6 +10,14 @@ #ifndef TCG_ACCEL_OPS_MTTCG_H #define TCG_ACCEL_OPS_MTTCG_H =20 +/** + * qemu_tcg_mttcg_enabled: + * Check whether we are running MultiThread TCG or not. + * + * Returns: %true if we are in MTTCG mode %false otherwise. + */ +extern bool mttcg_enabled; + /* kick MTTCG vCPU thread */ void mttcg_kick_vcpu_thread(CPUState *cpu); =20 diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index b08f8b7079..5d26e6c90c 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -456,15 +456,6 @@ extern CPUTailQ cpus; =20 extern __thread CPUState *current_cpu; =20 -/** - * qemu_tcg_mttcg_enabled: - * Check whether we are running MultiThread TCG or not. - * - * Returns: %true if we are in MTTCG mode %false otherwise. - */ -extern bool mttcg_enabled; -#define qemu_tcg_mttcg_enabled() (mttcg_enabled) - /** * cpu_paging_enabled: * @cpu: The CPU whose state is to be inspected. diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 3973591508..5391f078cf 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -188,7 +188,7 @@ static inline void tcg_remove_all_breakpoints(CPUState = *cpu) =20 static void tcg_accel_ops_init(AccelOpsClass *ops) { - if (qemu_tcg_mttcg_enabled()) { + if (mttcg_enabled) { ops->create_vcpu_thread =3D mttcg_start_vcpu_thread; ops->kick_vcpu_thread =3D mttcg_kick_vcpu_thread; ops->handle_interrupt =3D tcg_handle_interrupt; diff --git a/tcg/region.c b/tcg/region.c index 2b28ed3556..45f1742271 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -32,6 +32,7 @@ #include "qapi/error.h" #include "tcg/tcg.h" #include "exec/translation-block.h" +#include "accel/tcg/tcg-accel-ops-mttcg.h" #include "tcg-internal.h" =20 =20 @@ -413,7 +414,7 @@ static size_t tcg_n_regions(size_t tb_size, unsigned ma= x_cpus) * dividing the code_gen_buffer among the vCPUs. */ /* Use a single region if all we have is one vCPU thread */ - if (max_cpus =3D=3D 1 || !qemu_tcg_mttcg_enabled()) { + if (max_cpus =3D=3D 1 || !mttcg_enabled) { return 1; } =20 --=20 2.38.1