From nobody Tue Feb 10 12:58:21 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1688005081; cv=none; d=zohomail.com; s=zohoarc; b=AePfgh3LDNlDuAVxzm6LENboQoCzadDI3bZCQYJLnj/GwLzDmLVe1ZeXdkTFk77ZzLCarvc5vxL/I5rD0QuZkBTHZ8Lz38EuqGkGex9duOUiGUaNBaQpz3iTE4iP8xDO9PlmJxK3pnDHPkFekNQGBcuqwCdUFe96DR3lw5yjtfg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1688005081; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=UsVkoaKhdpMxCFb5Bp7hZABpDYKHsh9t+iRQ0xTvaXo=; b=glw4sef8dxD9CL8GIElvU3neq5v57L7IQM5E1jobjQ8qgtKgE28z1svshgYsIcRvE1veCJbYwTEZDc0rU5vLW6nVEFefcN1rwPxnYq4ifhqxNhZzlRyNNrxT3wDcPv61yaKFZuVsDDKh5V+SkAEqXfYKLFjYZfeBjiskGAYo+X0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 168800508141949.38342026960993; Wed, 28 Jun 2023 19:18:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qEhDK-0002zw-4J; Wed, 28 Jun 2023 22:16:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qEhDI-0002zh-Le; Wed, 28 Jun 2023 22:16:52 -0400 Received: from mail-pf1-x432.google.com ([2607:f8b0:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qEhDG-0003u5-5J; Wed, 28 Jun 2023 22:16:51 -0400 Received: by mail-pf1-x432.google.com with SMTP id d2e1a72fcca58-6689430d803so146183b3a.0; Wed, 28 Jun 2023 19:16:49 -0700 (PDT) Received: from wheely.local0.net ([125.254.1.121]) by smtp.gmail.com with ESMTPSA id 5-20020aa79145000000b0063b96574b8bsm7480123pfi.220.2023.06.28.19.16.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Jun 2023 19:16:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1688005008; x=1690597008; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UsVkoaKhdpMxCFb5Bp7hZABpDYKHsh9t+iRQ0xTvaXo=; b=dcpTqPIcgi9E9Hc1R9MBQmdVquQ8wmBw6hx9DQfl26G7/xMGqkaSTrZoHT+2dNyxSd eMtQQoVHN3iTzyacwGc4Pc81/9rY+9QKIScSKPahWsJaTe2SQIIALS++q+UWiSRgbamB 1xLKq9QcCNwUMFereU8p1zntxKrFuZ2lO2/3LHeGKXhadLGZ6buvsT0/c29837XrJSBK 5VOmaX0rOhZD58uKDUwnVriGEB3KlyhSqn+swREzuKBLEzpm8DraeqTpD9v3jMUW2TP+ OnBN857ApCY90q1prmCo8RlETdd1T5hXgDWzYi79dm0IVBuGe+46RKZxoH6L4Sb4btdv rDvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688005008; x=1690597008; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UsVkoaKhdpMxCFb5Bp7hZABpDYKHsh9t+iRQ0xTvaXo=; b=gmD+lpzOeNDFSntdo7lqtrzxJl2rzgxuLcgLpaZYKjR17dQpy1RsIP2Z15Wtd3aCq3 GZSfJ+7WZlJO9AUk4EowpfSi6bgoFa9Os8Nda7gWfN6YuS8jiggJE/x5rIiMzA/Fpbkn dbCDyNnUAXaZE0QtfIfCeUGlFcRoGnYpV/+3T9PG3jUtShgd5tvfQyz6r1YLyli7k5lt djEV6RX9CA5gwpqgMg2lkuoaE5brUuNWTFpPaCJvIE1fnX2IIlDJ9imASGoELPSLWEcg ouCb7CJT94vJTJutFrjN+bl7oi6HXyjhdUZ3wJmgMGv0oBQ4/WxelXQN474a7j2i2v9D EzuA== X-Gm-Message-State: AC+VfDzVLlxQKcWh7TmLMe4Xwpo880txgv/jI10HD2bWjzLpplebPXUS jdGbIWZKPcotRnDbFFpX55wwdT4epW8= X-Google-Smtp-Source: ACHHUZ64cqL2JQfaG0Owp03x5Oo/ZhwLDNDZ3Fe83k2KuFzRshkS6Zr1GNYUkMmK3CtzVfVWA8aK4w== X-Received: by 2002:a05:6a00:2e10:b0:666:ae6b:c476 with SMTP id fc16-20020a056a002e1000b00666ae6bc476mr37076320pfb.25.1688005008239; Wed, 28 Jun 2023 19:16:48 -0700 (PDT) From: Nicholas Piggin To: qemu-devel@nongnu.org Cc: Nicholas Piggin , qemu-ppc@nongnu.org, Daniel Henrique Barboza , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , David Gibson , Greg Kurz , Harsh Prateek Bora Subject: [RFC PATCH 1/3] target/ppc: Add LPAR-per-core vs per-thread mode flag Date: Thu, 29 Jun 2023 12:16:31 +1000 Message-Id: <20230629021633.328916-2-npiggin@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230629021633.328916-1-npiggin@gmail.com> References: <20230629021633.328916-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=npiggin@gmail.com; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1688005083626100003 Content-Type: text/plain; charset="utf-8" The Power ISA has the concept of sub-processors: Hardware is allowed to sub-divide a multi-threaded processor into "sub-processors" that appear to privileged programs as multi-threaded processors with fewer threads. POWER9 and POWER10 have two modes, either every thread is a sub-processor or all threads appear as one multi-threaded processor. In the user manuals these are known as "LPAR-per-thread" and "LPAR per core" (or "1LPAR"), respectively. The practical difference is in LPAR-per-thread mode, non-hypervisor SPRs are not shared between threads and msgsndp can not be used to message siblings. In 1LPAR mode some SPRs are shared and msgsndp is usable. LPPT allows multiple partitions to run concurrently on the same core, and is a requirement for KVM to run on POWER9/10. Traditionally, SMT in PAPR environments including PowerVM and the pseries machine with KVM acceleration beahves as in 1LPAR mode. In OPAL systems, LPAR-per-thread is used. When adding SMT to the powernv machine, it is preferable to emulate OPAL LPAR-per-thread, so to account for this difference a flag is added and SPRs may become either per-thread, per-core shared, or per-LPAR shared. Per-LPAR registers become either per-thread or per-core shared depending on the mode. Signed-off-by: Nicholas Piggin Reviewed-by: Joel Stanley --- hw/ppc/spapr_cpu_core.c | 2 ++ target/ppc/cpu.h | 3 +++ target/ppc/cpu_init.c | 12 ++++++++++++ target/ppc/translate.c | 16 +++++++++++++--- 4 files changed, 30 insertions(+), 3 deletions(-) diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index a4e3c2fadd..b482d9754a 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -270,6 +270,8 @@ static bool spapr_realize_vcpu(PowerPCCPU *cpu, SpaprMa= chineState *spapr, env->spr_cb[SPR_PIR].default_value =3D cs->cpu_index; env->spr_cb[SPR_TIR].default_value =3D thread_index; =20 + cpu_ppc_set_1lpar(cpu); + /* Set time-base frequency to 512 MHz. vhyp must be set first. */ cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ); =20 diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 94497aa115..beddc5db5b 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -674,6 +674,8 @@ enum { POWERPC_FLAG_SCV =3D 0x00200000, /* Has >1 thread per core = */ POWERPC_FLAG_SMT =3D 0x00400000, + /* Using "LPAR per core" mode (as opposed to per-thread) = */ + POWERPC_FLAG_1LPAR =3D 0x00800000, }; =20 /* @@ -1435,6 +1437,7 @@ void store_booke_tsr(CPUPPCState *env, target_ulong v= al); void ppc_tlb_invalidate_all(CPUPPCState *env); void ppc_tlb_invalidate_one(CPUPPCState *env, target_ulong addr); void cpu_ppc_set_vhyp(PowerPCCPU *cpu, PPCVirtualHypervisor *vhyp); +void cpu_ppc_set_1lpar(PowerPCCPU *cpu); int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t *tlb, hwaddr *raddrp, target_ulong address, uint32_t pid); int ppcemb_tlb_search(CPUPPCState *env, target_ulong address, uint32_t pid= ); diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index aeff71d063..dc3a65a575 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6601,6 +6601,18 @@ void cpu_ppc_set_vhyp(PowerPCCPU *cpu, PPCVirtualHyp= ervisor *vhyp) env->msr_mask &=3D ~MSR_HVB; } =20 +void cpu_ppc_set_1lpar(PowerPCCPU *cpu) +{ + CPUPPCState *env =3D &cpu->env; + + /* + * pseries SMT means "LPAR per core" mode, e.g., msgsndp is usable + * between threads. + */ + if (env->flags & POWERPC_FLAG_SMT) { + env->flags |=3D POWERPC_FLAG_1LPAR; + } +} #endif /* !defined(CONFIG_USER_ONLY) */ =20 #endif /* defined(TARGET_PPC64) */ diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 372ee600b2..ef186396b4 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -256,6 +256,16 @@ static inline bool gen_serialize_core(DisasContext *ct= x) } #endif =20 +static inline bool gen_serialize_core_lpar(DisasContext *ctx) +{ + /* 1LPAR implies SMT */ + if (ctx->flags & POWERPC_FLAG_1LPAR) { + return gen_serialize(ctx); + } + + return true; +} + /* SPR load/store helpers */ static inline void gen_load_spr(TCGv t, int reg) { @@ -451,7 +461,7 @@ static void spr_write_CTRL_ST(DisasContext *ctx, int sp= rn, int gprn) =20 void spr_write_CTRL(DisasContext *ctx, int sprn, int gprn) { - if (!(ctx->flags & POWERPC_FLAG_SMT)) { + if (!(ctx->flags & POWERPC_FLAG_1LPAR)) { spr_write_CTRL_ST(ctx, sprn, gprn); goto out; } @@ -815,7 +825,7 @@ void spr_write_pcr(DisasContext *ctx, int sprn, int gpr= n) /* DPDES */ void spr_read_dpdes(DisasContext *ctx, int gprn, int sprn) { - if (!gen_serialize_core(ctx)) { + if (!gen_serialize_core_lpar(ctx)) { return; } =20 @@ -824,7 +834,7 @@ void spr_read_dpdes(DisasContext *ctx, int gprn, int sp= rn) =20 void spr_write_dpdes(DisasContext *ctx, int sprn, int gprn) { - if (!gen_serialize_core(ctx)) { + if (!gen_serialize_core_lpar(ctx)) { return; } =20 --=20 2.40.1 From nobody Tue Feb 10 12:58:21 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1688005088; cv=none; d=zohomail.com; s=zohoarc; b=h6rO/n+U9O44GpRn27IPxL8aWwgfpS6uQ/B/CFVVfzsV0J6R7x9q5ff8lgVeI9xkQAZZRbqDlP/8+3k6ODGGEJ4BLxNgfSs8OkJWUhZSs4VYChsQ0edvJ/FCrLR6AlleNMv+72VHhvo5cBwMY2IXJEsSuYwDR2z0YpLbkPukUzY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1688005088; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=8rkGdZzz8N4Sv2AShwYiATwcYhKmifYVckbvYFgsHAI=; b=RNdyZsoNdARGjB4+Sh4GEs869qLmdIqX/wUnQzw5g7fim+EPH8y8e2iV1U61AKZIufly1R7Af7dgQXnc0iGuR7MHXpJSG7Apm5pZCRnNWBfueTPTqpUISztPrnyBUXElVQdWnR1tQM3Oo/zI29eMSLtJawpTW4e/DbekOND04DY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1688005088593198.87248585078737; Wed, 28 Jun 2023 19:18:08 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qEhDP-000315-5g; Wed, 28 Jun 2023 22:16:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qEhDM-00030X-8L; Wed, 28 Jun 2023 22:16:57 -0400 Received: from mail-pf1-x432.google.com ([2607:f8b0:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qEhDK-0003vv-JA; Wed, 28 Jun 2023 22:16:56 -0400 Received: by mail-pf1-x432.google.com with SMTP id d2e1a72fcca58-666e64e97e2so137694b3a.1; Wed, 28 Jun 2023 19:16:53 -0700 (PDT) Received: from wheely.local0.net ([125.254.1.121]) by smtp.gmail.com with ESMTPSA id 5-20020aa79145000000b0063b96574b8bsm7480123pfi.220.2023.06.28.19.16.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Jun 2023 19:16:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1688005012; x=1690597012; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8rkGdZzz8N4Sv2AShwYiATwcYhKmifYVckbvYFgsHAI=; b=jNByoFUGurheJIs4m3/3b2yU8OCDtIIjz/++GcqMWtra6+a7Ekua+enK69gEFaszO3 0qWCOZtkT5jRxrPnwoj8gkMqbwXlJT4Apa4YH+mjkZQhkhCGXAUaoZaXpNMe49tIyoPT 2hMsC7Gz+6q9rTrAbEwv+MHGJkJwQj/Q528q/BLOQwCrK2BO4b0HrnoHD896KwoE8ZK1 4dC9mNg6DtWB4+XI1li2CjCB8KdUuj7PowIFnzQmYdiORUb+bFnf+fs0ARAZXIfpbIh5 OJtj5Uci7azaRbPlbFEqDPSwvjj2aGfg6xkx7vetgUB7ZS4OjAZRZWHJzgd/ovUsYTpF bApg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688005012; x=1690597012; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8rkGdZzz8N4Sv2AShwYiATwcYhKmifYVckbvYFgsHAI=; b=kmA+LymvMoLo6/DUIREoeMT/zBY8FWw0YE/sPJn0QWbS8YfxmeywHsfun6dm78toVy grAgsj7IWC8PxwgQTnzkfZE2op6AcP1zCtbcxwGCMuIGl71lJMil1hWRQ8Dq9jc77SHO kSoQkids48L5cKxObfKoAp6h+bugL57GaAHJUC96Mg33armkOzW8nurOc+qp/0Y7n7mH cnmsa02E+VqAsNouuQ/Dm6u7Jx1d+IkdXG8ZAHSi6v/rpbJpylJs8AIw6Ty1x/HkfqjD 5WwXV2giri5YgEMBdDX34VbJcnJ5Mm8Dm4576JNbQWJFyoBEBIEhDBkMF7PC6r77+5f4 Jvmg== X-Gm-Message-State: AC+VfDxh5mhLh2SO3lHDNEQ28tCAMdSvtTZSJJNtT3GHn+7CS9DVDyf+ DTLy/EqhbQ7opFDNfmdKt1XJ+mTePnU= X-Google-Smtp-Source: ACHHUZ7cQymr/Xd4OMSIUaWIIpkHk2e7s7HcmYNXhae95fJsRLt5T6fJmqxbEAidQyTpuRA+EcgB+g== X-Received: by 2002:a05:6a20:1053:b0:127:824b:a71 with SMTP id gt19-20020a056a20105300b00127824b0a71mr7530564pzc.61.1688005012633; Wed, 28 Jun 2023 19:16:52 -0700 (PDT) From: Nicholas Piggin To: qemu-devel@nongnu.org Cc: Nicholas Piggin , qemu-ppc@nongnu.org, Daniel Henrique Barboza , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , David Gibson , Greg Kurz , Harsh Prateek Bora Subject: [RFC PATCH 2/3] target/ppc: SMT support for the HID SPR Date: Thu, 29 Jun 2023 12:16:32 +1000 Message-Id: <20230629021633.328916-3-npiggin@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230629021633.328916-1-npiggin@gmail.com> References: <20230629021633.328916-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=npiggin@gmail.com; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1688005089304100001 Content-Type: text/plain; charset="utf-8" HID is a per-core shared register, skiboot sets this (e.g., setting HILE) on one thread and that must affect all threads of the core. Signed-off-by: Nicholas Piggin --- target/ppc/cpu_init.c | 2 +- target/ppc/helper.h | 1 + target/ppc/misc_helper.c | 21 +++++++++++++++++++++ target/ppc/spr_common.h | 1 + target/ppc/translate.c | 16 ++++++++++++++++ 5 files changed, 40 insertions(+), 1 deletion(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index dc3a65a575..a1b01dc479 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -5373,7 +5373,7 @@ static void register_book3s_ids_sprs(CPUPPCState *env) spr_register_hv(env, SPR_HID0, "HID0", SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_core_write_generic, 0x00000000); spr_register_hv(env, SPR_TSCR, "TSCR", SPR_NOACCESS, SPR_NOACCESS, diff --git a/target/ppc/helper.h b/target/ppc/helper.h index fda40b8a60..719752b38a 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -704,6 +704,7 @@ DEF_HELPER_3(store_dcr, void, env, tl, tl) =20 DEF_HELPER_2(load_dump_spr, void, env, i32) DEF_HELPER_2(store_dump_spr, void, env, i32) +DEF_HELPER_3(spr_core_write_generic, void, env, i32, tl) DEF_HELPER_3(spr_write_CTRL, void, env, i32, tl) =20 DEF_HELPER_4(fscr_facility_check, void, env, i32, i32, i32) diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c index 1f1af21f33..0da335472e 100644 --- a/target/ppc/misc_helper.c +++ b/target/ppc/misc_helper.c @@ -43,6 +43,27 @@ void helper_store_dump_spr(CPUPPCState *env, uint32_t sp= rn) env->spr[sprn]); } =20 +void helper_spr_core_write_generic(CPUPPCState *env, uint32_t sprn, + target_ulong val) +{ + CPUState *cs =3D env_cpu(env); + CPUState *ccs; + uint32_t nr_threads =3D cs->nr_threads; + uint32_t core_id =3D env->spr[SPR_PIR] & ~(nr_threads - 1); + + assert(core_id =3D=3D env->spr[SPR_PIR] - env->spr[SPR_TIR]); + + if (nr_threads =3D=3D 1) { + env->spr[sprn] =3D val; + return; + } + + THREAD_SIBLING_FOREACH(cs, ccs) { + CPUPPCState *cenv =3D &POWERPC_CPU(ccs)->env; + cenv->spr[sprn] =3D val; + } +} + void helper_spr_write_CTRL(CPUPPCState *env, uint32_t sprn, target_ulong val) { diff --git a/target/ppc/spr_common.h b/target/ppc/spr_common.h index 4c0f2bed77..aae66ee966 100644 --- a/target/ppc/spr_common.h +++ b/target/ppc/spr_common.h @@ -82,6 +82,7 @@ void spr_noaccess(DisasContext *ctx, int gprn, int sprn); void spr_read_generic(DisasContext *ctx, int gprn, int sprn); void spr_write_generic(DisasContext *ctx, int sprn, int gprn); void spr_write_generic32(DisasContext *ctx, int sprn, int gprn); +void spr_core_write_generic(DisasContext *ctx, int sprn, int gprn); void spr_write_MMCR0(DisasContext *ctx, int sprn, int gprn); void spr_write_MMCR1(DisasContext *ctx, int sprn, int gprn); void spr_write_PMC(DisasContext *ctx, int sprn, int gprn); diff --git a/target/ppc/translate.c b/target/ppc/translate.c index ef186396b4..f7a5ecc0c1 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -448,6 +448,22 @@ void spr_write_generic32(DisasContext *ctx, int sprn, = int gprn) #endif } =20 +void spr_core_write_generic(DisasContext *ctx, int sprn, int gprn) +{ + if (!(ctx->flags & POWERPC_FLAG_SMT)) { + spr_write_generic(ctx, sprn, gprn); + return; + } + + if (!gen_serialize(ctx)) { + return; + } + + gen_helper_spr_core_write_generic(cpu_env, tcg_constant_i32(sprn), + cpu_gpr[gprn]); + spr_store_dump_spr(sprn); +} + static void spr_write_CTRL_ST(DisasContext *ctx, int sprn, int gprn) { /* This does not implement >1 thread */ --=20 2.40.1 From nobody Tue Feb 10 12:58:22 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1688005064; cv=none; d=zohomail.com; s=zohoarc; b=JWYXSmE7Zwfec5i7vTS0xkoYNqhzmbwrSY38ZSql/HAUv3hrmrOuY5rd7WBqItZKbhLDCF2Foj9EaR0NLqEf1eCZOUkpJrxwzWIriuAEHmaHq2c08M0NP1dZb4sX4Xe/iYbp2ToLyNe5wYkWiws2wWxF4Kyz9LnJkw+D9EuvuMc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1688005064; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=7bn08iYhmP9EqtEkFzK5y1qNpa4zcjhM6e4zEdjb0S4=; b=PleEKkEWb/6VwNXiLnMfV0JFhcN3vll26AYEoIx79HzduGrGTuAmYMl1oy4S97UJv+tsQ94rlugCdaI35ppB5lAUhbPinT9/cIctGQeIfyds8Ygb2MkHQ9Coy0lfrGopOyoUH35Tq8i5teVk4RDicWB14AmsQu4usYCyeq7W6Rc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1688005064262593.1722637186859; Wed, 28 Jun 2023 19:17:44 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qEhDS-00033T-Oz; Wed, 28 Jun 2023 22:17:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qEhDS-00032n-2D; Wed, 28 Jun 2023 22:17:02 -0400 Received: from mail-pf1-x42b.google.com ([2607:f8b0:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qEhDQ-0003yB-8z; Wed, 28 Jun 2023 22:17:01 -0400 Received: by mail-pf1-x42b.google.com with SMTP id d2e1a72fcca58-666fb8b1bc8so206624b3a.1; Wed, 28 Jun 2023 19:16:59 -0700 (PDT) Received: from wheely.local0.net ([125.254.1.121]) by smtp.gmail.com with ESMTPSA id 5-20020aa79145000000b0063b96574b8bsm7480123pfi.220.2023.06.28.19.16.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Jun 2023 19:16:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1688005017; x=1690597017; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7bn08iYhmP9EqtEkFzK5y1qNpa4zcjhM6e4zEdjb0S4=; b=Mdh9orJhAzyydXFR7Wz7GQ6n2y7koXcr3fad9efWDPXjVvFozRdMrvrMrrkousv6Jg IxjKW9a9h+k/05Ft0++Va3gH/MQgy40j0wela0hAhq0/2yIJryNeIgWp/pdzlC2ESpNJ 4TyeWZnl6YIlneeTsCgxPMOvGwZUERTyx6vpzQd0Fxx6xgNvDTQq9lGvZ2zmY/DzGRjU J/oXpB6AIEgUfL8E2T2erRpWnK9vRKWtAuat0178bdjsKaw+TdzFh8P7zlysWLCjlrIk u0ffxAhPCo9IBl6RwxZRXCMZojck8nQ8Sv4JfXRQ9xCkIz1MlmwSosx2/6sIdhY4AecJ CAcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688005017; x=1690597017; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7bn08iYhmP9EqtEkFzK5y1qNpa4zcjhM6e4zEdjb0S4=; b=XIu7K37ZbswTkbnIL6t/MSZfkwvhoHDnB5XPGsxg1ueWWuiXH0TMuyV1uPnva6+EMg /05YeO3LI0hio1vOVxfEkBx+AV3II328YoouubF2osCAabpApS+jeD5vnMPkSPjn46AE txLlPxBWjZRLPWbRD9p+9XfkMTDggo8tsRylqjMB6gngE7zc59WcqLtt/31eCqwvaMf3 6aBQGL84wL3tbWVDtUs53EaDz05ecbiO9CGRdq/Dpd+a+f4lCBc03nPCSJvb+iSk9civ YHRgAPF7vypBSi4xltXL9ZJ086cAW5Y0+5tHCUHEmU63Op87Z8Af+Kb1O6QsyGZnpi2v H1kQ== X-Gm-Message-State: AC+VfDzcSO4tlH8TLEjYPOQKWaGrxEodO1AvnVwv1SJC8gcnYKj4qItM G04T4pj35eGQ2+8EljFDVLBF2e3JCzg= X-Google-Smtp-Source: ACHHUZ4xzkiVHPySSxFkhiX5nm1oDs7Py2vzGohh/wwRaBkg48i3n0vOc7JNwX7pP6c7M1fcG1wLxg== X-Received: by 2002:a05:6a00:1954:b0:67a:8fc7:1b61 with SMTP id s20-20020a056a00195400b0067a8fc71b61mr11192097pfk.11.1688005017004; Wed, 28 Jun 2023 19:16:57 -0700 (PDT) From: Nicholas Piggin To: qemu-devel@nongnu.org Cc: Nicholas Piggin , qemu-ppc@nongnu.org, Daniel Henrique Barboza , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , David Gibson , Greg Kurz , Harsh Prateek Bora Subject: [RFC PATCH 3/3] ppc/pnv: SMT support for powernv Date: Thu, 29 Jun 2023 12:16:33 +1000 Message-Id: <20230629021633.328916-4-npiggin@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230629021633.328916-1-npiggin@gmail.com> References: <20230629021633.328916-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=npiggin@gmail.com; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1688005065058100001 Content-Type: text/plain; charset="utf-8" Set the TIR default value with the SMT thread index, and place some standard limits on SMT configurations. Now powernv is able to boot skiboot and Linux with a SMT topology, including booting a KVM guest. There are several other per-core SPRs, but they are not so important to run OPAL/Linux. Some important per-LPAR ones to convert before powernv could run in 1LPAR mode. Broadcast msgsnd is not yet implemented either, but skiboot/Linux does not use that. KVM uses an implementation-specific detail of POWER9/10 TLBs where TLBIEL invalidates translations of all threads on a core, but that is not required here because KVM does not cache translations across PID or LPID switch. Most of these I have or aren't too hard to implement, but I start with a small bare bones for comments. Not-yet-Signed-off-by: Nicholas Piggin Reviewed-by: C=C3=A9dric Le Goater --- hw/ppc/pnv.c | 12 ++++++++++++ hw/ppc/pnv_core.c | 13 +++++-------- 2 files changed, 17 insertions(+), 8 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index fc083173f3..f599ccad1d 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -887,6 +887,18 @@ static void pnv_init(MachineState *machine) =20 pnv->num_chips =3D machine->smp.max_cpus / (machine->smp.cores * machine->smp.threads= ); + + if (machine->smp.threads > 8) { + error_report("Cannot support more than 8 threads/core " + "on a powernv machine"); + exit(1); + } + if (!is_power_of_2(machine->smp.threads)) { + error_report("Cannot support %d threads/core on a powernv" + "machine because it must be a power of 2", + machine->smp.threads); + exit(1); + } /* * TODO: should we decide on how many chips we can create based * on #cores and Venice vs. Murano vs. Naples chip type etc..., diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 0bc3ad41c8..acd83caee8 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -167,12 +167,13 @@ static const MemoryRegionOps pnv_core_power9_xscom_op= s =3D { .endianness =3D DEVICE_BIG_ENDIAN, }; =20 -static void pnv_core_cpu_realize(PnvCore *pc, PowerPCCPU *cpu, Error **err= p) +static void pnv_core_cpu_realize(PnvCore *pc, PowerPCCPU *cpu, Error **err= p, + int thread_index) { CPUPPCState *env =3D &cpu->env; int core_pir; - int thread_index =3D 0; /* TODO: TCG supports only one thread */ ppc_spr_t *pir =3D &env->spr_cb[SPR_PIR]; + ppc_spr_t *tir =3D &env->spr_cb[SPR_TIR]; Error *local_err =3D NULL; PnvChipClass *pcc =3D PNV_CHIP_GET_CLASS(pc->chip); =20 @@ -188,11 +189,7 @@ static void pnv_core_cpu_realize(PnvCore *pc, PowerPCC= PU *cpu, Error **errp) =20 core_pir =3D object_property_get_uint(OBJECT(pc), "pir", &error_abort); =20 - /* - * The PIR of a thread is the core PIR + the thread index. We will - * need to find a way to get the thread index when TCG supports - * more than 1. We could use the object name ? - */ + tir->default_value =3D thread_index; pir->default_value =3D core_pir + thread_index; =20 /* Set time-base frequency to 512 MHz */ @@ -241,7 +238,7 @@ static void pnv_core_realize(DeviceState *dev, Error **= errp) } =20 for (j =3D 0; j < cc->nr_threads; j++) { - pnv_core_cpu_realize(pc, pc->threads[j], &local_err); + pnv_core_cpu_realize(pc, pc->threads[j], &local_err, j); if (local_err) { goto err; } --=20 2.40.1