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Mon, 26 Jun 2023 08:39:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Anton Johansson Subject: [PULL 08/22] accel: Replace target_ulong with vaddr in probe_*() Date: Mon, 26 Jun 2023 17:39:31 +0200 Message-Id: <20230626153945.76180-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230626153945.76180-1-richard.henderson@linaro.org> References: <20230626153945.76180-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1687794097637100005 Content-Type: text/plain; charset="utf-8" From: Anton Johansson Functions for probing memory accesses (and functions that call these) are updated to take a vaddr for guest virtual addresses over target_ulong. Signed-off-by: Anton Johansson Reviewed-by: Richard Henderson Message-Id: <20230621135633.1649-9-anjo@rev.ng> Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 14 +++++++------- accel/stubs/tcg-stub.c | 4 ++-- accel/tcg/cputlb.c | 12 ++++++------ accel/tcg/user-exec.c | 8 ++++---- 4 files changed, 19 insertions(+), 19 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index f5508e242b..cc1c3556f6 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -413,16 +413,16 @@ static inline void tlb_flush_range_by_mmuidx_all_cpus= _synced(CPUState *cpu, * Finally, return the host address for a page that is backed by RAM, * or NULL if the page requires I/O. */ -void *probe_access(CPUArchState *env, target_ulong addr, int size, +void *probe_access(CPUArchState *env, vaddr addr, int size, MMUAccessType access_type, int mmu_idx, uintptr_t retad= dr); =20 -static inline void *probe_write(CPUArchState *env, target_ulong addr, int = size, +static inline void *probe_write(CPUArchState *env, vaddr addr, int size, int mmu_idx, uintptr_t retaddr) { return probe_access(env, addr, size, MMU_DATA_STORE, mmu_idx, retaddr); } =20 -static inline void *probe_read(CPUArchState *env, target_ulong addr, int s= ize, +static inline void *probe_read(CPUArchState *env, vaddr addr, int size, int mmu_idx, uintptr_t retaddr) { return probe_access(env, addr, size, MMU_DATA_LOAD, mmu_idx, retaddr); @@ -447,7 +447,7 @@ static inline void *probe_read(CPUArchState *env, targe= t_ulong addr, int size, * Do handle clean pages, so exclude TLB_NOTDIRY from the returned flags. * For simplicity, all "mmio-like" flags are folded to TLB_MMIO. */ -int probe_access_flags(CPUArchState *env, target_ulong addr, int size, +int probe_access_flags(CPUArchState *env, vaddr addr, int size, MMUAccessType access_type, int mmu_idx, bool nonfault, void **phost, uintptr_t retaddr); =20 @@ -460,7 +460,7 @@ int probe_access_flags(CPUArchState *env, target_ulong = addr, int size, * and must be consumed or copied immediately, before any further * access or changes to TLB @mmu_idx. */ -int probe_access_full(CPUArchState *env, target_ulong addr, int size, +int probe_access_full(CPUArchState *env, vaddr addr, int size, MMUAccessType access_type, int mmu_idx, bool nonfault, void **phost, CPUTLBEntryFull **pfull, uintptr_t retaddr); @@ -581,7 +581,7 @@ struct MemoryRegionSection *iotlb_to_section(CPUState *= cpu, * * Note: this function can trigger an exception. */ -tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong ad= dr, +tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, vaddr addr, void **hostp); =20 /** @@ -596,7 +596,7 @@ tb_page_addr_t get_page_addr_code_hostp(CPUArchState *e= nv, target_ulong addr, * Note: this function can trigger an exception. */ static inline tb_page_addr_t get_page_addr_code(CPUArchState *env, - target_ulong addr) + vaddr addr) { return get_page_addr_code_hostp(env, addr, NULL); } diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c index 0998e601ad..a9e7a2d5b4 100644 --- a/accel/stubs/tcg-stub.c +++ b/accel/stubs/tcg-stub.c @@ -26,14 +26,14 @@ void tcg_flush_jmp_cache(CPUState *cpu) { } =20 -int probe_access_flags(CPUArchState *env, target_ulong addr, int size, +int probe_access_flags(CPUArchState *env, vaddr addr, int size, MMUAccessType access_type, int mmu_idx, bool nonfault, void **phost, uintptr_t retaddr) { g_assert_not_reached(); } =20 -void *probe_access(CPUArchState *env, target_ulong addr, int size, +void *probe_access(CPUArchState *env, vaddr addr, int size, MMUAccessType access_type, int mmu_idx, uintptr_t retad= dr) { /* Handled by hardware accelerator. */ diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index bdf400f6e6..d873e58a5d 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1499,7 +1499,7 @@ static void notdirty_write(CPUState *cpu, vaddr mem_v= addr, unsigned size, } } =20 -static int probe_access_internal(CPUArchState *env, target_ulong addr, +static int probe_access_internal(CPUArchState *env, vaddr addr, int fault_size, MMUAccessType access_type, int mmu_idx, bool nonfault, void **phost, CPUTLBEntryFull **pfull, @@ -1508,7 +1508,7 @@ static int probe_access_internal(CPUArchState *env, t= arget_ulong addr, uintptr_t index =3D tlb_index(env, mmu_idx, addr); CPUTLBEntry *entry =3D tlb_entry(env, mmu_idx, addr); uint64_t tlb_addr =3D tlb_read_idx(entry, access_type); - target_ulong page_addr =3D addr & TARGET_PAGE_MASK; + vaddr page_addr =3D addr & TARGET_PAGE_MASK; int flags =3D TLB_FLAGS_MASK; =20 if (!tlb_hit_page(tlb_addr, page_addr)) { @@ -1551,7 +1551,7 @@ static int probe_access_internal(CPUArchState *env, t= arget_ulong addr, return flags; } =20 -int probe_access_full(CPUArchState *env, target_ulong addr, int size, +int probe_access_full(CPUArchState *env, vaddr addr, int size, MMUAccessType access_type, int mmu_idx, bool nonfault, void **phost, CPUTLBEntryFull **pfull, uintptr_t retaddr) @@ -1568,7 +1568,7 @@ int probe_access_full(CPUArchState *env, target_ulong= addr, int size, return flags; } =20 -int probe_access_flags(CPUArchState *env, target_ulong addr, int size, +int probe_access_flags(CPUArchState *env, vaddr addr, int size, MMUAccessType access_type, int mmu_idx, bool nonfault, void **phost, uintptr_t retaddr) { @@ -1589,7 +1589,7 @@ int probe_access_flags(CPUArchState *env, target_ulon= g addr, int size, return flags; } =20 -void *probe_access(CPUArchState *env, target_ulong addr, int size, +void *probe_access(CPUArchState *env, vaddr addr, int size, MMUAccessType access_type, int mmu_idx, uintptr_t retad= dr) { CPUTLBEntryFull *full; @@ -1648,7 +1648,7 @@ void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr ad= dr, * NOTE: This function will trigger an exception if the page is * not executable. */ -tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong ad= dr, +tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, vaddr addr, void **hostp) { CPUTLBEntryFull *full; diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index dc8d6b5d40..d71e26a7b5 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -721,7 +721,7 @@ int page_unprotect(target_ulong address, uintptr_t pc) return current_tb_invalidated ? 2 : 1; } =20 -static int probe_access_internal(CPUArchState *env, target_ulong addr, +static int probe_access_internal(CPUArchState *env, vaddr addr, int fault_size, MMUAccessType access_type, bool nonfault, uintptr_t ra) { @@ -759,7 +759,7 @@ static int probe_access_internal(CPUArchState *env, tar= get_ulong addr, cpu_loop_exit_sigsegv(env_cpu(env), addr, access_type, maperr, ra); } =20 -int probe_access_flags(CPUArchState *env, target_ulong addr, int size, +int probe_access_flags(CPUArchState *env, vaddr addr, int size, MMUAccessType access_type, int mmu_idx, bool nonfault, void **phost, uintptr_t ra) { @@ -771,7 +771,7 @@ int probe_access_flags(CPUArchState *env, target_ulong = addr, int size, return flags; } =20 -void *probe_access(CPUArchState *env, target_ulong addr, int size, +void *probe_access(CPUArchState *env, vaddr addr, int size, MMUAccessType access_type, int mmu_idx, uintptr_t ra) { int flags; @@ -783,7 +783,7 @@ void *probe_access(CPUArchState *env, target_ulong addr= , int size, return size ? g2h(env_cpu(env), addr) : NULL; } =20 -tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong ad= dr, +tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, vaddr addr, void **hostp) { int flags; --=20 2.34.1