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[201.69.66.110]) by smtp.gmail.com with ESMTPSA id w6-20020a4aa446000000b00562f06fb5easm156677ool.11.2023.06.22.06.57.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 06:57:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1687442233; x=1690034233; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DReao0hDMiDF72kgz7UAQRQxD03tnNvVGU/fYBfp15s=; b=SKNGiiqfwiQPd6pMEcTiC+xZd7txU2CSgu2IPsVMmOFSHAxtjz4DrAFZTUnWKO5PCC LseDRGhl4RfYZgmAcYC7JbTfgYIYzLZs1aKVnT9DZgaV1XhITBMHbQTEOdpT+T97xK6i rYfdCmBwPg62+xMN513kOW1M9/GCQ1r2u4qJX/PVz1KljJfQ9NS59E6llGwOM5ZDARig HuY9dMYD+0SKS4QR74vnNW1MISM2S+JbinOn/zs88+TZpfTN7gOu6TQShvGDhxdgVuoI xuIp0xd5Y1sT/tJBro6JLW4tv4xBOWPHyGSf1poepDK+Sl1EfYaJt8YBQ+0qHuJebew5 DPLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687442233; x=1690034233; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DReao0hDMiDF72kgz7UAQRQxD03tnNvVGU/fYBfp15s=; b=jthW/EeCNUJoxIuhySUlZHN0hHH02nqVM+FJ2McmvdH/+haprF+YkNvHv5cg2iTzdD JBbmHNL1y4WvmXy8qvwYKgXYDxZbAJZQLWlgD2Z/8Yk9rAQ2vA4QPuwJIn6fhDRnB2/g Ph/r6rjB0pYuWd571SWb+9oaN2EbAGQ6cSfT1bOUpOiRuCIuuvSaqmf02I3NfBh4fOcc PFZxN9unthAsPYeZn0Fn03VyzpKuk0kJ7NkVJ+gh8QdoBem624WbYlSGok7GQzQ5/iLK kpN9qF7OS9X0t6AijVx6CIrRRuta5bhVtrB+yskuXnKsx7BQnu6JI0CDy7iAdcc7JDaX VkGg== X-Gm-Message-State: AC+VfDwSAuH2Q+ONwBaHOLWMjkmLzJ423mwy1ChmuIcxhQBpjnkYb/9z DLo3CT3kD2Y2ZHov6pI20h2nVG8VbvKENcgDw2Q= X-Google-Smtp-Source: ACHHUZ4+mDltIrT1e5DNrh2KtCIoP7jsa65ZTfuHCIhEyNN/0rou4CvnziWlfEgSzdN9PFqHpGMEsw== X-Received: by 2002:a4a:a592:0:b0:558:b703:b9f with SMTP id d18-20020a4aa592000000b00558b7030b9fmr13094754oom.8.1687442233380; Thu, 22 Jun 2023 06:57:13 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v3 02/19] hw/riscv/virt.c: skip 'mmu-type' FDT if satp mode not set Date: Thu, 22 Jun 2023 10:56:43 -0300 Message-ID: <20230622135700.105383-3-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230622135700.105383-1-dbarboza@ventanamicro.com> References: <20230622135700.105383-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:4860:4864:20::31; envelope-from=dbarboza@ventanamicro.com; helo=mail-oa1-x31.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1687442338782100001 Content-Type: text/plain; charset="utf-8" The absence of a satp mode in riscv_host_cpu_init() is causing the following error: $ sudo ./qemu/build/qemu-system-riscv64 -machine virt,accel=3Dkvm \ -m 2G -smp 1 -nographic -snapshot \ -kernel ./guest_imgs/Image \ -initrd ./guest_imgs/rootfs_kvm_riscv64.img \ -append "earlycon=3Dsbi root=3D/dev/ram rw" \ -cpu host ** ERROR:../target/riscv/cpu.c:320:satp_mode_str: code should not be reached Bail out! ERROR:../target/riscv/cpu.c:320:satp_mode_str: code should not be reached Aborted The error is triggered from create_fdt_socket_cpus() in hw/riscv/virt.c. It's trying to get satp_mode_str for a NULL cpu->cfg.satp_mode.map. For this KVM cpu we would need to inherit the satp supported modes from the RISC-V host. At this moment this is not possible because the KVM driver does not support it. And even when it does we can't just let this broken for every other older kernel. Since mmu-type is not a required node, according to [1], skip the 'mmu-type' FDT node if there's no satp_mode set. We'll revisit this logic when we can get satp information from KVM. [1] https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/= cpu.yaml Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones Reviewed-by: Alistair Francis --- hw/riscv/virt.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 95708d890e..f025a0fcaf 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -243,13 +243,13 @@ static void create_fdt_socket_cpus(RISCVVirtState *s,= int socket, s->soc[socket].hartid_base + cpu); qemu_fdt_add_subnode(ms->fdt, cpu_name); =20 - satp_mode_max =3D satp_mode_max_from_map( - s->soc[socket].harts[cpu].cfg.satp_mode.map); - sv_name =3D g_strdup_printf("riscv,%s", - satp_mode_str(satp_mode_max, is_32_bit)); - qemu_fdt_setprop_string(ms->fdt, cpu_name, "mmu-type", sv_name); - g_free(sv_name); - + if (cpu_ptr->cfg.satp_mode.supported !=3D 0) { + satp_mode_max =3D satp_mode_max_from_map(cpu_ptr->cfg.satp_mod= e.map); + sv_name =3D g_strdup_printf("riscv,%s", + satp_mode_str(satp_mode_max, is_32_b= it)); + qemu_fdt_setprop_string(ms->fdt, cpu_name, "mmu-type", sv_name= ); + g_free(sv_name); + } =20 name =3D riscv_isa_string(cpu_ptr); qemu_fdt_setprop_string(ms->fdt, cpu_name, "riscv,isa", name); --=20 2.41.0