From nobody Thu May 16 16:53:28 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1687344047859385.26380766390616; Wed, 21 Jun 2023 03:40:47 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qBvFt-0000qC-Gv; Wed, 21 Jun 2023 06:40:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qBvFr-0000pU-F4; Wed, 21 Jun 2023 06:40:03 -0400 Received: from zg8tmja5ljk3lje4ms43mwaa.icoremail.net ([209.97.181.73]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qBvFp-0001nD-3x; Wed, 21 Jun 2023 06:40:03 -0400 Received: from prodtpl.icoremail.net (unknown [10.12.1.20]) by hzbj-icmmx-6 (Coremail) with SMTP id AQAAfwD3M0qT1JJkR_ZsAA--.23395S2; Wed, 21 Jun 2023 18:44:35 +0800 (CST) Received: from phytium.com.cn (unknown [123.150.8.50]) by mail (Coremail) with SMTP id AQAAfwDHQrJj05JkPXYAAA--.3909S4; Wed, 21 Jun 2023 18:39:35 +0800 (CST) From: Yuquan Wang To: rad@semihalf.com, peter.maydell@linaro.org, pbonzini@redhat.com Cc: marcin.juszkiewicz@linaro.org, quic_llindhol@quicinc.com, chenbaozi@phytium.com.cn, qemu-arm@nongnu.org, qemu-devel@nongnu.org, Yuquan Wang Subject: [PATCH v5 1/1] hw/arm/sbsa-ref: use XHCI to replace EHCI Date: Wed, 21 Jun 2023 18:38:47 +0800 Message-Id: <20230621103847.447508-2-wangyuquan1236@phytium.com.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230621103847.447508-1-wangyuquan1236@phytium.com.cn> References: <20230621103847.447508-1-wangyuquan1236@phytium.com.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: AQAAfwDHQrJj05JkPXYAAA--.3909S4 X-CM-SenderInfo: 5zdqw5pxtxt0arstlqxsk13x1xpou0fpof0/1tbiAQARAWSR+kED4wAAs- Authentication-Results: hzbj-icmmx-6; spf=neutral smtp.mail=wangyuquan 1236@phytium.com.cn; X-Coremail-Antispam: 1Uk129KBjvJXoWxXrW5KFy7Gw17XF17uryUZFb_yoWrXr1fpF 48urZIkr48tF1rJ39xuw1xWF45C397Zw17Zry3CFn3ZFyDJr4jqrWkGay0kas8JrW5ZrWj 9FykWFy8Zr1xAw7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj DUYxn0WfASr-VFAU7a7-sFnT9fnUUIcSsGvfJ3UbIYCTnIWIevJa73UjIFyTuYvj4RJUUU UUUUU Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=209.97.181.73; envelope-from=wangyuquan1236@phytium.com.cn; helo=zg8tmja5ljk3lje4ms43mwaa.icoremail.net X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1687344057355100002 Content-Type: text/plain; charset="utf-8" The current sbsa-ref cannot use EHCI controller which is only able to do 32-bit DMA, since sbsa-ref doesn't have RAM below 4GB. Hence, this uses XHCI to provide a usb controller with 64-bit DMA capablity instead of EHCI. Bumping platform version to 0.3 with this change. Signed-off-by: Yuquan Wang --- docs/system/arm/sbsa.rst | 2 +- hw/arm/Kconfig | 2 +- hw/arm/sbsa-ref.c | 23 +++++++++++++---------- 3 files changed, 15 insertions(+), 12 deletions(-) diff --git a/docs/system/arm/sbsa.rst b/docs/system/arm/sbsa.rst index f571fe645e..f0c809eb60 100644 --- a/docs/system/arm/sbsa.rst +++ b/docs/system/arm/sbsa.rst @@ -19,7 +19,7 @@ The ``sbsa-ref`` board supports: - A configurable number of AArch64 CPUs - GIC version 3 - System bus AHCI controller - - System bus EHCI controller + - System bus XHCI controller - CDROM and hard disc on AHCI bus - E1000E ethernet card on PCIe bus - Bochs display adapter on PCIe bus diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 7de17d1e8c..7e68348440 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -266,7 +266,7 @@ config SBSA_REF select PL011 # UART select PL031 # RTC select PL061 # GPIO - select USB_EHCI_SYSBUS + select USB_XHCI_SYSBUS select WDT_SBSA select BOCHS_DISPLAY =20 diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index de21200ff9..dbd9f89837 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -40,6 +40,7 @@ #include "hw/pci-host/gpex.h" #include "hw/qdev-properties.h" #include "hw/usb.h" +#include "hw/usb/xhci.h" #include "hw/char/pl011.h" #include "hw/watchdog/sbsa_gwdt.h" #include "net/net.h" @@ -82,7 +83,7 @@ enum { SBSA_SECURE_UART_MM, SBSA_SECURE_MEM, SBSA_AHCI, - SBSA_EHCI, + SBSA_XHCI, }; =20 struct SBSAMachineState { @@ -119,7 +120,7 @@ static const MemMapEntry sbsa_ref_memmap[] =3D { [SBSA_SMMU] =3D { 0x60050000, 0x00020000 }, /* Space here reserved for more SMMUs */ [SBSA_AHCI] =3D { 0x60100000, 0x00010000 }, - [SBSA_EHCI] =3D { 0x60110000, 0x00010000 }, + [SBSA_XHCI] =3D { 0x60110000, 0x00010000 }, /* Space here reserved for other devices */ [SBSA_PCIE_PIO] =3D { 0x7fff0000, 0x00010000 }, /* 32-bit address PCIE MMIO space */ @@ -139,7 +140,7 @@ static const int sbsa_ref_irqmap[] =3D { [SBSA_SECURE_UART] =3D 8, [SBSA_SECURE_UART_MM] =3D 9, [SBSA_AHCI] =3D 10, - [SBSA_EHCI] =3D 11, + [SBSA_XHCI] =3D 11, [SBSA_SMMU] =3D 12, /* ... to 15 */ [SBSA_GWDT_WS0] =3D 16, }; @@ -219,7 +220,7 @@ static void create_fdt(SBSAMachineState *sms) * fw compatibility. */ qemu_fdt_setprop_cell(fdt, "/", "machine-version-major", 0); - qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 1); + qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 3); =20 if (ms->numa_state->have_numa_distance) { int size =3D nb_numa_nodes * nb_numa_nodes * 3 * sizeof(uint32_t); @@ -575,13 +576,15 @@ static void create_ahci(const SBSAMachineState *sms) } } =20 -static void create_ehci(const SBSAMachineState *sms) +static void create_xhci(const SBSAMachineState *sms) { - hwaddr base =3D sbsa_ref_memmap[SBSA_EHCI].base; - int irq =3D sbsa_ref_irqmap[SBSA_EHCI]; + hwaddr base =3D sbsa_ref_memmap[SBSA_XHCI].base; + int irq =3D sbsa_ref_irqmap[SBSA_XHCI]; + DeviceState *dev =3D qdev_new(TYPE_XHCI_SYSBUS); =20 - sysbus_create_simple("platform-ehci-usb", base, - qdev_get_gpio_in(sms->gic, irq)); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(sms->gic, = irq)); } =20 static void create_smmu(const SBSAMachineState *sms, PCIBus *bus) @@ -803,7 +806,7 @@ static void sbsa_ref_init(MachineState *machine) =20 create_ahci(sms); =20 - create_ehci(sms); + create_xhci(sms); =20 create_pcie(sms); =20 --=20 2.34.1