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[2403:580b:97e8:0:321:6fb2:58f1:a1b1]) by smtp.gmail.com with ESMTPSA id u1-20020aa78381000000b0064f7c56d8b7sm9112238pfm.219.2023.06.13.18.23.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Jun 2023 18:23:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686705816; x=1689297816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=W+Zpqg3JdPP6r7Yf1Ea9q6dskerHuBsWZMBa3ElN80Y=; b=rU8klGG1v3GO7FlP8ECOcClWGSgKP7Zd/AhexLxhjG8UIwwnHMyMVz6//RFKf6UcA7 jT4n5U0Xl5qs0UdC+qVJPgOVFjRtEqmpUPwk9IfZwFWIPQbdOXHk0Mq/Mn9wg8q8Y/nc eUiqXVYo2KMqn5JAw37GEwvBtYhmDMGkLWhA/T5IEG4pel677FxrcXwIjGR80HwvDuxM K4Uoo3K2iQekDGaZbP5hoh0cYJropx6v5bh1Fq/gsUer393VwDtxA/eRevI/ZrGIHHZW ZJwY1/W88jHOHVakN864TonQeiLQJVQnivRTxHe98FNViKbexg0jAlzCxU9VAiGWoHBJ WdOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686705816; x=1689297816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=W+Zpqg3JdPP6r7Yf1Ea9q6dskerHuBsWZMBa3ElN80Y=; b=cmOGmz1lOABP0usl3YSPwRGpgYXFVcn70HhDraRNXds3uOLkb361+Y8GQDXzHRH24R s6MyVe4lznZfdPIJeiNuXYiOKxwI/uyORlH1fezpcJhD9SkXIH6sRCH7pIIGwiaHHs84 NBNKMzmUlpMk0cUng+in3+6PzxkjWEXqf5PYNsasJUMczFHmpIlk+U9PvfAz82Hn9G3v 054Bsk2e0hFLhbte85XiTiwhlM9R6xNgvxBMIMtXUcjQ4h0DY4PkdRp+qD7A0PFrcdAw +oGcGYH46Q8Y27Mp8E9Cc9j9hqw5c5jY5BFi6WrPlFvxPDwTKjc89JUXbvgfBVcaKleK bG0Q== X-Gm-Message-State: AC+VfDxnY3Ej8Y3fp4JxWmJiRzga69wVcjY6sNtxniHvCUGWtsYqMhbO wZzIETQW/Ji2HZDC5IETL2es2G82XMCMwg== X-Google-Smtp-Source: ACHHUZ5rIV7tVWSj5mJsCIdVtXUERp8xBvkICzQ00iVZ7POLpLIseyxCYUGNQmcjkbUwCd6jJDElqQ== X-Received: by 2002:a05:6a00:2190:b0:663:716e:e752 with SMTP id h16-20020a056a00219000b00663716ee752mr463910pfi.26.1686705815765; Tue, 13 Jun 2023 18:23:35 -0700 (PDT) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Weiwei Li , Junqiang Wang , Richard Henderson , Alistair Francis Subject: [PULL 45/60] target/riscv: Fix target address to update badaddr Date: Wed, 14 Jun 2023 11:20:02 +1000 Message-Id: <20230614012017.3100663-46-alistair.francis@wdc.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230614012017.3100663-1-alistair.francis@wdc.com> References: <20230614012017.3100663-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=alistair23@gmail.com; helo=mail-pf1-x436.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1686706385817100001 Content-Type: text/plain; charset="utf-8" From: Weiwei Li Compute the target address before storing it into badaddr when mis-aligned exception is triggered. Use a target_pc temp to store the target address to avoid the confusing operation that udpate target address into cpu_pc before misalign check, then update it into badaddr and restore cpu_pc to current pc if exception is triggered. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-Id: <20230526072124.298466-2-liweiwei@iscas.ac.cn> Signed-off-by: Alistair Francis --- target/riscv/translate.c | 21 ++++++++++----------- target/riscv/insn_trans/trans_rvi.c.inc | 23 ++++++++++++++++------- target/riscv/insn_trans/trans_rvzce.c.inc | 4 ++-- 3 files changed, 28 insertions(+), 20 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 29f1fb3995..6fbdb50c5d 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -224,21 +224,18 @@ static void decode_save_opc(DisasContext *ctx) ctx->insn_start =3D NULL; } =20 -static void gen_set_pc_imm(DisasContext *ctx, target_ulong dest) +static void gen_pc_plus_diff(TCGv target, DisasContext *ctx, + target_ulong dest) { if (get_xl(ctx) =3D=3D MXL_RV32) { dest =3D (int32_t)dest; } - tcg_gen_movi_tl(cpu_pc, dest); + tcg_gen_movi_tl(target, dest); } =20 -static void gen_set_pc(DisasContext *ctx, TCGv dest) +static void gen_set_pc_imm(DisasContext *ctx, target_ulong dest) { - if (get_xl(ctx) =3D=3D MXL_RV32) { - tcg_gen_ext32s_tl(cpu_pc, dest); - } else { - tcg_gen_mov_tl(cpu_pc, dest); - } + gen_pc_plus_diff(cpu_pc, ctx, dest); } =20 static void generate_exception(DisasContext *ctx, int excp) @@ -259,9 +256,9 @@ static void gen_exception_illegal(DisasContext *ctx) } } =20 -static void gen_exception_inst_addr_mis(DisasContext *ctx) +static void gen_exception_inst_addr_mis(DisasContext *ctx, TCGv target) { - tcg_gen_st_tl(cpu_pc, cpu_env, offsetof(CPURISCVState, badaddr)); + tcg_gen_st_tl(target, cpu_env, offsetof(CPURISCVState, badaddr)); generate_exception(ctx, RISCV_EXCP_INST_ADDR_MIS); } =20 @@ -553,7 +550,9 @@ static void gen_jal(DisasContext *ctx, int rd, target_u= long imm) next_pc =3D ctx->base.pc_next + imm; if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca) { if ((next_pc & 0x3) !=3D 0) { - gen_exception_inst_addr_mis(ctx); + TCGv target_pc =3D tcg_temp_new(); + gen_pc_plus_diff(target_pc, ctx, next_pc); + gen_exception_inst_addr_mis(ctx, target_pc); return; } } diff --git a/target/riscv/insn_trans/trans_rvi.c.inc b/target/riscv/insn_tr= ans/trans_rvi.c.inc index d794247f40..009dc96dbd 100644 --- a/target/riscv/insn_trans/trans_rvi.c.inc +++ b/target/riscv/insn_trans/trans_rvi.c.inc @@ -51,25 +51,30 @@ static bool trans_jal(DisasContext *ctx, arg_jal *a) static bool trans_jalr(DisasContext *ctx, arg_jalr *a) { TCGLabel *misaligned =3D NULL; + TCGv target_pc =3D tcg_temp_new(); =20 - tcg_gen_addi_tl(cpu_pc, get_gpr(ctx, a->rs1, EXT_NONE), a->imm); - tcg_gen_andi_tl(cpu_pc, cpu_pc, (target_ulong)-2); + tcg_gen_addi_tl(target_pc, get_gpr(ctx, a->rs1, EXT_NONE), a->imm); + tcg_gen_andi_tl(target_pc, target_pc, (target_ulong)-2); + + if (get_xl(ctx) =3D=3D MXL_RV32) { + tcg_gen_ext32s_tl(target_pc, target_pc); + } =20 - gen_set_pc(ctx, cpu_pc); if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca) { TCGv t0 =3D tcg_temp_new(); =20 misaligned =3D gen_new_label(); - tcg_gen_andi_tl(t0, cpu_pc, 0x2); + tcg_gen_andi_tl(t0, target_pc, 0x2); tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0x0, misaligned); } =20 gen_set_gpri(ctx, a->rd, ctx->pc_succ_insn); + tcg_gen_mov_tl(cpu_pc, target_pc); lookup_and_goto_ptr(ctx); =20 if (misaligned) { gen_set_label(misaligned); - gen_exception_inst_addr_mis(ctx); + gen_exception_inst_addr_mis(ctx, target_pc); } ctx->base.is_jmp =3D DISAS_NORETURN; =20 @@ -153,6 +158,7 @@ static bool gen_branch(DisasContext *ctx, arg_b *a, TCG= Cond cond) TCGLabel *l =3D gen_new_label(); TCGv src1 =3D get_gpr(ctx, a->rs1, EXT_SIGN); TCGv src2 =3D get_gpr(ctx, a->rs2, EXT_SIGN); + target_ulong next_pc; =20 if (get_xl(ctx) =3D=3D MXL_RV128) { TCGv src1h =3D get_gprh(ctx, a->rs1); @@ -169,10 +175,13 @@ static bool gen_branch(DisasContext *ctx, arg_b *a, T= CGCond cond) =20 gen_set_label(l); /* branch taken */ =20 + next_pc =3D ctx->base.pc_next + a->imm; if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca && - ((ctx->base.pc_next + a->imm) & 0x3)) { + (next_pc & 0x3)) { /* misaligned */ - gen_exception_inst_addr_mis(ctx); + TCGv target_pc =3D tcg_temp_new(); + gen_pc_plus_diff(target_pc, ctx, next_pc); + gen_exception_inst_addr_mis(ctx, target_pc); } else { gen_goto_tb(ctx, 0, ctx->base.pc_next + a->imm); } diff --git a/target/riscv/insn_trans/trans_rvzce.c.inc b/target/riscv/insn_= trans/trans_rvzce.c.inc index a727169a4b..5732d782f7 100644 --- a/target/riscv/insn_trans/trans_rvzce.c.inc +++ b/target/riscv/insn_trans/trans_rvzce.c.inc @@ -202,8 +202,8 @@ static bool gen_pop(DisasContext *ctx, arg_cmpp *a, boo= l ret, bool ret_val) } =20 if (ret) { - TCGv ret_addr =3D get_gpr(ctx, xRA, EXT_NONE); - gen_set_pc(ctx, ret_addr); + TCGv ret_addr =3D get_gpr(ctx, xRA, EXT_SIGN); + tcg_gen_mov_tl(cpu_pc, ret_addr); tcg_gen_lookup_and_goto_ptr(); ctx->base.is_jmp =3D DISAS_NORETURN; } --=20 2.40.1