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Wed, 07 Jun 2023 09:49:24 -0700 (PDT) From: Yeqi Fu To: alex.bennee@linaro.org Cc: richard.henderson@linaro.org, qemu-devel@nongnu.org, Yeqi Fu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo Subject: [RFC v2 4/6] target/mips: Add native library calls Date: Thu, 8 Jun 2023 00:47:48 +0800 Message-Id: <20230607164750.829586-5-fufuyqqqqqq@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230607164750.829586-1-fufuyqqqqqq@gmail.com> References: <20230607164750.829586-1-fufuyqqqqqq@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=fufuyqqqqqq@gmail.com; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1686157114033100003 Content-Type: text/plain; charset="utf-8" Signed-off-by: Yeqi Fu --- target/mips/helper.h | 6 ++++ target/mips/tcg/meson.build | 1 + target/mips/tcg/native_helper.c | 55 +++++++++++++++++++++++++++++++++ target/mips/tcg/translate.c | 20 +++++++++++- target/mips/tcg/translate.h | 12 +++++++ 5 files changed, 93 insertions(+), 1 deletion(-) create mode 100644 target/mips/tcg/native_helper.c diff --git a/target/mips/helper.h b/target/mips/helper.h index de32d82e98..9fa949d78c 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -589,6 +589,12 @@ DEF_HELPER_FLAGS_3(dmthlip, 0, void, tl, tl, env) DEF_HELPER_FLAGS_3(wrdsp, 0, void, tl, tl, env) DEF_HELPER_FLAGS_2(rddsp, 0, tl, tl, env) =20 +#if defined(CONFIG_USER_ONLY) && defined(CONFIG_USER_NATIVE_CALL) +DEF_HELPER_1(native_memcpy, void, env) +DEF_HELPER_1(native_memcmp, void, env) +DEF_HELPER_1(native_memset, void, env) +#endif + #ifndef CONFIG_USER_ONLY #include "tcg/sysemu_helper.h.inc" #endif /* !CONFIG_USER_ONLY */ diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build index 7ee969ec8f..fb1ea64047 100644 --- a/target/mips/tcg/meson.build +++ b/target/mips/tcg/meson.build @@ -22,6 +22,7 @@ mips_ss.add(files( 'txx9_translate.c', 'vr54xx_helper.c', 'vr54xx_translate.c', + 'native_helper.c', )) mips_ss.add(when: 'TARGET_MIPS64', if_true: files( 'tx79_translate.c', diff --git a/target/mips/tcg/native_helper.c b/target/mips/tcg/native_helpe= r.c new file mode 100644 index 0000000000..bfd9c92e17 --- /dev/null +++ b/target/mips/tcg/native_helper.c @@ -0,0 +1,55 @@ +/* + * native function call helpers + */ + +#include "qemu/osdep.h" +#include "cpu.h" +#include "exec/helper-proto.h" +#include "exec/exec-all.h" +#include "exec/cpu_ldst.h" + +#if defined(CONFIG_USER_ONLY) && defined(CONFIG_USER_NATIVE_CALL) + +#define NATIVE_FN_W_3W() \ + target_ulong arg0, arg1, arg2; \ + arg0 =3D env->active_tc.gpr[4]; /*"a0"*/ \ + arg1 =3D env->active_tc.gpr[5]; /*"a1"*/ \ + arg2 =3D env->active_tc.gpr[6]; /*"a2"*/ + +void helper_native_memcpy(CPUMIPSState *env) +{ + CPUState *cs =3D env_cpu(env); + NATIVE_FN_W_3W(); + void *ret; + void *dest =3D g2h(cs, arg0); + void *src =3D g2h(cs, arg1); + size_t n =3D (size_t)arg2; + ret =3D memcpy(dest, src, n); + env->active_tc.gpr[2] =3D (target_ulong)h2g(ret); +} + +void helper_native_memcmp(CPUMIPSState *env) +{ + CPUState *cs =3D env_cpu(env); + NATIVE_FN_W_3W(); + int ret; + void *s1 =3D g2h(cs, arg0); + void *s2 =3D g2h(cs, arg1); + size_t n =3D (size_t)arg2; + ret =3D memcmp(s1, s2, n); + env->active_tc.gpr[2] =3D ret; +} + +void helper_native_memset(CPUMIPSState *env) +{ + CPUState *cs =3D env_cpu(env); + NATIVE_FN_W_3W(); + void *ret; + void *s =3D g2h(cs, arg0); + int c =3D (int)arg1; + size_t n =3D (size_t)arg2; + ret =3D memset(s, c, n); + env->active_tc.gpr[2] =3D (target_ulong)h2g(ret); +} + +#endif diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index a6ca2e5a3b..d68ce6bc2f 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -36,6 +36,7 @@ #include "qemu/qemu-print.h" #include "fpu_helper.h" #include "translate.h" +#include "native/native-func.h" =20 /* * Many sysemu-only helpers are not reachable for user-only. @@ -13591,7 +13592,24 @@ static void decode_opc_special(CPUMIPSState *env, = DisasContext *ctx) gen_helper_pmon(cpu_env, tcg_constant_i32(sa)); #endif break; - case OPC_SYSCALL: + case OPC_SYSCALL: /* 00 00 00 0C */ + if (native_bypass() && ((((ctx->opcode) >> 24) & 0xff) =3D=3D 0x1)= ) { + uint16_t sig =3D (ctx->opcode) >> 8 & 0xffff; + switch (sig) { + case NATIVE_MEMCPY: + gen_helper_native_memcpy(cpu_env); + break; + case NATIVE_MEMSET: + gen_helper_native_memset(cpu_env); + break; + case NATIVE_MEMCMP: + gen_helper_native_memcmp(cpu_env); + break; + default: + gen_reserved_instruction(ctx); + } + break; + } generate_exception_end(ctx, EXCP_SYSCALL); break; case OPC_BREAK: diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h index 69f85841d2..f0112d88aa 100644 --- a/target/mips/tcg/translate.h +++ b/target/mips/tcg/translate.h @@ -237,3 +237,15 @@ static inline bool cpu_is_bigendian(DisasContext *ctx) } =20 #endif + +/* + * Check if the native bypass feature is enabled. + */ +static inline bool native_bypass(void) +{ +#if defined(CONFIG_USER_ONLY) && defined(CONFIG_USER_NATIVE_CALL) + return true; +#else + return false; +#endif +} --=20 2.34.1