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d="scan'208";a="418669307" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10726"; a="1036956478" X-IronPort-AV: E=Sophos;i="6.00,205,1681196400"; d="scan'208";a="1036956478" From: Xiaoyao Li To: Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Chenyi Qiang , lei4.wang@intel.com Subject: [PATCH v4 7/8] target/i386/intel-pt: Define specific PT feature set for IceLake-server, Snowridge and SapphireRapids Date: Wed, 31 May 2023 04:43:10 -0400 Message-Id: <20230531084311.3807277-8-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230531084311.3807277-1-xiaoyao.li@intel.com> References: <20230531084311.3807277-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=134.134.136.31; envelope-from=xiaoyao.li@intel.com; helo=mga06.intel.com X-Spam_score_int: -45 X-Spam_score: -4.6 X-Spam_bar: ---- X-Spam_report: (-4.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.167, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=0.001, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1685522683536100005 Content-Type: text/plain; charset="utf-8" For IceLake-server, it's just the same as using the default PT feature set since the default one is exact taken from ICX. For Snowridge and SapphireRapids, define it according to real silicon capabilities. Signed-off-by: Xiaoyao Li --- Changes in v4: - Add Intel PT capabilities for SapphireRapids cpu model; --- target/i386/cpu.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index e47629aff68e..182ba02e2fee 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3699,6 +3699,14 @@ static const X86CPUDefinition builtin_x86_defs[] =3D= { .features[FEAT_6_EAX] =3D CPUID_6_EAX_ARAT, /* Missing: Mode-based execute control (XS/XU), processor tracing,= TSC scaling */ + .features[FEAT_14_0_EBX] =3D + CPUID_14_0_EBX_CR3_FILTER | CPUID_14_0_EBX_PSB | + CPUID_14_0_EBX_IP_FILTER | CPUID_14_0_EBX_MTC, + .features[FEAT_14_0_ECX] =3D + CPUID_14_0_ECX_TOPA | CPUID_14_0_ECX_MULTI_ENTRIES | + CPUID_14_0_ECX_SINGLE_RANGE, + .features[FEAT_14_1_EAX] =3D 0x249 << 16 | 0x2, + .features[FEAT_14_1_EBX] =3D 0x003f << 16 | 0x1fff, .features[FEAT_VMX_BASIC] =3D MSR_VMX_BASIC_INS_OUTS | MSR_VMX_BASIC_TRUE_CTLS, .features[FEAT_VMX_ENTRY_CTLS] =3D VMX_VM_ENTRY_IA32E_MODE | @@ -3869,6 +3877,15 @@ static const X86CPUDefinition builtin_x86_defs[] =3D= { .features[FEAT_7_1_EAX] =3D CPUID_7_1_EAX_AVX_VNNI | CPUID_7_1_EAX_AVX512_BF16 | CPUID_7_1_EAX_FZRM | CPUID_7_1_EAX_FSRS | CPUID_7_1_EAX_FSRC, + .features[FEAT_14_0_EBX] =3D + CPUID_14_0_EBX_CR3_FILTER | CPUID_14_0_EBX_PSB | + CPUID_14_0_EBX_IP_FILTER | CPUID_14_0_EBX_MTC | + CPUID_14_0_EBX_PTWRITE | CPUID_14_0_EBX_PSB_PMI_PRESERVATION, + .features[FEAT_14_0_ECX] =3D + CPUID_14_0_ECX_TOPA | CPUID_14_0_ECX_MULTI_ENTRIES | + CPUID_14_0_ECX_SINGLE_RANGE, + .features[FEAT_14_1_EAX] =3D 0x249 << 16 | 0x2, + .features[FEAT_14_1_EBX] =3D 0x003f << 16 | 0x3f, .features[FEAT_VMX_BASIC] =3D MSR_VMX_BASIC_INS_OUTS | MSR_VMX_BASIC_TRUE_CTLS, .features[FEAT_VMX_ENTRY_CTLS] =3D @@ -4105,6 +4122,16 @@ static const X86CPUDefinition builtin_x86_defs[] =3D= { CPUID_XSAVE_XGETBV1, .features[FEAT_6_EAX] =3D CPUID_6_EAX_ARAT, + .features[FEAT_14_0_EBX] =3D + CPUID_14_0_EBX_CR3_FILTER | CPUID_14_0_EBX_PSB | + CPUID_14_0_EBX_IP_FILTER | CPUID_14_0_EBX_MTC | + CPUID_14_0_EBX_PTWRITE | CPUID_14_0_EBX_POWER_EVENT | + CPUID_14_0_EBX_PSB_PMI_PRESERVATION, + .features[FEAT_14_0_ECX] =3D + CPUID_14_0_ECX_TOPA | CPUID_14_0_ECX_MULTI_ENTRIES | + CPUID_14_0_ECX_SINGLE_RANGE | CPUID_14_0_ECX_LIP, + .features[FEAT_14_1_EAX] =3D 0x249 << 16 | 0x2, + .features[FEAT_14_1_EBX] =3D 0x003f << 16 | 0xffff, .features[FEAT_VMX_BASIC] =3D MSR_VMX_BASIC_INS_OUTS | MSR_VMX_BASIC_TRUE_CTLS, .features[FEAT_VMX_ENTRY_CTLS] =3D VMX_VM_ENTRY_IA32E_MODE | --=20 2.34.1