From nobody Mon Feb 9 23:01:12 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1685476201; cv=none; d=zohomail.com; s=zohoarc; b=cLaSvpUspPLReXVqHCnPtDSIeSsM7Lka3vFvVHK5Nwq0tgHtbccrvjVSNKu+cUm88zvlrzipmCttzSX6bpBTTxnnocgjVj5A+YlixW3s0ko2o1ia9EBtSd/zSqd/9bIXCzJ45LqTb0fNXPmWRg4XU39UmjW8AVLdrF4FrweeT28= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1685476201; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=PQfvEU6D8rfX7EQRs/z2WyDaYmnYIefS7PvmuSNGDek=; b=d2AiFfPWrbBYzIdsTNz53V6DxqIv2zzBobbzIfSH7j6RCguSIFqvGQhSk8+GHScr7Utpk7tAZUGUZ3FgfFMLplbi9dJ8iS4Ce+9VHdArphzdkqnJfgTstKFhGtZiboU/4hlLKeSsP7CJ9vpdvczHF3taJJre84nsHrT8Nhs4ELo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1685476200801886.2480375945582; Tue, 30 May 2023 12:50:00 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q45J6-0006bu-WA; Tue, 30 May 2023 15:47:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q45J2-0006Zh-5R for qemu-devel@nongnu.org; Tue, 30 May 2023 15:46:56 -0400 Received: from mail-oi1-x233.google.com ([2607:f8b0:4864:20::233]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1q45Iy-0004HN-OC for qemu-devel@nongnu.org; Tue, 30 May 2023 15:46:55 -0400 Received: by mail-oi1-x233.google.com with SMTP id 5614622812f47-39817f3e08eso1638510b6e.1 for ; Tue, 30 May 2023 12:46:52 -0700 (PDT) Received: from grind.dc1.ventanamicro.com (200-162-225-121.static-corp.ajato.com.br. [200.162.225.121]) by smtp.gmail.com with ESMTPSA id j3-20020a056870a48300b0019fa8728b05sm342214oal.39.2023.05.30.12.46.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 12:46:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1685476011; x=1688068011; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PQfvEU6D8rfX7EQRs/z2WyDaYmnYIefS7PvmuSNGDek=; b=UXPLkHHRtdO3pom0TSUeVlzJkSU6DJTyBiRbVN7HMlF6xyxnDB1EehU0BEuigYf90J wCcUlq11BFVp4pEcq44zLbafgoy9a+SNZpvPO5tCt66K+XMWO/YN00BaOmDNg92rkzaa k7k1QRB6R6ucfp0bM2Uhtu05mLEDjONYesymhLye8D9clZrAovGIM7eTs1o0LpGCdiav AKa4NvasEV1aP0eGxkkKod2O9PHQ1lztZEuOcn3rnPfZM7uHukfQyeLiGDq5k1pahMSH padlTzoK2I58TyiSoQSsdyS67mPesMAOE9eopCuB/amGl2n4TxqaUWight/uqzT++6gC YQLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685476011; x=1688068011; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PQfvEU6D8rfX7EQRs/z2WyDaYmnYIefS7PvmuSNGDek=; b=j13RXhCeK8FrYdUwnzHG5TXzpZSC/I0pwGZAebpC/gvcJzNU5PxmeouO7lDxiUHozd M9r7jYO5zpIg1uA8XYxaEBJuOceUTnEmL9qb3DdVdGbWFSu6FGESoDwNqBB9m4bi6ORz Lifp2C7C3CrjoGX4ZP1uDgdp5ZbHssgpzrlov0nleD4keDYBW+cc647W6Q+bB0Fy7Fch N9Rvo2IzdThJk8Wy9oNV7tNVL3Yj2n7fpREDy0b6p6xl3HD2ozIzp3ILrmAwWw+ZKdOS ogdDXvk09angiv7CcXGIfry7/EyIjhltEqzaYaVeRFGZXMEnHmqL/xn+c91VBr0AkQrm Bs8A== X-Gm-Message-State: AC+VfDxHLUmOk+tm1Zs047UcQlRrpOQa/Y1yOGKlzsVgJlqG8mDwb9Rc NQ9e4CRF6S9WZzxVeZIJMyUXX0ZkTsjTISes98E= X-Google-Smtp-Source: ACHHUZ5gF0cMgz0O0PJqSzJ/O3dHLQEOd9Kfo2y0jZZOsgPG4UK8VFZzdqb7hr+W2DrOs+Md4dJ0gA== X-Received: by 2002:a54:4e01:0:b0:398:2b60:dbf7 with SMTP id a1-20020a544e01000000b003982b60dbf7mr1456681oiy.17.1685476011393; Tue, 30 May 2023 12:46:51 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza , Andrew Jones Subject: [PATCH 06/16] target/riscv: use KVM scratch CPUs to init KVM properties Date: Tue, 30 May 2023 16:46:13 -0300 Message-Id: <20230530194623.272652-7-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230530194623.272652-1-dbarboza@ventanamicro.com> References: <20230530194623.272652-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::233; envelope-from=dbarboza@ventanamicro.com; helo=mail-oi1-x233.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1685476202793100001 Content-Type: text/plain; charset="utf-8" Certain validations, such as the validations done for the machine IDs (mvendorid/marchid/mimpid), are done before starting the CPU. Non-dynamic (named) CPUs tries to match user input with a preset default. As it is today we can't prefetch a KVM default for these cases because we're only able to read/write KVM regs after the vcpu is spinning. Our target/arm friends use a concept called "scratch CPU", which consists of creating a vcpu for doing queries and validations and so on, which is discarded shortly after use [1]. This is a suitable solution for what we need so let's implement it in target/riscv as well. kvm_riscv_init_machine_ids() will be used to do any pre-launch setup for KVM CPUs, via riscv_cpu_add_user_properties(). The function will create a KVM scratch CPU, fetch KVM regs that work as default values for user properties, and then discard the scratch CPU afterwards. We're starting by initializing 'mvendorid'. This concept will be used to init other KVM specific properties in the next patches as well. [1] target/arm/kvm.c, kvm_arm_create_scratch_host_vcpu() Suggested-by: Andrew Jones Signed-off-by: Daniel Henrique Barboza Acked-by: Alistair Francis Reviewed-by: Andrew Jones --- target/riscv/cpu.c | 4 ++ target/riscv/kvm.c | 85 ++++++++++++++++++++++++++++++++++++++++ target/riscv/kvm_riscv.h | 1 + 3 files changed, 90 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index d6e23bfd83..749d8bf5eb 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1703,6 +1703,10 @@ static void riscv_cpu_add_user_properties(Object *ob= j) Property *prop; DeviceState *dev =3D DEVICE(obj); =20 + if (riscv_running_KVM()) { + kvm_riscv_init_user_properties(obj); + } + riscv_cpu_add_misa_properties(obj); =20 for (prop =3D riscv_cpu_extensions; prop && prop->name; prop++) { diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c index 0f932a5b96..37f0f70794 100644 --- a/target/riscv/kvm.c +++ b/target/riscv/kvm.c @@ -309,6 +309,91 @@ static void kvm_riscv_put_regs_timer(CPUState *cs) env->kvm_timer_dirty =3D false; } =20 +typedef struct KVMScratchCPU { + int kvmfd; + int vmfd; + int cpufd; +} KVMScratchCPU; + +/* + * Heavily inspired by kvm_arm_create_scratch_host_vcpu() + * from target/arm/kvm.c. + */ +static bool kvm_riscv_create_scratch_vcpu(KVMScratchCPU *scratch) +{ + int kvmfd =3D -1, vmfd =3D -1, cpufd =3D -1; + + kvmfd =3D qemu_open_old("/dev/kvm", O_RDWR); + if (kvmfd < 0) { + goto err; + } + do { + vmfd =3D ioctl(kvmfd, KVM_CREATE_VM, 0); + } while (vmfd =3D=3D -1 && errno =3D=3D EINTR); + if (vmfd < 0) { + goto err; + } + cpufd =3D ioctl(vmfd, KVM_CREATE_VCPU, 0); + if (cpufd < 0) { + goto err; + } + + scratch->kvmfd =3D kvmfd; + scratch->vmfd =3D vmfd; + scratch->cpufd =3D cpufd; + + return true; + + err: + if (cpufd >=3D 0) { + close(cpufd); + } + if (vmfd >=3D 0) { + close(vmfd); + } + if (kvmfd >=3D 0) { + close(kvmfd); + } + + return false; +} + +static void kvm_riscv_destroy_scratch_vcpu(KVMScratchCPU *scratch) +{ + close(scratch->cpufd); + close(scratch->vmfd); + close(scratch->kvmfd); +} + +static void kvm_riscv_init_machine_ids(RISCVCPU *cpu, KVMScratchCPU *kvmcp= u) +{ + CPURISCVState *env =3D &cpu->env; + struct kvm_one_reg reg; + int ret; + + reg.id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, + KVM_REG_RISCV_CONFIG_REG(mvendorid)); + reg.addr =3D (uint64_t)&cpu->cfg.mvendorid; + ret =3D ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); + if (ret !=3D 0) { + error_report("Unable to retrieve mvendorid from host, error %d", r= et); + } +} + +void kvm_riscv_init_user_properties(Object *cpu_obj) +{ + RISCVCPU *cpu =3D RISCV_CPU(cpu_obj); + KVMScratchCPU kvmcpu; + + if (!kvm_riscv_create_scratch_vcpu(&kvmcpu)) { + return; + } + + kvm_riscv_init_machine_ids(cpu, &kvmcpu); + + kvm_riscv_destroy_scratch_vcpu(&kvmcpu); +} + const KVMCapabilityInfo kvm_arch_required_capabilities[] =3D { KVM_CAP_LAST_INFO }; diff --git a/target/riscv/kvm_riscv.h b/target/riscv/kvm_riscv.h index ed281bdce0..e3ba935808 100644 --- a/target/riscv/kvm_riscv.h +++ b/target/riscv/kvm_riscv.h @@ -19,6 +19,7 @@ #ifndef QEMU_KVM_RISCV_H #define QEMU_KVM_RISCV_H =20 +void kvm_riscv_init_user_properties(Object *cpu_obj); void kvm_riscv_reset_vcpu(RISCVCPU *cpu); void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level); =20 --=20 2.40.1