From nobody Tue Feb 10 23:13:44 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1685474597; cv=none; d=zohomail.com; s=zohoarc; b=mNG0M4SLRHgbNZJJ1fyA9SNxHKa/EXn0pkLlWyqWQvfZ50h76cG0BFMzUsmyH76B93BPiD+8WCWPQcMJ0/mNqi0cLwyfSzPvCcA1ZyLI5a9boXcZie2lusSdzLv+QwqvFV6YaBYoOE3aqHfmfwbE/lvKXzYBkCYHcwsQ/A24uXQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1685474597; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=oznYYgRZlnX+t2EBlDXRv+m0lTb2+8Xh7ZDPWTosV5I=; b=bBvwF7DTtIIw/fqa/euWiuVSScee20bYvLAaaFtA2bkrmwZ0C0XqGP9dVLcifbUGRipA20gRtgQZ3N6h1dPSezVJPXaUnjoCancy/at267Eb7Syj+IN1LI9E6Z4UdUQFwFOIsQ1ijaOVhpw4XSapwNh23LsxS/zWrzPnd0WGAyw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1685474597290386.11290088261126; Tue, 30 May 2023 12:23:17 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q44o5-0006lB-49; Tue, 30 May 2023 15:14:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q44nv-00063u-32 for qemu-devel@nongnu.org; Tue, 30 May 2023 15:14:48 -0400 Received: from mail-pf1-x42b.google.com ([2607:f8b0:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1q44nr-0004cS-U0 for qemu-devel@nongnu.org; Tue, 30 May 2023 15:14:46 -0400 Received: by mail-pf1-x42b.google.com with SMTP id d2e1a72fcca58-64d18d772bdso5568438b3a.3 for ; Tue, 30 May 2023 12:14:43 -0700 (PDT) Received: from stoup.. ([2602:ae:1598:4c01:35a2:c45d:7485:f488]) by smtp.gmail.com with ESMTPSA id 10-20020a63104a000000b0051806da5cd6sm8926757pgq.60.2023.05.30.12.14.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 12:14:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685474082; x=1688066082; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oznYYgRZlnX+t2EBlDXRv+m0lTb2+8Xh7ZDPWTosV5I=; b=MlFDRvo3276gw6duv8oO1KLBnmYGMDOXRqb6xJ18gxMqQWdBurGWIV02Tu5HP+BJgz 66JPevtPzhqrSwD5MM17u5IEW9r45G1ndXuWMH+i2GIsOIcQUJCa7nQshivU1Pkt0Ydh tb1TwlD8ezKFxs3+lUoPB7jHDH5FSHmS0rxVYFADeGP/oHbXhctsNj88vNsjw2p27/Fm dqa2BWlm6gi/fJJdzWs2AbqFFLxUC9a95kOAsSvpVH1AQ+JUjT/T9oXRtk0L8pJTUOS3 9WZMHWtRC6ckmueP+sTIWnYwgHdcU5z8cRz4yU9sVqDDqhs+69ix1y6HRGYeQndhJSpX aqSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685474082; x=1688066082; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oznYYgRZlnX+t2EBlDXRv+m0lTb2+8Xh7ZDPWTosV5I=; b=Y8LKbo79x8fX2wbkAF9qK6+B7MZ4FlOg9MmgKLlEK5KL+F/s2fqla/yKpcXoSstYcz 4QwuHftXQ/NxqkxpnS2MWDDElyJKOpQQpCkcYXCS5HNa3SIn991J86dwVEn+jjdWRsaF DXLUIzKzOeSsI77C2sjT1/f8TLgPK5Op5T5oDCX1ft8YOAa233nxMr6/eOJFgRm0+G2M zmTwy9xdAIhVgbFkgFoMmW/AXlHOys3LvB3O04jtYcx0btoaTqX6BESSD0SvaBhM5S4V eUiUhS6fma24BFHD7HmGdh/w19pRgrCTt5KtfcwqYvKGleIXcIIYoId5tYd2OkSyEFU0 P+BQ== X-Gm-Message-State: AC+VfDxFErd/5fHZm2p6oHM87mxWMiTGJroF6ac8ZRjayB3rzmOlGfqH 104P4vRiDrsa1rRk1UT807t4gYcMFUHAVNUb36E= X-Google-Smtp-Source: ACHHUZ7tpfU+aQ7rSH03sc6ApfU8v9tZA8KXWhfxTK4WtuqMVmopeokBlhCUPwC1lynBsin9PcIVIQ== X-Received: by 2002:a05:6a20:160a:b0:10a:ef03:3346 with SMTP id l10-20020a056a20160a00b0010aef033346mr4021874pzj.9.1685474082649; Tue, 30 May 2023 12:14:42 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell Subject: [PATCH v3 04/20] target/arm: Use tcg_gen_qemu_ld_i128 for LDXP Date: Tue, 30 May 2023 12:14:22 -0700 Message-Id: <20230530191438.411344-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230530191438.411344-1-richard.henderson@linaro.org> References: <20230530191438.411344-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1685474599304100002 Content-Type: text/plain; charset="utf-8" While we don't require 16-byte atomicity here, using a single larger load simplifies the code, and makes it a closer match to STXP. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 31 ++++++++++++++++++++----------- 1 file changed, 20 insertions(+), 11 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 967400ed68..0e720f2612 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -2398,14 +2398,14 @@ static void gen_load_exclusive(DisasContext *s, int= rt, int rt2, TCGv_i64 addr, int size, bool is_pair) { int idx =3D get_mem_index(s); - MemOp memop =3D s->be_data; + MemOp memop; =20 g_assert(size <=3D 3); if (is_pair) { g_assert(size >=3D 2); if (size =3D=3D 2) { /* The pair must be single-copy atomic for the doubleword. */ - memop |=3D MO_64 | MO_ALIGN; + memop =3D finalize_memop(s, MO_64 | MO_ALIGN); tcg_gen_qemu_ld_i64(cpu_exclusive_val, addr, idx, memop); if (s->be_data =3D=3D MO_LE) { tcg_gen_extract_i64(cpu_reg(s, rt), cpu_exclusive_val, 0, = 32); @@ -2415,21 +2415,30 @@ static void gen_load_exclusive(DisasContext *s, int= rt, int rt2, tcg_gen_extract_i64(cpu_reg(s, rt2), cpu_exclusive_val, 0,= 32); } } else { - /* The pair must be single-copy atomic for *each* doubleword, = not - the entire quadword, however it must be quadword aligned. = */ - memop |=3D MO_64; - tcg_gen_qemu_ld_i64(cpu_exclusive_val, addr, idx, - memop | MO_ALIGN_16); + /* + * The pair must be single-copy atomic for *each* doubleword, = not + * the entire quadword, however it must be quadword aligned. + * Expose the complete load to tcg, for ease of tlb lookup, + * but indicate that only 8-byte atomicity is required. + */ + TCGv_i128 t16 =3D tcg_temp_new_i128(); =20 - TCGv_i64 addr2 =3D tcg_temp_new_i64(); - tcg_gen_addi_i64(addr2, addr, 8); - tcg_gen_qemu_ld_i64(cpu_exclusive_high, addr2, idx, memop); + memop =3D finalize_memop_atom(s, MO_128 | MO_ALIGN_16, + MO_ATOM_IFALIGN_PAIR); + tcg_gen_qemu_ld_i128(t16, addr, idx, memop); =20 + if (s->be_data =3D=3D MO_LE) { + tcg_gen_extr_i128_i64(cpu_exclusive_val, + cpu_exclusive_high, t16); + } else { + tcg_gen_extr_i128_i64(cpu_exclusive_high, + cpu_exclusive_val, t16); + } tcg_gen_mov_i64(cpu_reg(s, rt), cpu_exclusive_val); tcg_gen_mov_i64(cpu_reg(s, rt2), cpu_exclusive_high); } } else { - memop |=3D size | MO_ALIGN; + memop =3D finalize_memop(s, size | MO_ALIGN); tcg_gen_qemu_ld_i64(cpu_exclusive_val, addr, idx, memop); tcg_gen_mov_i64(cpu_reg(s, rt), cpu_exclusive_val); } --=20 2.34.1