From nobody Mon Feb 9 06:49:03 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1685363054; cv=none; d=zohomail.com; s=zohoarc; b=iwID/wkawf/akDXkZ2ndx/8bJ30NNJGuYOWkr/VHGp3whnXIB2nZIZ6I04qBZ0DxgqOClyR0JzHE7IECZLjkUv3PkQ1qAgq6j6WtmQcSL+g0eaKcsiROaW8BRD/7SLJ8RWzykG1oufot1xjRsuL7jPXuZgsRByppQYk0vluBZYY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1685363054; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=7t4gLkHCYDf4C8Nd7yVB3+ykTzb/idC1IbGsUxBNPCY=; b=T2eX07adYyyIQqUluC48WlvBMOdZiR9mDHhA6aJ6C1SB60poRn137pJsuSqbzmXD+RaRMuwBnhFw0IsXB6/YqhMwZO3b5MAFvdamZiVBRlCd9JeGDZ05WtXuJkl9/R31YF8AjuveOzT+Rn20Oy6Kwe7V9IuozYYlej2RklyDUnA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1685363054965528.7964716152162; Mon, 29 May 2023 05:24:14 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q3btI-0004wC-BH; Mon, 29 May 2023 08:22:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q3bt2-0004dV-FC for qemu-devel@nongnu.org; Mon, 29 May 2023 08:22:13 -0400 Received: from mga02.intel.com ([134.134.136.20]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q3bt0-0006RT-P1 for qemu-devel@nongnu.org; Mon, 29 May 2023 08:22:08 -0400 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 May 2023 05:22:04 -0700 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.28]) by fmsmga001.fm.intel.com with ESMTP; 29 May 2023 05:22:01 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1685362926; x=1716898926; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ygeavoGQtk7UPynGwun8xbI+kr7xDeFqlws6c+7TqeE=; b=SIKPugYKexDvki/DXDGMXYLkMgf71UXaVq6w7ks7fQdD99wBukEP/a+Z GlBcP2LE4eM4qmrrFGMVDEGQp+eKNDfPqtPWpeMIYQvvhv2KimZIJOupN stqnUOO/KuFl3u0F93Y4e0+4NQwF97gaqY9L+oSCD/tPchBl0s5cIjcpO pfvRq63BV18ek96hAjxBnZSwdy5ZbQ0VU2Wg0Z9l8ZspsPXBxiiTLmTwo h/4pUIQBu9YO0CAe/DOBPCSZZhru47t38ZhpEUVhDb/b+JXnKfjva/MM7 jIjztwpRCaa7umM8dszC5mKlxk8kYoqXoeD2HZMbqkCVMEpoHk9K2x6wg g==; X-IronPort-AV: E=McAfee;i="6600,9927,10725"; a="344190232" X-IronPort-AV: E=Sophos;i="6.00,201,1681196400"; d="scan'208";a="344190232" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10725"; a="850388689" X-IronPort-AV: E=Sophos;i="6.00,201,1681196400"; d="scan'208";a="850388689" From: Zhao Liu To: Eduardo Habkost , Marcel Apfelbaum , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , "Michael S . Tsirkin" , Richard Henderson , Paolo Bonzini Cc: qemu-devel@nongnu.org, Zhenyu Wang , Xiaoyao Li , Babu Moger , Zhao Liu , Zhuocheng Ding Subject: [PATCH v2 10/17] i386/cpu: Introduce cluster-id to X86CPU Date: Mon, 29 May 2023 20:30:54 +0800 Message-Id: <20230529123101.411267-11-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230529123101.411267-1-zhao1.liu@linux.intel.com> References: <20230529123101.411267-1-zhao1.liu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=134.134.136.20; envelope-from=zhao1.liu@linux.intel.com; helo=mga02.intel.com X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.16, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1685363055589100001 Content-Type: text/plain; charset="utf-8" From: Zhuocheng Ding We introduce cluster-id other than module-id to be consistent with CpuInstanceProperties.cluster-id, and this avoids the confusion of parameter names when hotplugging. Following the legacy smp check rules, also add the cluster_id validity into x86_cpu_pre_plug(). Signed-off-by: Zhuocheng Ding Co-developed-by: Zhao Liu Signed-off-by: Zhao Liu --- hw/i386/x86.c | 33 +++++++++++++++++++++++++-------- target/i386/cpu.c | 2 ++ target/i386/cpu.h | 1 + 3 files changed, 28 insertions(+), 8 deletions(-) diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 0b460fd6074d..8154b86f95c7 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -328,6 +328,14 @@ void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, cpu->die_id =3D 0; } =20 + /* + * cluster-id was optional in QEMU 8.0 and older, so keep it optio= nal + * if there's only one cluster per die. + */ + if (cpu->cluster_id < 0 && ms->smp.clusters =3D=3D 1) { + cpu->cluster_id =3D 0; + } + if (cpu->socket_id < 0) { error_setg(errp, "CPU socket-id is not set"); return; @@ -344,6 +352,14 @@ void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, cpu->die_id, ms->smp.dies - 1); return; } + if (cpu->cluster_id < 0) { + error_setg(errp, "CPU cluster-id is not set"); + return; + } else if (cpu->cluster_id > ms->smp.clusters - 1) { + error_setg(errp, "Invalid CPU cluster-id: %u must be in range = 0:%u", + cpu->cluster_id, ms->smp.clusters - 1); + return; + } if (cpu->core_id < 0) { error_setg(errp, "CPU core-id is not set"); return; @@ -363,16 +379,9 @@ void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, =20 topo_ids.pkg_id =3D cpu->socket_id; topo_ids.die_id =3D cpu->die_id; + topo_ids.module_id =3D cpu->cluster_id; topo_ids.core_id =3D cpu->core_id; topo_ids.smt_id =3D cpu->thread_id; - - /* - * TODO: This is the temporary initialization for topo_ids.module_= id to - * avoid "maybe-uninitialized" compilation errors. Will remove when - * X86CPU supports cluster_id. - */ - topo_ids.module_id =3D 0; - cpu->apic_id =3D x86_apicid_from_topo_ids(&topo_info, &topo_ids); } =20 @@ -419,6 +428,14 @@ void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, } cpu->die_id =3D topo_ids.die_id; =20 + if (cpu->cluster_id !=3D -1 && cpu->cluster_id !=3D topo_ids.module_id= ) { + error_setg(errp, "property cluster-id: %u doesn't match set apic-i= d:" + " 0x%x (cluster-id: %u)", cpu->cluster_id, cpu->apic_id, + topo_ids.module_id); + return; + } + cpu->cluster_id =3D topo_ids.module_id; + if (cpu->core_id !=3D -1 && cpu->core_id !=3D topo_ids.core_id) { error_setg(errp, "property core-id: %u doesn't match set apic-id:" " 0x%x (core-id: %u)", cpu->core_id, cpu->apic_id, diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 8e487c20ff12..e8d156428772 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7532,12 +7532,14 @@ static Property x86_cpu_properties[] =3D { DEFINE_PROP_UINT32("apic-id", X86CPU, apic_id, 0), DEFINE_PROP_INT32("thread-id", X86CPU, thread_id, 0), DEFINE_PROP_INT32("core-id", X86CPU, core_id, 0), + DEFINE_PROP_INT32("cluster-id", X86CPU, cluster_id, 0), DEFINE_PROP_INT32("die-id", X86CPU, die_id, 0), DEFINE_PROP_INT32("socket-id", X86CPU, socket_id, 0), #else DEFINE_PROP_UINT32("apic-id", X86CPU, apic_id, UNASSIGNED_APIC_ID), DEFINE_PROP_INT32("thread-id", X86CPU, thread_id, -1), DEFINE_PROP_INT32("core-id", X86CPU, core_id, -1), + DEFINE_PROP_INT32("cluster-id", X86CPU, cluster_id, -1), DEFINE_PROP_INT32("die-id", X86CPU, die_id, -1), DEFINE_PROP_INT32("socket-id", X86CPU, socket_id, -1), #endif diff --git a/target/i386/cpu.h b/target/i386/cpu.h index fb8f7cb24902..62230b6f7701 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2026,6 +2026,7 @@ struct ArchCPU { int32_t node_id; /* NUMA node this CPU belongs to */ int32_t socket_id; int32_t die_id; + int32_t cluster_id; int32_t core_id; int32_t thread_id; =20 --=20 2.34.1