From nobody Fri Oct 18 08:32:58 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=mail.uni-paderborn.de Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1685082092931495.04324859872736; Thu, 25 May 2023 23:21:32 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q2QoJ-0008GQ-4C; Fri, 26 May 2023 02:20:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q2QoH-0008FM-4c for qemu-devel@nongnu.org; Fri, 26 May 2023 02:20:21 -0400 Received: from hoth.uni-paderborn.de ([2001:638:502:c003::19]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q2QoD-0008M8-CK for qemu-devel@nongnu.org; Fri, 26 May 2023 02:20:20 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.uni-paderborn.de; s=20170601; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=omCdOhFHnUw+9yCsu1jst9MrfPbhvtaiiSHFwS/SyzA=; b=SqtLnbT1HKMp6uDFEe54jO44yV RYAcS2WJUviP35wfngd2h+U55nmmGl9+pfaDtHVQCY0wVQ/p1scZn05lom4UXXrjWAQ1KOlHV86ir enXs9Ht0bjCKaWfTEDa7z5SAZVEs88TYmn6oSxmwN2TxYgHklJKaxyEYPnktaTd5e/QY=; X-Envelope-From: From: Bastian Koppelmann To: qemu-devel@nongnu.org Cc: kbastian@mail.uni-paderborn.de Subject: [PATCH v2 3/6] tests/tcg/tricore: Add first C program Date: Fri, 26 May 2023 08:19:43 +0200 Message-Id: <20230526061946.54514-4-kbastian@mail.uni-paderborn.de> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230526061946.54514-1-kbastian@mail.uni-paderborn.de> References: <20230526061946.54514-1-kbastian@mail.uni-paderborn.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-PMX-Version: 6.4.9.2830568, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2023.5.26.60617, AntiVirus-Engine: 6.0.0, AntiVirus-Data: 2023.5.16.600001 X-Sophos-SenderHistory: ip=84.184.48.71, fs=405237, da=172691077, mc=7, sc=0, hc=7, sp=0, fso=405237, re=0, sd=0, hd=0 X-IMT-Source: Intern X-IMT-Spam-Score: 0.0 () X-IMT-Authenticated-Sender: uid=kbastian,ou=People,o=upb,c=de Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:638:502:c003::19; envelope-from=kbastian@mail.uni-paderborn.de; helo=hoth.uni-paderborn.de X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1685082094844100003 Content-Type: text/plain; charset="utf-8" this allows us to exercise the startup code used by GCC to call main(). Signed-off-by: Bastian Koppelmann --- configure | 1 + tests/tcg/tricore/Makefile.softmmu-target | 13 + tests/tcg/tricore/c/crt0-tc2x.S | 335 ++++++++++++++++++++++ tests/tcg/tricore/c/test_boot_to_main.c | 13 + tests/tcg/tricore/c/testdev_assert.h | 18 ++ tests/tcg/tricore/link.ld | 16 ++ 6 files changed, 396 insertions(+) create mode 100644 tests/tcg/tricore/c/crt0-tc2x.S create mode 100644 tests/tcg/tricore/c/test_boot_to_main.c create mode 100644 tests/tcg/tricore/c/testdev_assert.h diff --git a/configure b/configure index 80ca1c9221..2743977469 100755 --- a/configure +++ b/configure @@ -1451,6 +1451,7 @@ probe_target_compiler() { container_cross_prefix=3Dtricore- container_cross_as=3Dtricore-as container_cross_ld=3Dtricore-ld + container_cross_cc=3Dtricore-gcc break ;; x86_64) diff --git a/tests/tcg/tricore/Makefile.softmmu-target b/tests/tcg/tricore/= Makefile.softmmu-target index 29c75acfb3..f051444991 100644 --- a/tests/tcg/tricore/Makefile.softmmu-target +++ b/tests/tcg/tricore/Makefile.softmmu-target @@ -1,8 +1,10 @@ TESTS_PATH =3D $(SRC_PATH)/tests/tcg/tricore ASM_TESTS_PATH =3D $(TESTS_PATH)/asm +C_TESTS_PATH =3D $(TESTS_PATH)/c =20 LDFLAGS =3D -T$(TESTS_PATH)/link.ld --mcpu=3Dtc162 ASFLAGS =3D -mtc162 +CFLAGS =3D -mtc162 -c =20 TESTS +=3D test_abs.asm.tst TESTS +=3D test_bmerge.asm.tst @@ -20,6 +22,8 @@ TESTS +=3D test_madd.asm.tst TESTS +=3D test_msub.asm.tst TESTS +=3D test_muls.asm.tst =20 +TESTS +=3D test_boot_to_main.c.tst + QEMU_OPTS +=3D -M tricore_testboard -cpu tc27x -nographic -kernel =20 %.pS: $(ASM_TESTS_PATH)/%.S @@ -31,5 +35,14 @@ QEMU_OPTS +=3D -M tricore_testboard -cpu tc27x -nographi= c -kernel %.asm.tst: %.o $(LD) $(LDFLAGS) $< -o $@ =20 +crt0-tc2x.o: $(C_TESTS_PATH)/crt0-tc2x.S + $(AS) $(ASFLAGS) -o $@ $< + +%.o: $(C_TESTS_PATH)/%.c + $(CC) $(CFLAGS) -o $@ $< + +%.c.tst: %.o crt0-tc2x.o + $(LD) $(LDFLAGS) -o $@ $^ + # We don't currently support the multiarch system tests undefine MULTIARCH_TESTS diff --git a/tests/tcg/tricore/c/crt0-tc2x.S b/tests/tcg/tricore/c/crt0-tc2= x.S new file mode 100644 index 0000000000..3100da123c --- /dev/null +++ b/tests/tcg/tricore/c/crt0-tc2x.S @@ -0,0 +1,335 @@ +/* + * crt0-tc2x.S -- Startup code for GNU/TriCore applications. + * + * Copyright (C) 1998-2014 HighTec EDV-Systeme GmbH. + * + * This file is part of GCC. + * + * GCC is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3, or (at your option) + * any later version. + * + * GCC is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Under Section 7 of GPL version 3, you are granted additional + * permissions described in the GCC Runtime Library Exception, version + * 3.1, as published by the Free Software Foundation. + * + * You should have received a copy of the GNU General Public License and + * a copy of the GCC Runtime Library Exception along with this program; + * see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + * . */ + +/* Define the Derivate Name as a hexvalue. This value + * is built-in defined in tricore-c.c (from tricore-devices.c) + * the derivate number as a hexvalue (e.g. TC1796 =3D> 0x1796 + * This name will be used in the memory.x Memory description to + * to confirm that the crt0.o and the memory.x will be get from + * same directory + */ + .section ".startup_code", "ax", @progbits + .global _start + .type _start,@function + +/* default BMI header (only TC2xxx devices) */ + .word 0x00000000 + .word 0xb3590070 + .word 0x00000000 + .word 0x00000000 + .word 0x00000000 + .word 0x00000000 + .word 0x791eb864 + .word 0x86e1479b + +_start: + .code32 + j _startaddr + .align 2 + +_startaddr: + /* + * initialize user and interrupt stack pointers + */ + movh.a %sp,hi:__USTACK # load %sp + lea %sp,[%sp]lo:__USTACK + movh %d0,hi:__ISTACK # load $isp + addi %d0,%d0,lo:__ISTACK + mtcr $isp,%d0 + isync + +#; install trap handlers + + movh %d0,hi:first_trap_table #; load $btv + addi %d0,%d0,lo:first_trap_table + mtcr $btv,%d0 + isync + + /* + * initialize call depth counter + */ + + mfcr %d0,$psw + or %d0,%d0,0x7f # disable call depth counting + andn %d0,%d0,0x80 # clear CDE bit + mtcr $psw,%d0 + isync + + /* + * initialize access to system global registers + */ + + mfcr %d0,$psw + or %d0,%d0,0x100 # set GW bit + mtcr $psw,%d0 + isync + + /* + * initialize SDA base pointers + */ + .global _SMALL_DATA_,_SMALL_DATA2_,_SMALL_DATA3_,_SMALL_DATA4_ + .weak _SMALL_DATA_,_SMALL_DATA2_,_SMALL_DATA3_,_SMALL_DATA4_ + + movh.a %a0,hi:_SMALL_DATA_ # %a0 addresses .sdata/.sbss + lea %a0,[%a0]lo:_SMALL_DATA_ + movh.a %a1,hi:_SMALL_DATA2_ # %a1 addresses .sdata2/.sbss2 + lea %a1,[%a1]lo:_SMALL_DATA2_ + movh.a %a8,hi:_SMALL_DATA3_ # %a8 addresses .sdata3/.sbss3 + lea %a8,[%a8]lo:_SMALL_DATA3_ + movh.a %a9,hi:_SMALL_DATA4_ # %a9 addresses .sdata4/.sbss4 + lea %a9,[%a9]lo:_SMALL_DATA4_ + + /* + * reset access to system global registers + */ + + mfcr %d0,$psw + andn %d0,%d0,0x100 # clear GW bit + mtcr $psw,%d0 + isync + + /* + * initialize context save areas + */ + + jl __init_csa + + + + /* + * handle clear table (i.e., fill BSS with zeros) + */ + + jl __clear_table_func + + + /* + * handle copy table (support for romable code) + */ + + jl __copy_table_func + + + /* + * _exit (main (0, NULL)); + */ + mov %d4,0 # argc =3D 0 + sub.a %sp,8 + st.w [%sp]0,%d4 + st.w [%sp]4,%d4 + mov.aa %a4,%sp # argv + + call main # int retval =3D main (0, NULL); + mov.a %a14,%d2 # move exit code to match trap handler + j _exit # _exit (retval); + + debug # should never come here + + + /* + * initialize context save areas (CSAs), PCXI, LCX and FCX + */ + + .global __init_csa + .type __init_csa,function + +__init_csa: + movh %d0,0 + mtcr $pcxi,%d0 + isync + movh %d0,hi:__CSA_BEGIN #; %d0 =3D begin of CSA + addi %d0,%d0,lo:__CSA_BEGIN + addi %d0,%d0,63 #; force alignment (2^6) + andn %d0,%d0,63 + movh %d2,hi:__CSA_END #; %d2 =3D end of CSA + addi %d2,%d2,lo:__CSA_END + andn %d2,%d2,63 #; force alignment (2^6) + sub %d2,%d2,%d0 + sh %d2,%d2,-6 #; %d2 =3D number of CSAs + mov.a %a3,%d0 #; %a3 =3D address of first CSA + extr.u %d0,%d0,28,4 #; %d0 =3D segment << 16 + sh %d0,%d0,16 + lea %a4,0 #; %a4 =3D previous CSA =3D 0 + st.a [%a3],%a4 #; store it in 1st CSA + mov.aa %a4,%a3 #; %a4 =3D current CSA + lea %a3,[%a3]64 #; %a3 =3D %a3->nextCSA + mov.d %d1,%a3 + extr.u %d1,%d1,6,16 #; get CSA index + or %d1,%d1,%d0 #; add segment number + mtcr $lcx,%d1 #; initialize LCX + add %d2,%d2,-2 #; CSAs to initialize -=3D 2 + mov.a %a5,%d2 #; %a5 =3D loop counter +csa_loop: + mov.d %d1,%a4 #; %d1 =3D current CSA address + extr.u %d1,%d1,6,16 #; get CSA index + or %d1,%d1,%d0 #; add segment number + st.w [%a3],%d1 #; store "nextCSA" pointer + mov.aa %a4,%a3 #; %a4 =3D current CSA address + lea %a3,[%a3]64 #; %a3 =3D %a3->nextCSA + loop %a5,csa_loop #; repeat until done + + mov.d %d1,%a4 #; %d1 =3D current CSA address + extr.u %d1,%d1,6,16 #; get CSA index + or %d1,%d1,%d0 #; add segment number + mtcr $fcx,%d1 #; initialize FCX + isync + ji %a11 + + + + + /* + * handle clear table (i.e., fill BSS with zeros) + */ + .global __clear_table_func + .type __clear_table_func,@function + +__clear_table_func: + mov %d14,0 # %e14 =3D 0 + mov %d15,0 + movh.a %a13,hi:__clear_table # %a13 =3D &first table entry + lea %a13,[%a13]lo:__clear_table + +__clear_table_next: + ld.a %a15,[%a13+]4 # %a15 =3D current block base + ld.w %d3,[%a13+]4 # %d3 =3D current block length + jeq %d3,-1,__clear_table_done # length =3D=3D -1 =3D> end of table + sh %d0,%d3,-3 # %d0 =3D length / 8 (doublewords) + and %d1,%d3,7 # %d1 =3D length % 8 (rem. bytes) + jz %d0,__clear_word # block size < 8 =3D> clear word + addi %d0,%d0,-1 # else doublewords -=3D 1 + mov.a %a2,%d0 # %a2 =3D loop counter +__clear_dword: + st.d [%a15+]8,%e14 # clear one doubleword + loop %a2,__clear_dword +__clear_word: + jz %d1,__clear_table_next + sh %d0,%d1,-2 # %d0 =3D length / 4 (words) + and %d1,%d1,3 # %d1 =3D length % 4 (rem. bytes) + jz %d0,__clear_hword # block size < 4 =3D> clear hword + st.w [%a15+]4,%d15 # clear one word +__clear_hword: + jz %d1,__clear_table_next + sh %d0,%d1,-1 # %d0 =3D length / 2 (halfwords) + and %d1,%d1,1 # %d1 =3D length % 2 (rem. bytes) + jz %d0,__clear_byte # block size < 2 =3D> clear byte + st.h [%a15+]2,%d15 # clear one halfword +__clear_byte: + jz %d1,__clear_table_next + st.b [%a15],%d15 # clear one byte + j __clear_table_next # handle next clear table entry +__clear_table_done: + + ji %a11 + + + + /* + * handle copy table (support for romable code) + */ + .global __copy_table_func + .type __copy_table_func,@function + +__copy_table_func: + movh.a %a13,hi:__copy_table # %a13 =3D &first table entry + lea %a13,[%a13]lo:__copy_table + +__copy_table_next: + ld.a %a15,[%a13+]4 # %a15 =3D src address + ld.a %a14,[%a13+]4 # %a14 =3D dst address + ld.w %d3,[%a13+]4 # %d3 =3D block length + jeq %d3,-1,__copy_table_done # length =3D=3D -1 =3D> end of table + sh %d0,%d3,-3 # %d0 =3D length / 8 (doublewords) + and %d1,%d3,7 # %d1 =3D lenght % 8 (rem. bytes) + jz %d0,__copy_word # block size < 8 =3D> copy word + addi %d0,%d0,-1 # else doublewords -=3D 1 + mov.a %a2,%d0 # %a2 =3D loop counter +__copy_dword: + ld.d %e14,[%a15+]8 # copy one doubleword + st.d [%a14+]8,%e14 + loop %a2,__copy_dword +__copy_word: + jz %d1,__copy_table_next + sh %d0,%d1,-2 # %d0 =3D length / 4 (words) + and %d1,%d1,3 # %d1 =3D lenght % 4 (rem. bytes) + jz %d0,__copy_hword # block size < 4 =3D> copy hword + ld.w %d14,[%a15+]4 # copy one word + st.w [%a14+]4,%d14 +__copy_hword: + jz %d1,__copy_table_next + sh %d0,%d1,-1 # %d0 =3D length / 2 (halfwords) + and %d1,%d1,1 # %d1 =3D length % 2 (rem. bytes) + jz %d0,__copy_byte # block size < 2 =3D> copy byte + ld.h %d14,[%a15+]2 # copy one halfword + st.h [%a14+]2,%d14 +__copy_byte: + jz %d1,__copy_table_next + ld.b %d14,[%a15]0 # copy one byte + st.b [%a14],%d14 + j __copy_table_next # handle next copy table entry +__copy_table_done: + + ji %a11 + +_exit: + movh.a %a15, hi:__TESTDEVICE + lea %a15,[%a15]lo:__TESTDEVICE + mov.d %d2, %a14 + st.w [%a15], %d2 # write exit code to testdevice + debug + +/*=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D* + * Exception handlers (exceptions in startup code) + * + * This is a minimal trap vector table, which consists of eight + * entries, each consisting of eight words (32 bytes). + *=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D*/ + + +#; .section .traptab, "ax", @progbits + +.macro trapentry from=3D0, to=3D7 + mov.u %d14, \from << 8 + add %d14,%d14,%d15 + mov.a %a14,%d14 + addih.a %a14,%a14,0 # if we trap, we fail + j _exit +0: + j 0b + nop + rfe + .align 5 + + .if \to-\from + trapentry "(\from+1)",\to + .endif +.endm + + .align 8 + .global first_trap_table +first_trap_table: + trapentry 0, 7 + diff --git a/tests/tcg/tricore/c/test_boot_to_main.c b/tests/tcg/tricore/c/= test_boot_to_main.c new file mode 100644 index 0000000000..fa28a5b433 --- /dev/null +++ b/tests/tcg/tricore/c/test_boot_to_main.c @@ -0,0 +1,13 @@ +/* + * Copyright (C) 2023 Bastian Koppelmann + * + * This code is licensed under the GPL version 2 or later. See the + * COPYING file in the top-level directory. + */ + +#include "testdev_assert.h" +int main(int argc, char **argv) +{ + testdev_assert(1); + return 0; +} diff --git a/tests/tcg/tricore/c/testdev_assert.h b/tests/tcg/tricore/c/tes= tdev_assert.h new file mode 100644 index 0000000000..ccd14f5025 --- /dev/null +++ b/tests/tcg/tricore/c/testdev_assert.h @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2023 Bastian Koppelmann + * + * This code is licensed under the GPL version 2 or later. See the + * COPYING file in the top-level directory. + */ + +int *testdev =3D (int *)0xf0000000; + +#define FAIL 1 +static inline void testdev_assert(int condition) +{ + if (!condition) { + *testdev =3D FAIL; + asm("debug"); + } +} + diff --git a/tests/tcg/tricore/link.ld b/tests/tcg/tricore/link.ld index 364bcdc00a..acc1758c41 100644 --- a/tests/tcg/tricore/link.ld +++ b/tests/tcg/tricore/link.ld @@ -12,6 +12,7 @@ MEMORY /* * Define the sizes of the user and system stacks. */ +__ISTACK_SIZE =3D DEFINED (__ISTACK_SIZE) ? __ISTACK_SIZE : 256 ; __USTACK_SIZE =3D DEFINED (__USTACK_SIZE) ? __USTACK_SIZE : 1K ; /* * Define the start address and the size of the context save area. @@ -20,6 +21,8 @@ __CSA_BEGIN =3D 0xd0000000 ; __CSA_SIZE =3D 8k ; __CSA_END =3D __CSA_BEGIN + __CSA_SIZE ; =20 +__TESTDEVICE =3D 0xf0000000 ; + SECTIONS { .text : @@ -32,6 +35,18 @@ SECTIONS { *(.rodata) *(.rodata1) + /* + * Create the clear and copy tables that tell the startup code + * which memory areas to clear and to copy, respectively. + */ + . =3D ALIGN(4) ; + PROVIDE(__clear_table =3D .) ; + LONG(0 + ADDR(.bss)); LONG(SIZEOF(.bss)); + LONG(-1); LONG(-1); + PROVIDE(__copy_table =3D .) ; + LONG(LOADADDR(.data)); LONG(0 + ADDR(.data)); LONG(SIZEOF(.data)= ); + LONG(-1); LONG(-1); LONG(-1); + . =3D ALIGN(8); } > data_ram =20 .data : @@ -40,6 +55,7 @@ SECTIONS *(.data) *(.data.*) . =3D ALIGN(8) ; + __ISTACK =3D . + __ISTACK_SIZE ; __USTACK =3D . + __USTACK_SIZE -768; =20 } > data_ram --=20 2.40.1