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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::332; envelope-from=sunilvl@ventanamicro.com; helo=mail-ot1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1685033348240100001 Content-Type: text/plain; charset="utf-8" Currently, virt machine supports two pflash instances each with 32MB size. However, the first pflash is always assumed to contain M-mode firmware and reset vector is set to this if enabled. Hence, for S-mode payloads like EDK2, only one pflash instance is available for use. This means both code and NV variables of EDK2 will need to use the same pflash. The OS distros keep the EDK2 FW code as readonly. When non-volatile variables also need to share the same pflash, it is not possible to keep it as readonly since variables need write access. To resolve this issue, the code and NV variables need to be separated. But in that case we need an extra flash. Hence, modify the convention such that pflash0 will contain the M-mode FW only when "-bios none" option is used. Otherwise, pflash0 will contain the S-mode payload FW. This enables both pflash instances available for EDK2 use. Example usage: 1) pflash0 containing M-mode FW qemu-system-riscv64 -bios none -pflash -machine virt or qemu-system-riscv64 -bios none \ -drive file=3D,if=3Dpflash,format=3Draw,unit=3D0 -machine virt 2) pflash0 containing S-mode payload like EDK2 qemu-system-riscv64 -pflash -pflash -machine = virt or qemu-system-riscv64 -bios \ -pflash \ -pflash \ -machine virt or qemu-system-riscv64 -bios \ -drive file=3D,if=3Dpflash,format=3Draw,unit=3D0,readonly=3D= on \ -drive file=3D,if=3Dpflash,format=3Draw,unit=3D1 \ -machine virt Signed-off-by: Sunil V L Reported-by: Heinrich Schuchardt Tested-by: Andrea Bolognani --- hw/riscv/virt.c | 51 ++++++++++++++++++------------------------------- 1 file changed, 19 insertions(+), 32 deletions(-) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 4e3efbee16..1187a60d6e 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1245,7 +1245,7 @@ static void virt_machine_done(Notifier *notifier, voi= d *data) target_ulong firmware_end_addr, kernel_start_addr; const char *firmware_name =3D riscv_default_firmware_name(&s->soc[0]); uint32_t fdt_load_addr; - uint64_t kernel_entry; + uint64_t kernel_entry =3D 0; =20 /* * Only direct boot kernel is currently supported for KVM VM, @@ -1266,42 +1266,29 @@ static void virt_machine_done(Notifier *notifier, v= oid *data) firmware_end_addr =3D riscv_find_and_load_firmware(machine, firmware_n= ame, start_addr, NULL); =20 - if (drive_get(IF_PFLASH, 0, 1)) { - /* - * S-mode FW like EDK2 will be kept in second plash (unit 1). - * When both kernel, initrd and pflash options are provided in the - * command line, the kernel and initrd will be copied to the fw_cfg - * table and opensbi will jump to the flash address which is the - * entry point of S-mode FW. It is the job of the S-mode FW to load - * the kernel and initrd using fw_cfg table. - * - * If only pflash is given but not -kernel, then it is the job of - * of the S-mode firmware to locate and load the kernel. - * In either case, the next_addr for opensbi will be the flash add= ress. - */ - riscv_setup_firmware_boot(machine); - kernel_entry =3D virt_memmap[VIRT_FLASH].base + - virt_memmap[VIRT_FLASH].size / 2; - } else if (machine->kernel_filename) { + if (drive_get(IF_PFLASH, 0, 0)) { + if (machine->firmware && !strcmp(machine->firmware, "none")) { + /* + * Pflash was supplied but bios is none, let's overwrite the + * address we jump to after reset to the base of the flash. + */ + start_addr =3D virt_memmap[VIRT_FLASH].base; + } else { + /* + * Pflash was supplied but bios is not none. In this case, + * base of the flash would contain S-mode payload. + */ + riscv_setup_firmware_boot(machine); + kernel_entry =3D virt_memmap[VIRT_FLASH].base; + } + } + + if (machine->kernel_filename && !kernel_entry) { kernel_start_addr =3D riscv_calc_kernel_start_addr(&s->soc[0], firmware_end_addr= ); =20 kernel_entry =3D riscv_load_kernel(machine, &s->soc[0], kernel_start_addr, true, NULL); - } else { - /* - * If dynamic firmware is used, it doesn't know where is the next m= ode - * if kernel argument is not set. - */ - kernel_entry =3D 0; - } - - if (drive_get(IF_PFLASH, 0, 0)) { - /* - * Pflash was supplied, let's overwrite the address we jump to aft= er - * reset to the base of the flash. - */ - start_addr =3D virt_memmap[VIRT_FLASH].base; } =20 fdt_load_addr =3D riscv_compute_fdt_addr(memmap[VIRT_DRAM].base, --=20 2.34.1 From nobody Tue Apr 23 22:03:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::336; envelope-from=sunilvl@ventanamicro.com; helo=mail-ot1-x336.google.com X-Spam_score_int: -5 X-Spam_score: -0.6 X-Spam_bar: / X-Spam_report: (-0.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SORBS_WEB=1.5, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1685033390275100007 Content-Type: text/plain; charset="utf-8" Currently, pflash devices can be configured only via -pflash or if=3Dpflash options. This is the legacy way and the better way is to use -blockdev as in other architectures. libvirt also has moved to -blockdev method. To support -blockdev option, pflash devices need to be created in instance_init itself. So, update the code to move the virt_flash_create() to instance_init. Also, use standard interfaces to detect whether pflash0 is configured or not. Signed-off-by: Sunil V L Reported-by: Andrea Bolognani Tested-by: Andrea Bolognani --- hw/riscv/virt.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 1187a60d6e..48fcbdbf06 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1246,6 +1246,8 @@ static void virt_machine_done(Notifier *notifier, voi= d *data) const char *firmware_name =3D riscv_default_firmware_name(&s->soc[0]); uint32_t fdt_load_addr; uint64_t kernel_entry =3D 0; + BlockBackend *pflash_blk0; + MemoryRegion *flash_mem; =20 /* * Only direct boot kernel is currently supported for KVM VM, @@ -1265,21 +1267,22 @@ static void virt_machine_done(Notifier *notifier, v= oid *data) =20 firmware_end_addr =3D riscv_find_and_load_firmware(machine, firmware_n= ame, start_addr, NULL); - - if (drive_get(IF_PFLASH, 0, 0)) { + pflash_blk0 =3D pflash_cfi01_get_blk(s->flash[0]); + if (pflash_blk0) { + flash_mem =3D pflash_cfi01_get_memory(s->flash[0]); if (machine->firmware && !strcmp(machine->firmware, "none")) { /* * Pflash was supplied but bios is none, let's overwrite the * address we jump to after reset to the base of the flash. */ - start_addr =3D virt_memmap[VIRT_FLASH].base; + start_addr =3D flash_mem->addr; } else { /* * Pflash was supplied but bios is not none. In this case, * base of the flash would contain S-mode payload. */ riscv_setup_firmware_boot(machine); - kernel_entry =3D virt_memmap[VIRT_FLASH].base; + kernel_entry =3D flash_mem->addr; } } =20 @@ -1497,8 +1500,6 @@ static void virt_machine_init(MachineState *machine) sysbus_create_simple("goldfish_rtc", memmap[VIRT_RTC].base, qdev_get_gpio_in(DEVICE(mmio_irqchip), RTC_IRQ)); =20 - virt_flash_create(s); - for (i =3D 0; i < ARRAY_SIZE(s->flash); i++) { /* Map legacy -drive if=3Dpflash to machine properties */ pflash_cfi01_legacy_drive(s->flash[i], @@ -1525,6 +1526,8 @@ static void virt_machine_instance_init(Object *obj) { RISCVVirtState *s =3D RISCV_VIRT_MACHINE(obj); =20 + virt_flash_create(s); + s->oem_id =3D g_strndup(ACPI_BUILD_APPNAME6, 6); s->oem_table_id =3D g_strndup(ACPI_BUILD_APPNAME8, 8); s->acpi =3D ON_OFF_AUTO_AUTO; --=20 2.34.1 From nobody Tue Apr 23 22:03:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::336; envelope-from=sunilvl@ventanamicro.com; helo=mail-ot1-x336.google.com X-Spam_score_int: -5 X-Spam_score: -0.6 X-Spam_bar: / X-Spam_report: (-0.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SORBS_WEB=1.5, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_HELO_TEMPERROR=0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1685033387259100001 Content-Type: text/plain; charset="utf-8" pflash devices can be used in virt machine for different purposes like for ROM code or S-mode FW payload. Add a section in the documentation on how to use pflash devices for different purposes. Signed-off-by: Sunil V L Tested-by: Andrea Bolognani --- docs/system/riscv/virt.rst | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst index 4b16e41d7f..c3e0b7a9c3 100644 --- a/docs/system/riscv/virt.rst +++ b/docs/system/riscv/virt.rst @@ -53,6 +53,35 @@ with the default OpenSBI firmware image as the -bios. It= also supports the recommended RISC-V bootflow: U-Boot SPL (M-mode) loads OpenSBI fw_dyna= mic firmware and U-Boot proper (S-mode), using the standard -bios functionalit= y. =20 +Using flash devices +------------------- + +The first flash device (pflash0) can contain either ROM code +or S-mode payload firmware code. If the pflash0 contains the +ROM code, -bios should be set to none. If -bios is not set to +none, pflash0 is assumed to contain S-mode payload code. + +Firmware images used for pflash should be of size 32 MiB. + +To boot as ROM code: + +.. code-block:: bash + + $ qemu-system-riscv64 -bios none \ + -blockdev node-name=3Dpflash0,driver=3Dfile,filename=3D \ + -M virt,pflash0=3Dpflash0 \ + ... other args .... + +To boot as read-only S-mode payload: + +.. code-block:: bash + + $ qemu-system-riscv64 \ + -blockdev node-name=3Dpflash0,driver=3Dfile,read-only=3Don,filename= =3D \ + -blockdev node-name=3Dpflash1,driver=3Dfile,filename=3D \ + -M virt,pflash0=3Dpflash0,pflash1=3Dpflash1 \ + ... other args .... + Machine-specific options ------------------------ =20 --=20 2.34.1