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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=serg.oker@gmail.com; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1684955713952100001 Hello! Sorry for a quite a big patch, but most of the changes are the same type. Most of the patch is about a definition of new constants/structs and replac= ing magic numbers with those constants. Signed-off-by: Sergey Kambalin --- hw/misc/bcm2835_property.c | 314 +++++++++++++++++++++----- include/hw/arm/raspi_platform.h | 5 + include/hw/misc/raspberrypi-fw-defs.h | 169 ++++++++++++++ 3 files changed, 431 insertions(+), 57 deletions(-) create mode 100644 include/hw/misc/raspberrypi-fw-defs.h diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c index 251b3d865d..70a8ed0a8c 100644 --- a/hw/misc/bcm2835_property.c +++ b/hw/misc/bcm2835_property.c @@ -12,10 +12,56 @@ #include "migration/vmstate.h" #include "hw/irq.h" #include "hw/misc/bcm2835_mbox_defs.h" +#include "hw/misc/raspberrypi-fw-defs.h" #include "sysemu/dma.h" #include "qemu/log.h" #include "qemu/module.h" #include "trace.h" +#include "hw/arm/raspi_platform.h" + +#define RPI_EXP_GPIO_BASE 128 +#define VC4_GPIO_EXPANDER_COUNT 8 + +struct vc4_display_settings_t { + uint32_t display_num; + uint32_t width; + uint32_t height; + uint32_t depth; + uint16_t pitch; + uint32_t virtual_width; + uint32_t virtual_height; + uint16_t virtual_width_offset; + uint32_t virtual_height_offset; + unsigned long fb_bus_address; +} QEMU_PACKED; + +enum rpi_firmware_clk_id { + RPI_FIRMWARE_EMMC_CLK_ID =3D 1, + RPI_FIRMWARE_UART_CLK_ID, + RPI_FIRMWARE_ARM_CLK_ID, + RPI_FIRMWARE_CORE_CLK_ID, + RPI_FIRMWARE_V3D_CLK_ID, + RPI_FIRMWARE_H264_CLK_ID, + RPI_FIRMWARE_ISP_CLK_ID, + RPI_FIRMWARE_SDRAM_CLK_ID, + RPI_FIRMWARE_PIXEL_CLK_ID, + RPI_FIRMWARE_PWM_CLK_ID, + RPI_FIRMWARE_HEVC_CLK_ID, + RPI_FIRMWARE_EMMC2_CLK_ID, + RPI_FIRMWARE_M2MC_CLK_ID, + RPI_FIRMWARE_PIXEL_BVB_CLK_ID, + RPI_FIRMWARE_VEC_CLK_ID, + RPI_FIRMWARE_NUM_CLK_ID, +}; + +struct vc4_gpio_expander_t { + uint32_t direction; + uint32_t polarity; + uint32_t term_en; + uint32_t term_pull_up; + uint32_t state; +} vc4_gpio_expander[VC4_GPIO_EXPANDER_COUNT]; + =20 /* https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface= */ =20 @@ -28,6 +74,7 @@ static void bcm2835_property_mbox_push(BCM2835PropertySta= te *s, uint32_t value) uint32_t tmp; int n; uint32_t offset, length, color; + uint32_t gpio_num; =20 /* * Copy the current state of the framebuffer config; we will update @@ -51,48 +98,48 @@ static void bcm2835_property_mbox_push(BCM2835PropertyS= tate *s, uint32_t value) /* @(value + 8) : Request/response indicator */ resplen =3D 0; switch (tag) { - case 0x00000000: /* End tag */ + case RPI_FWREQ_PROPERTY_END: /* End tag */ break; - case 0x00000001: /* Get firmware revision */ + case RPI_FWREQ_GET_FIRMWARE_REVISION: /* Get firmware revision */ stl_le_phys(&s->dma_as, value + 12, 346337); resplen =3D 4; break; - case 0x00010001: /* Get board model */ + case RPI_FWREQ_GET_BOARD_MODEL: /* Get board model */ qemu_log_mask(LOG_UNIMP, "bcm2835_property: 0x%08x get board model NYI\n", tag); resplen =3D 4; break; - case 0x00010002: /* Get board revision */ + case RPI_FWREQ_GET_BOARD_REVISION: /* Get board revision */ stl_le_phys(&s->dma_as, value + 12, s->board_rev); resplen =3D 4; break; - case 0x00010003: /* Get board MAC address */ + case RPI_FWREQ_GET_BOARD_MAC_ADDRESS: /* Get board MAC address */ resplen =3D sizeof(s->macaddr.a); dma_memory_write(&s->dma_as, value + 12, s->macaddr.a, resplen, MEMTXATTRS_UNSPECIFIED); break; - case 0x00010004: /* Get board serial */ + case RPI_FWREQ_GET_BOARD_SERIAL: /* Get board serial */ qemu_log_mask(LOG_UNIMP, "bcm2835_property: 0x%08x get board serial NYI\n= ", tag); resplen =3D 8; break; - case 0x00010005: /* Get ARM memory */ + case RPI_FWREQ_GET_ARM_MEMORY: /* Get ARM memory */ /* base */ stl_le_phys(&s->dma_as, value + 12, 0); /* size */ stl_le_phys(&s->dma_as, value + 16, s->fbdev->vcram_base); resplen =3D 8; break; - case 0x00010006: /* Get VC memory */ + case RPI_FWREQ_GET_VC_MEMORY: /* Get VC memory */ /* base */ stl_le_phys(&s->dma_as, value + 12, s->fbdev->vcram_base); /* size */ stl_le_phys(&s->dma_as, value + 16, s->fbdev->vcram_size); resplen =3D 8; break; - case 0x00028001: /* Set power state */ + case RPI_FWREQ_SET_POWER_STATE: /* Set power state */ /* Assume that whatever device they asked for exists, * and we'll just claim we set it to the desired state */ @@ -102,39 +149,49 @@ static void bcm2835_property_mbox_push(BCM2835Propert= yState *s, uint32_t value) break; =20 /* Clocks */ - - case 0x00030001: /* Get clock state */ + case RPI_FWREQ_GET_CLOCK_STATE: /* Get clock state */ stl_le_phys(&s->dma_as, value + 16, 0x1); resplen =3D 8; break; =20 - case 0x00038001: /* Set clock state */ + case RPI_FWREQ_SET_CLOCK_STATE: /* Set clock state */ qemu_log_mask(LOG_UNIMP, "bcm2835_property: 0x%08x set clock state NYI\n", tag); resplen =3D 8; break; =20 - case 0x00030002: /* Get clock rate */ - case 0x00030004: /* Get max clock rate */ - case 0x00030007: /* Get min clock rate */ + case RPI_FWREQ_GET_CLOCK_RATE: /* Get clock rate */ + case RPI_FWREQ_GET_MAX_CLOCK_RATE: /* Get max clock rate */ + case RPI_FWREQ_GET_MIN_CLOCK_RATE: /* Get min clock rate */ switch (ldl_le_phys(&s->dma_as, value + 12)) { - case 1: /* EMMC */ - stl_le_phys(&s->dma_as, value + 16, 50000000); + case RPI_FIRMWARE_EMMC_CLK_ID: /* EMMC */ + stl_le_phys(&s->dma_as, value + 16, RPI_FIRMWARE_EMMC_CLK_= RATE); + break; + case RPI_FIRMWARE_UART_CLK_ID: /* UART */ + stl_le_phys(&s->dma_as, value + 16, RPI_FIRMWARE_UART_CLK_= RATE); break; - case 2: /* UART */ - stl_le_phys(&s->dma_as, value + 16, 3000000); + case RPI_FIRMWARE_CORE_CLK_ID: /* Core Clock */ + stl_le_phys(&s->dma_as, value + 16, RPI_FIRMWARE_CORE_CLK_= RATE); break; default: - stl_le_phys(&s->dma_as, value + 16, 700000000); + stl_le_phys(&s->dma_as, value + 16, + RPI_FIRMWARE_DEFAULT_CLK_RATE); break; } resplen =3D 8; break; =20 - case 0x00038002: /* Set clock rate */ - case 0x00038004: /* Set max clock rate */ - case 0x00038007: /* Set min clock rate */ + case RPI_FWREQ_GET_CLOCKS: /* Get clocks */ + /* TODO: add more clock IDs if needed */ + stl_le_phys(&s->dma_as, value + 12, 0); + stl_le_phys(&s->dma_as, value + 16, RPI_FIRMWARE_ARM_CLK_ID); + resplen =3D 8; + break; + + case RPI_FWREQ_SET_CLOCK_RATE: /* Set clock rate */ + case RPI_FWREQ_SET_MAX_CLOCK_RATE: /* Set max clock rate */ + case RPI_FWREQ_SET_MIN_CLOCK_RATE: /* Set min clock rate */ qemu_log_mask(LOG_UNIMP, "bcm2835_property: 0x%08x set clock rate NYI\n", tag); @@ -142,122 +199,126 @@ static void bcm2835_property_mbox_push(BCM2835Prope= rtyState *s, uint32_t value) break; =20 /* Temperature */ - - case 0x00030006: /* Get temperature */ + case RPI_FWREQ_GET_TEMPERATURE: /* Get temperature */ stl_le_phys(&s->dma_as, value + 16, 25000); resplen =3D 8; break; - - case 0x0003000A: /* Get max temperature */ + case RPI_FWREQ_GET_MAX_TEMPERATURE: /* Get max temperature */ stl_le_phys(&s->dma_as, value + 16, 99000); resplen =3D 8; break; =20 /* Frame buffer */ - - case 0x00040001: /* Allocate buffer */ + case RPI_FWREQ_FRAMEBUFFER_ALLOCATE: /* Allocate buffer */ stl_le_phys(&s->dma_as, value + 12, fbconfig.base); stl_le_phys(&s->dma_as, value + 16, bcm2835_fb_get_size(&fbconfig)); resplen =3D 8; break; - case 0x00048001: /* Release buffer */ + case RPI_FWREQ_FRAMEBUFFER_RELEASE: /* Release buffer */ resplen =3D 0; break; - case 0x00040002: /* Blank screen */ + case RPI_FWREQ_FRAMEBUFFER_BLANK: /* Blank screen */ resplen =3D 4; break; - case 0x00044003: /* Test physical display width/height */ - case 0x00044004: /* Test virtual display width/height */ + /* Test physical display width/height */ + case RPI_FWREQ_FRAMEBUFFER_TEST_PHYSICAL_WIDTH_HEIGHT: + /* Test virtual display width/height */ + case RPI_FWREQ_FRAMEBUFFER_TEST_VIRTUAL_WIDTH_HEIGHT: resplen =3D 8; break; - case 0x00048003: /* Set physical display width/height */ + /* Set physical display width/height */ + case RPI_FWREQ_FRAMEBUFFER_SET_PHYSICAL_WIDTH_HEIGHT: fbconfig.xres =3D ldl_le_phys(&s->dma_as, value + 12); fbconfig.yres =3D ldl_le_phys(&s->dma_as, value + 16); bcm2835_fb_validate_config(&fbconfig); fbconfig_updated =3D true; /* fall through */ - case 0x00040003: /* Get physical display width/height */ + /* Get physical display width/height */ + case RPI_FWREQ_FRAMEBUFFER_GET_PHYSICAL_WIDTH_HEIGHT: stl_le_phys(&s->dma_as, value + 12, fbconfig.xres); stl_le_phys(&s->dma_as, value + 16, fbconfig.yres); resplen =3D 8; break; - case 0x00048004: /* Set virtual display width/height */ + /* Set virtual display width/height */ + case RPI_FWREQ_FRAMEBUFFER_SET_VIRTUAL_WIDTH_HEIGHT: fbconfig.xres_virtual =3D ldl_le_phys(&s->dma_as, value + 12); fbconfig.yres_virtual =3D ldl_le_phys(&s->dma_as, value + 16); bcm2835_fb_validate_config(&fbconfig); fbconfig_updated =3D true; /* fall through */ - case 0x00040004: /* Get virtual display width/height */ + /* Get virtual display width/height */ + case RPI_FWREQ_FRAMEBUFFER_GET_VIRTUAL_WIDTH_HEIGHT: stl_le_phys(&s->dma_as, value + 12, fbconfig.xres_virtual); stl_le_phys(&s->dma_as, value + 16, fbconfig.yres_virtual); resplen =3D 8; break; - case 0x00044005: /* Test depth */ + case RPI_FWREQ_FRAMEBUFFER_TEST_DEPTH: /* Test depth */ resplen =3D 4; break; - case 0x00048005: /* Set depth */ + case RPI_FWREQ_FRAMEBUFFER_SET_DEPTH: /* Set depth */ fbconfig.bpp =3D ldl_le_phys(&s->dma_as, value + 12); bcm2835_fb_validate_config(&fbconfig); fbconfig_updated =3D true; /* fall through */ - case 0x00040005: /* Get depth */ + case RPI_FWREQ_FRAMEBUFFER_GET_DEPTH: /* Get depth */ stl_le_phys(&s->dma_as, value + 12, fbconfig.bpp); resplen =3D 4; break; - case 0x00044006: /* Test pixel order */ + case RPI_FWREQ_FRAMEBUFFER_TEST_PIXEL_ORDER: /* Test pixel order */ resplen =3D 4; break; - case 0x00048006: /* Set pixel order */ + case RPI_FWREQ_FRAMEBUFFER_SET_PIXEL_ORDER: /* Set pixel order */ fbconfig.pixo =3D ldl_le_phys(&s->dma_as, value + 12); bcm2835_fb_validate_config(&fbconfig); fbconfig_updated =3D true; /* fall through */ - case 0x00040006: /* Get pixel order */ + case RPI_FWREQ_FRAMEBUFFER_GET_PIXEL_ORDER: /* Get pixel order */ stl_le_phys(&s->dma_as, value + 12, fbconfig.pixo); resplen =3D 4; break; - case 0x00044007: /* Test pixel alpha */ + case RPI_FWREQ_FRAMEBUFFER_TEST_ALPHA_MODE: /* Test pixel alpha */ resplen =3D 4; break; - case 0x00048007: /* Set alpha */ + case RPI_FWREQ_FRAMEBUFFER_SET_ALPHA_MODE: /* Set alpha */ fbconfig.alpha =3D ldl_le_phys(&s->dma_as, value + 12); bcm2835_fb_validate_config(&fbconfig); fbconfig_updated =3D true; /* fall through */ - case 0x00040007: /* Get alpha */ + case RPI_FWREQ_FRAMEBUFFER_GET_ALPHA_MODE: /* Get alpha */ stl_le_phys(&s->dma_as, value + 12, fbconfig.alpha); resplen =3D 4; break; - case 0x00040008: /* Get pitch */ + case RPI_FWREQ_FRAMEBUFFER_GET_PITCH: /* Get pitch */ stl_le_phys(&s->dma_as, value + 12, bcm2835_fb_get_pitch(&fbconfig)); resplen =3D 4; break; - case 0x00044009: /* Test virtual offset */ + /* Test virtual offset */ + case RPI_FWREQ_FRAMEBUFFER_TEST_VIRTUAL_OFFSET: resplen =3D 8; break; - case 0x00048009: /* Set virtual offset */ + case RPI_FWREQ_FRAMEBUFFER_SET_VIRTUAL_OFFSET: /* Set virtual offs= et */ fbconfig.xoffset =3D ldl_le_phys(&s->dma_as, value + 12); fbconfig.yoffset =3D ldl_le_phys(&s->dma_as, value + 16); bcm2835_fb_validate_config(&fbconfig); fbconfig_updated =3D true; /* fall through */ - case 0x00040009: /* Get virtual offset */ + case RPI_FWREQ_FRAMEBUFFER_GET_VIRTUAL_OFFSET: /* Get virtual offs= et */ stl_le_phys(&s->dma_as, value + 12, fbconfig.xoffset); stl_le_phys(&s->dma_as, value + 16, fbconfig.yoffset); resplen =3D 8; break; - case 0x0004000a: /* Get/Test/Set overscan */ - case 0x0004400a: - case 0x0004800a: + case RPI_FWREQ_FRAMEBUFFER_GET_OVERSCAN: /* Get/Test/Set overscan = */ + case RPI_FWREQ_FRAMEBUFFER_TEST_OVERSCAN: + case RPI_FWREQ_FRAMEBUFFER_SET_OVERSCAN: stl_le_phys(&s->dma_as, value + 12, 0); stl_le_phys(&s->dma_as, value + 16, 0); stl_le_phys(&s->dma_as, value + 20, 0); stl_le_phys(&s->dma_as, value + 24, 0); resplen =3D 16; break; - case 0x0004800b: /* Set palette */ + case RPI_FWREQ_FRAMEBUFFER_SET_PALETTE: /* Set palette */ offset =3D ldl_le_phys(&s->dma_as, value + 12); length =3D ldl_le_phys(&s->dma_as, value + 16); n =3D 0; @@ -270,18 +331,19 @@ static void bcm2835_property_mbox_push(BCM2835Propert= yState *s, uint32_t value) stl_le_phys(&s->dma_as, value + 12, 0); resplen =3D 4; break; - case 0x00040013: /* Get number of displays */ + + case RPI_FWREQ_FRAMEBUFFER_GET_NUM_DISPLAYS: /* Get num of display= s */ stl_le_phys(&s->dma_as, value + 12, 1); resplen =3D 4; break; =20 - case 0x00060001: /* Get DMA channels */ + case RPI_FWREQ_GET_DMA_CHANNELS: /* Get DMA channels */ /* channels 2-5 */ stl_le_phys(&s->dma_as, value + 12, 0x003C); resplen =3D 4; break; =20 - case 0x00050001: /* Get command line */ + case RPI_FWREQ_GET_COMMAND_LINE: /* Get command line */ /* * We follow the firmware behaviour: no NUL terminator is * written to the buffer, and if the buffer is too short @@ -295,6 +357,144 @@ static void bcm2835_property_mbox_push(BCM2835Propert= yState *s, uint32_t value) resplen); break; =20 + case RPI_FWREQ_GET_THROTTLED: /* Get throttled */ + stl_le_phys(&s->dma_as, value + 12, 0); + resplen =3D 4; + break; + + /* Get display settings*/ + case RPI_FWREQ_FRAMEBUFFER_GET_DISPLAY_SETTINGS: + stl_le_phys(&s->dma_as, value + 12, 0); /* display_num */ + stl_le_phys(&s->dma_as, value + 16, 800); /* width */ + stl_le_phys(&s->dma_as, value + 20, 600); /* height */ + stl_le_phys(&s->dma_as, value + 24, 32); /* depth */ + stl_le_phys(&s->dma_as, value + 28, 32); /* pitch */ + stl_le_phys(&s->dma_as, value + 30, 0); /* virtual_width */ + stl_le_phys(&s->dma_as, value + 34, 0); /* virtual_height */ + stl_le_phys(&s->dma_as, value + 38, 0); /* virtual_width_offse= t */ + stl_le_phys(&s->dma_as, value + 40, 0); /* virtual_height_offs= et */ + stl_le_phys(&s->dma_as, value + 44, 0); /* fb_bus_address low = */ + stl_le_phys(&s->dma_as, value + 48, 0); /* fb_bus_address hi */ + resplen =3D sizeof(struct vc4_display_settings_t); + break; + + case RPI_FWREQ_FRAMEBUFFER_SET_PITCH: /* Set Pitch */ + resplen =3D 0; + break; + + case RPI_FWREQ_GET_GPIO_CONFIG: + if (ldl_le_phys(&s->dma_as, value + 12) < RPI_EXP_GPIO_BASE) { + qemu_log_mask(LOG_UNIMP, "RPI_FWREQ_GET_GPIO_CONFIG " + "not implemented for gpiochip0\n"); + } else { + gpio_num =3D ldl_le_phys(&s->dma_as, value + 12) + - RPI_EXP_GPIO_BASE; + + if (gpio_num < VC4_GPIO_EXPANDER_COUNT) { + stl_le_phys(&s->dma_as, value + 16, + vc4_gpio_expander[gpio_num].direction); + stl_le_phys(&s->dma_as, value + 20, + vc4_gpio_expander[gpio_num].polarity); + stl_le_phys(&s->dma_as, value + 24, + vc4_gpio_expander[gpio_num].term_en); + stl_le_phys(&s->dma_as, value + 28, + vc4_gpio_expander[gpio_num].term_pull_up); + /* must be equal 0 */ + stl_le_phys(&s->dma_as, value + 12, 0); + resplen =3D 4 * 5; + } else { + qemu_log_mask(LOG_GUEST_ERROR, + "RPI_FWREQ_GET_GPIO_CONFIG " + "gpio num must be < %d", + RPI_EXP_GPIO_BASE + VC4_GPIO_EXPANDER_CO= UNT); + } + } + break; + + case RPI_FWREQ_SET_GPIO_CONFIG: + if (ldl_le_phys(&s->dma_as, value + 12) < RPI_EXP_GPIO_BASE) { + qemu_log_mask(LOG_UNIMP, "RPI_FWREQ_SET_GPIO_CONFIG " + "not implemented for gpiochip0\n"); + } else { + gpio_num =3D ldl_le_phys(&s->dma_as, value + 12) + - RPI_EXP_GPIO_BASE; + + if (gpio_num < VC4_GPIO_EXPANDER_COUNT) { + vc4_gpio_expander[gpio_num].direction =3D + ldl_le_phys(&s->dma_as, value + 16); + vc4_gpio_expander[gpio_num].polarity =3D + ldl_le_phys(&s->dma_as, value + 20); + vc4_gpio_expander[gpio_num].term_en =3D + ldl_le_phys(&s->dma_as, value + 24); + vc4_gpio_expander[gpio_num].term_pull_up =3D + ldl_le_phys(&s->dma_as, value + 28); + vc4_gpio_expander[gpio_num].state =3D + ldl_le_phys(&s->dma_as, value + 32); + /* must be equal 0 */ + stl_le_phys(&s->dma_as, value + 12, 0); + resplen =3D 4; + } else { + qemu_log_mask(LOG_GUEST_ERROR, + "RPI_FWREQ_SET_GPIO_CONFIG " + "gpio num must be < %d", + RPI_EXP_GPIO_BASE + VC4_GPIO_EXPANDER_CO= UNT); + } + } + break; + + case RPI_FWREQ_GET_GPIO_STATE: + if (ldl_le_phys(&s->dma_as, value + 12) < RPI_EXP_GPIO_BASE) { + qemu_log_mask(LOG_UNIMP, "RPI_FWREQ_GET_GPIO_STATE " + "not implemented for gpiochip0\n"); + } else { + gpio_num =3D ldl_le_phys(&s->dma_as, value + 12) + - RPI_EXP_GPIO_BASE; + + if (gpio_num < VC4_GPIO_EXPANDER_COUNT) { + stl_le_phys(&s->dma_as, value + 16, + vc4_gpio_expander[gpio_num].state); + /* must be equal 0 */ + stl_le_phys(&s->dma_as, value + 12, 0); + resplen =3D 8; + } else { + qemu_log_mask(LOG_GUEST_ERROR, + "RPI_FWREQ_GET_GPIO_STATE " + "gpio num must be < %d", + RPI_EXP_GPIO_BASE + VC4_GPIO_EXPANDER_CO= UNT); + } + } + break; + + case RPI_FWREQ_SET_GPIO_STATE: + if (ldl_le_phys(&s->dma_as, value + 12) < RPI_EXP_GPIO_BASE) { + qemu_log_mask(LOG_UNIMP, "RPI_FWREQ_SET_GPIO_STATE not " + "implemented for gpiochip0\n"); + } else { + gpio_num =3D ldl_le_phys(&s->dma_as, value + 12) + - RPI_EXP_GPIO_BASE; + + if (gpio_num < VC4_GPIO_EXPANDER_COUNT) { + vc4_gpio_expander[gpio_num].state =3D ldl_le_phys(&s->= dma_as, + value = + 16); + /* must be equal 0 */ + stl_le_phys(&s->dma_as, value + 12, 0); + resplen =3D 4; + } else { + qemu_log_mask(LOG_GUEST_ERROR, + "RPI_FWREQ_SET_GPIO_STATE " + "gpio num must be < %d", + RPI_EXP_GPIO_BASE + VC4_GPIO_EXPANDER_CO= UNT); + } + } + break; + + case RPI_FWREQ_VCHIQ_INIT: + stl_le_phys(&s->dma_as, + value + offsetof(rpi_firmware_prop_request_t, payl= oad), + 0); + resplen =3D VCHI_BUSADDR_SIZE; + break; + default: qemu_log_mask(LOG_UNIMP, "bcm2835_property: unhandled tag 0x%08x\n", tag); diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platfor= m.h index 4a56dd4b89..9c34987c60 100644 --- a/include/hw/arm/raspi_platform.h +++ b/include/hw/arm/raspi_platform.h @@ -170,4 +170,9 @@ #define INTERRUPT_ILLEGAL_TYPE0 6 #define INTERRUPT_ILLEGAL_TYPE1 7 =20 +#define RPI_FIRMWARE_EMMC_CLK_RATE 50000000 +#define RPI_FIRMWARE_UART_CLK_RATE 3000000 +#define RPI_FIRMWARE_CORE_CLK_RATE 350000000 +#define RPI_FIRMWARE_DEFAULT_CLK_RATE 700000000 + #endif diff --git a/include/hw/misc/raspberrypi-fw-defs.h b/include/hw/misc/raspbe= rrypi-fw-defs.h new file mode 100644 index 0000000000..2688e88522 --- /dev/null +++ b/include/hw/misc/raspberrypi-fw-defs.h @@ -0,0 +1,169 @@ +/* + * Raspberry Pi firmware definitions + * + * Copyright (C) 2022 Auriga LLC, based on Linux kernel + * `include/soc/bcm2835/raspberrypi-firmware.h` (Copyright =C2=A9 2015 B= roadcom) + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef INCLUDE_HW_MISC_RASPBERRYPI_FW_DEFS_H_ +#define INCLUDE_HW_MISC_RASPBERRYPI_FW_DEFS_H_ + +#include "qemu/osdep.h" + +enum rpi_firmware_property_tag { + RPI_FWREQ_PROPERTY_END =3D 0, + RPI_FWREQ_GET_FIRMWARE_REVISION =3D 0x00000001, + RPI_FWREQ_GET_FIRMWARE_VARIANT =3D 0x00000002, + RPI_FWREQ_GET_FIRMWARE_HASH =3D 0x00000003, + + RPI_FWREQ_SET_CURSOR_INFO =3D 0x00008010, + RPI_FWREQ_SET_CURSOR_STATE =3D 0x00008011, + + RPI_FWREQ_GET_BOARD_MODEL =3D 0x00010001, + RPI_FWREQ_GET_BOARD_REVISION =3D 0x00010002, + RPI_FWREQ_GET_BOARD_MAC_ADDRESS =3D 0x00010003, + RPI_FWREQ_GET_BOARD_SERIAL =3D 0x00010004, + RPI_FWREQ_GET_ARM_MEMORY =3D 0x00010005, + RPI_FWREQ_GET_VC_MEMORY =3D 0x00010006, + RPI_FWREQ_GET_CLOCKS =3D 0x00010007, + RPI_FWREQ_GET_POWER_STATE =3D 0x00020001, + RPI_FWREQ_GET_TIMING =3D 0x00020002, + RPI_FWREQ_SET_POWER_STATE =3D 0x00028001, + RPI_FWREQ_GET_CLOCK_STATE =3D 0x00030001, + RPI_FWREQ_GET_CLOCK_RATE =3D 0x00030002, + RPI_FWREQ_GET_VOLTAGE =3D 0x00030003, + RPI_FWREQ_GET_MAX_CLOCK_RATE =3D 0x00030004, + RPI_FWREQ_GET_MAX_VOLTAGE =3D 0x00030005, + RPI_FWREQ_GET_TEMPERATURE =3D 0x00030006, + RPI_FWREQ_GET_MIN_CLOCK_RATE =3D 0x00030007, + RPI_FWREQ_GET_MIN_VOLTAGE =3D 0x00030008, + RPI_FWREQ_GET_TURBO =3D 0x00030009, + RPI_FWREQ_GET_MAX_TEMPERATURE =3D 0x0003000a, + RPI_FWREQ_GET_STC =3D 0x0003000b, + RPI_FWREQ_ALLOCATE_MEMORY =3D 0x0003000c, + RPI_FWREQ_LOCK_MEMORY =3D 0x0003000d, + RPI_FWREQ_UNLOCK_MEMORY =3D 0x0003000e, + RPI_FWREQ_RELEASE_MEMORY =3D 0x0003000f, + RPI_FWREQ_EXECUTE_CODE =3D 0x00030010, + RPI_FWREQ_EXECUTE_QPU =3D 0x00030011, + RPI_FWREQ_SET_ENABLE_QPU =3D 0x00030012, + RPI_FWREQ_GET_DISPMANX_RESOURCE_MEM_HANDLE =3D 0x00030014, + RPI_FWREQ_GET_EDID_BLOCK =3D 0x00030020, + RPI_FWREQ_GET_CUSTOMER_OTP =3D 0x00030021, + RPI_FWREQ_GET_EDID_BLOCK_DISPLAY =3D 0x00030023, + RPI_FWREQ_GET_DOMAIN_STATE =3D 0x00030030, + RPI_FWREQ_GET_THROTTLED =3D 0x00030046, + RPI_FWREQ_GET_CLOCK_MEASURED =3D 0x00030047, + RPI_FWREQ_NOTIFY_REBOOT =3D 0x00030048, + RPI_FWREQ_SET_CLOCK_STATE =3D 0x00038001, + RPI_FWREQ_SET_CLOCK_RATE =3D 0x00038002, + RPI_FWREQ_SET_VOLTAGE =3D 0x00038003, + RPI_FWREQ_SET_MAX_CLOCK_RATE =3D 0x00038004, + RPI_FWREQ_SET_MIN_CLOCK_RATE =3D 0x00038007, + RPI_FWREQ_SET_TURBO =3D 0x00038009, + RPI_FWREQ_SET_CUSTOMER_OTP =3D 0x00038021, + RPI_FWREQ_SET_DOMAIN_STATE =3D 0x00038030, + RPI_FWREQ_GET_GPIO_STATE =3D 0x00030041, + RPI_FWREQ_SET_GPIO_STATE =3D 0x00038041, + RPI_FWREQ_SET_SDHOST_CLOCK =3D 0x00038042, + RPI_FWREQ_GET_GPIO_CONFIG =3D 0x00030043, + RPI_FWREQ_SET_GPIO_CONFIG =3D 0x00038043, + RPI_FWREQ_GET_PERIPH_REG =3D 0x00030045, + RPI_FWREQ_SET_PERIPH_REG =3D 0x00038045, + RPI_FWREQ_GET_POE_HAT_VAL =3D 0x00030049, + RPI_FWREQ_SET_POE_HAT_VAL =3D 0x00038049, + RPI_FWREQ_SET_POE_HAT_VAL_OLD =3D 0x00030050, + RPI_FWREQ_NOTIFY_XHCI_RESET =3D 0x00030058, + RPI_FWREQ_GET_REBOOT_FLAGS =3D 0x00030064, + RPI_FWREQ_SET_REBOOT_FLAGS =3D 0x00038064, + RPI_FWREQ_NOTIFY_DISPLAY_DONE =3D 0x00030066, + + /* Dispmanx TAGS */ + RPI_FWREQ_FRAMEBUFFER_ALLOCATE =3D 0x00040001, + RPI_FWREQ_FRAMEBUFFER_BLANK =3D 0x00040002, + RPI_FWREQ_FRAMEBUFFER_GET_PHYSICAL_WIDTH_HEIGHT =3D 0x00040003, + RPI_FWREQ_FRAMEBUFFER_GET_VIRTUAL_WIDTH_HEIGHT =3D 0x00040004, + RPI_FWREQ_FRAMEBUFFER_GET_DEPTH =3D 0x00040005, + RPI_FWREQ_FRAMEBUFFER_GET_PIXEL_ORDER =3D 0x00040006, + RPI_FWREQ_FRAMEBUFFER_GET_ALPHA_MODE =3D 0x00040007, + RPI_FWREQ_FRAMEBUFFER_GET_PITCH =3D 0x00040008, + RPI_FWREQ_FRAMEBUFFER_GET_VIRTUAL_OFFSET =3D 0x00040009, + RPI_FWREQ_FRAMEBUFFER_GET_OVERSCAN =3D 0x0004000a, + RPI_FWREQ_FRAMEBUFFER_GET_PALETTE =3D 0x0004000b, + RPI_FWREQ_FRAMEBUFFER_GET_LAYER =3D 0x0004000c, + RPI_FWREQ_FRAMEBUFFER_GET_TRANSFORM =3D 0x0004000d, + RPI_FWREQ_FRAMEBUFFER_GET_VSYNC =3D 0x0004000e, + RPI_FWREQ_FRAMEBUFFER_GET_TOUCHBUF =3D 0x0004000f, + RPI_FWREQ_FRAMEBUFFER_GET_GPIOVIRTBUF =3D 0x00040010, + RPI_FWREQ_FRAMEBUFFER_RELEASE =3D 0x00048001, + RPI_FWREQ_FRAMEBUFFER_GET_DISPLAY_ID =3D 0x00040016, + RPI_FWREQ_FRAMEBUFFER_SET_DISPLAY_NUM =3D 0x00048013, + RPI_FWREQ_FRAMEBUFFER_GET_NUM_DISPLAYS =3D 0x00040013, + RPI_FWREQ_FRAMEBUFFER_GET_DISPLAY_SETTINGS =3D 0x00040014, + RPI_FWREQ_FRAMEBUFFER_TEST_PHYSICAL_WIDTH_HEIGHT =3D 0x00044003, + RPI_FWREQ_FRAMEBUFFER_TEST_VIRTUAL_WIDTH_HEIGHT =3D 0x00044004, + RPI_FWREQ_FRAMEBUFFER_TEST_DEPTH =3D 0x00044005, + RPI_FWREQ_FRAMEBUFFER_TEST_PIXEL_ORDER =3D 0x00044006, + RPI_FWREQ_FRAMEBUFFER_TEST_ALPHA_MODE =3D 0x00044007, + RPI_FWREQ_FRAMEBUFFER_TEST_VIRTUAL_OFFSET =3D 0x00044009, + RPI_FWREQ_FRAMEBUFFER_TEST_OVERSCAN =3D 0x0004400a, + RPI_FWREQ_FRAMEBUFFER_TEST_PALETTE =3D 0x0004400b, + RPI_FWREQ_FRAMEBUFFER_TEST_LAYER =3D 0x0004400c, + RPI_FWREQ_FRAMEBUFFER_TEST_TRANSFORM =3D 0x0004400d, + RPI_FWREQ_FRAMEBUFFER_TEST_VSYNC =3D 0x0004400e, + RPI_FWREQ_FRAMEBUFFER_SET_PHYSICAL_WIDTH_HEIGHT =3D 0x00048003, + RPI_FWREQ_FRAMEBUFFER_SET_VIRTUAL_WIDTH_HEIGHT =3D 0x00048004, + RPI_FWREQ_FRAMEBUFFER_SET_DEPTH =3D 0x00048005, + RPI_FWREQ_FRAMEBUFFER_SET_PIXEL_ORDER =3D 0x00048006, + RPI_FWREQ_FRAMEBUFFER_SET_ALPHA_MODE =3D 0x00048007, + RPI_FWREQ_FRAMEBUFFER_SET_PITCH =3D 0x00048008, + RPI_FWREQ_FRAMEBUFFER_SET_VIRTUAL_OFFSET =3D 0x00048009, + RPI_FWREQ_FRAMEBUFFER_SET_OVERSCAN =3D 0x0004800a, + RPI_FWREQ_FRAMEBUFFER_SET_PALETTE =3D 0x0004800b, + + RPI_FWREQ_FRAMEBUFFER_SET_TOUCHBUF =3D 0x0004801f, + RPI_FWREQ_FRAMEBUFFER_SET_GPIOVIRTBUF =3D 0x00048020, + RPI_FWREQ_FRAMEBUFFER_SET_VSYNC =3D 0x0004800e, + RPI_FWREQ_FRAMEBUFFER_SET_LAYER =3D 0x0004800c, + RPI_FWREQ_FRAMEBUFFER_SET_TRANSFORM =3D 0x0004800d, + RPI_FWREQ_FRAMEBUFFER_SET_BACKLIGHT =3D 0x0004800f, + + RPI_FWREQ_VCHIQ_INIT =3D 0x00048010, + + RPI_FWREQ_SET_PLANE =3D 0x00048015, + RPI_FWREQ_GET_DISPLAY_TIMING =3D 0x00040017, + RPI_FWREQ_SET_TIMING =3D 0x00048017, + RPI_FWREQ_GET_DISPLAY_CFG =3D 0x00040018, + RPI_FWREQ_SET_DISPLAY_POWER =3D 0x00048019, + RPI_FWREQ_GET_COMMAND_LINE =3D 0x00050001, + RPI_FWREQ_GET_DMA_CHANNELS =3D 0x00060001, +}; + + +/** + * struct rpi_firmware_property_tag_header - Firmware property tag header + * @tag: One of enum_mbox_property_tag. + * @buf_size: The number of bytes in the value buffer following this + * struct. + * @req_resp_size: On submit, the length of the request (though it doesn't + * appear to be currently used by the firmware). On return, + * the length of the response (always 4 byte aligned), with + * the low bit set. + */ +struct rpi_firmware_property_tag_header { + uint32_t tag; + uint32_t buf_size; + uint32_t req_resp_size; +}; + +typedef struct rpi_firmware_prop_request { + struct rpi_firmware_property_tag_header hdr; + uint8_t payload[0]; +} rpi_firmware_prop_request_t; + + +#define VCHI_BUSADDR_SIZE sizeof(uint32_t) + +#endif /* INCLUDE_HW_MISC_RASPBERRYPI_FW_DEFS_H_ */ --=20 2.34.1