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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=tsimpson@qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @quicinc.com) X-ZM-MESSAGEID: 1684440619416100007 Add DisasContext arg to gen_log_reg_write_pair also Signed-off-by: Taylor Simpson Reviewed-by: Richard Henderson Message-Id: <20230427230012.3800327-3-tsimpson@quicinc.com> --- target/hexagon/gen_tcg.h | 2 +- target/hexagon/genptr.h | 2 +- target/hexagon/genptr.c | 10 +++++----- target/hexagon/idef-parser/parser-helpers.c | 2 +- target/hexagon/README | 2 +- target/hexagon/gen_tcg_funcs.py | 8 +++++--- 6 files changed, 14 insertions(+), 12 deletions(-) diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h index 6f12f665db..d4bd38810e 100644 --- a/target/hexagon/gen_tcg.h +++ b/target/hexagon/gen_tcg.h @@ -515,7 +515,7 @@ do { \ TCGv_i64 RddV =3D get_result_gpr_pair(ctx, HEX_REG_FP); \ gen_return(ctx, RddV, hex_gpr[HEX_REG_FP]); \ - gen_log_reg_write_pair(HEX_REG_FP, RddV); \ + gen_log_reg_write_pair(ctx, HEX_REG_FP, RddV); \ } while (0) =20 /* diff --git a/target/hexagon/genptr.h b/target/hexagon/genptr.h index 76e497aa48..75d0fc262d 100644 --- a/target/hexagon/genptr.h +++ b/target/hexagon/genptr.h @@ -35,7 +35,7 @@ void gen_store4i(TCGv_env cpu_env, TCGv vaddr, int32_t sr= c, uint32_t slot); void gen_store8i(TCGv_env cpu_env, TCGv vaddr, int64_t src, uint32_t slot); TCGv gen_read_reg(TCGv result, int num); TCGv gen_read_preg(TCGv pred, uint8_t num); -void gen_log_reg_write(int rnum, TCGv val); +void gen_log_reg_write(DisasContext *ctx, int rnum, TCGv val); void gen_log_pred_write(DisasContext *ctx, int pnum, TCGv val); void gen_set_usr_field(DisasContext *ctx, int field, TCGv val); void gen_set_usr_fieldi(DisasContext *ctx, int field, int x); diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c index 244063b1d2..dd707a9dc7 100644 --- a/target/hexagon/genptr.c +++ b/target/hexagon/genptr.c @@ -81,7 +81,7 @@ static TCGv_i64 get_result_gpr_pair(DisasContext *ctx, in= t rnum) return result; } =20 -void gen_log_reg_write(int rnum, TCGv val) +void gen_log_reg_write(DisasContext *ctx, int rnum, TCGv val) { const target_ulong reg_mask =3D reg_immut_masks[rnum]; =20 @@ -93,7 +93,7 @@ void gen_log_reg_write(int rnum, TCGv val) } } =20 -static void gen_log_reg_write_pair(int rnum, TCGv_i64 val) +static void gen_log_reg_write_pair(DisasContext *ctx, int rnum, TCGv_i64 v= al) { const target_ulong reg_mask_low =3D reg_immut_masks[rnum]; const target_ulong reg_mask_high =3D reg_immut_masks[rnum + 1]; @@ -231,7 +231,7 @@ static inline void gen_write_ctrl_reg(DisasContext *ctx= , int reg_num, if (reg_num =3D=3D HEX_REG_P3_0_ALIASED) { gen_write_p3_0(ctx, val); } else { - gen_log_reg_write(reg_num, val); + gen_log_reg_write(ctx, reg_num, val); if (reg_num =3D=3D HEX_REG_QEMU_PKT_CNT) { ctx->num_packets =3D 0; } @@ -255,7 +255,7 @@ static inline void gen_write_ctrl_reg_pair(DisasContext= *ctx, int reg_num, tcg_gen_extrh_i64_i32(val32, val); tcg_gen_mov_tl(result, val32); } else { - gen_log_reg_write_pair(reg_num, val); + gen_log_reg_write_pair(ctx, reg_num, val); if (reg_num =3D=3D HEX_REG_QEMU_PKT_CNT) { ctx->num_packets =3D 0; ctx->num_insns =3D 0; @@ -719,7 +719,7 @@ static void gen_cond_return_subinsn(DisasContext *ctx, = TCGCond cond, TCGv pred) { TCGv_i64 RddV =3D get_result_gpr_pair(ctx, HEX_REG_FP); gen_cond_return(ctx, RddV, hex_gpr[HEX_REG_FP], pred, cond); - gen_log_reg_write_pair(HEX_REG_FP, RddV); + gen_log_reg_write_pair(ctx, HEX_REG_FP, RddV); } =20 static void gen_endloop0(DisasContext *ctx) diff --git a/target/hexagon/idef-parser/parser-helpers.c b/target/hexagon/i= def-parser/parser-helpers.c index 8734218e51..09161e394d 100644 --- a/target/hexagon/idef-parser/parser-helpers.c +++ b/target/hexagon/idef-parser/parser-helpers.c @@ -1318,7 +1318,7 @@ void gen_write_reg(Context *c, YYLTYPE *locp, HexValu= e *reg, HexValue *value) value_m =3D rvalue_materialize(c, locp, &value_m); OUT(c, locp, - "gen_log_reg_write(", ®->reg.id, ", ", + "gen_log_reg_write(ctx, ", ®->reg.id, ", ", &value_m, ");\n"); } =20 diff --git a/target/hexagon/README b/target/hexagon/README index 0f48da9328..f86850ba73 100644 --- a/target/hexagon/README +++ b/target/hexagon/README @@ -87,7 +87,7 @@ tcg_funcs_generated.c.inc TCGv RsV =3D hex_gpr[insn->regno[1]]; TCGv RtV =3D hex_gpr[insn->regno[2]]; gen_helper_A2_add(RdV, cpu_env, RsV, RtV); - gen_log_reg_write(RdN, RdV); + gen_log_reg_write(ctx, RdN, RdV); } =20 helper_funcs_generated.c.inc diff --git a/target/hexagon/gen_tcg_funcs.py b/target/hexagon/gen_tcg_funcs= .py index fcb3384480..d9ccbe63f6 100755 --- a/target/hexagon/gen_tcg_funcs.py +++ b/target/hexagon/gen_tcg_funcs.py @@ -387,7 +387,8 @@ def gen_helper_call_imm(f, immlett): =20 =20 def genptr_dst_write_pair(f, tag, regtype, regid): - f.write(f" gen_log_reg_write_pair({regtype}{regid}N, " f"{regtype}{= regid}V);\n") + f.write(f" gen_log_reg_write_pair(ctx, {regtype}{regid}N, " + f"{regtype}{regid}V);\n") =20 =20 def genptr_dst_write(f, tag, regtype, regid): @@ -396,7 +397,8 @@ def genptr_dst_write(f, tag, regtype, regid): genptr_dst_write_pair(f, tag, regtype, regid) elif regid in {"d", "e", "x", "y"}: f.write( - f" gen_log_reg_write({regtype}{regid}N, " f"{regtype}{r= egid}V);\n" + f" gen_log_reg_write(ctx, {regtype}{regid}N, " + f"{regtype}{regid}V);\n" ) else: print("Bad register parse: ", regtype, regid) @@ -481,7 +483,7 @@ def genptr_dst_write_opn(f, regtype, regid, tag): ## TCGv RsV =3D hex_gpr[insn->regno[1]]; ## TCGv RtV =3D hex_gpr[insn->regno[2]]; ## -## gen_log_reg_write(RdN, RdV); +## gen_log_reg_write(ctx, RdN, RdV); ## } ## ## where depends on hex_common.skip_qemu_helper(tag) --=20 2.25.1