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([2602:ae:1598:4c01:ec81:440e:33a4:40b9]) by smtp.gmail.com with ESMTPSA id z21-20020aa791d5000000b006260526cf0csm13771165pfa.116.2023.05.16.12.42.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 May 2023 12:42:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1684266140; x=1686858140; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ribAH55dCyxFTDrwMfk5QxSVbH9673DY11IGNIerYiI=; b=abX5yocFee4UDT2vYAewOC+0jxhncuaSSM5uf7sz4gkaJAbCDTvfb2IQTT94PukY4S mUsN1dHdw6rAntXCpal8Ya9pCfzgFx73OTb2IUiuIxkb4U4LuNBvptBeosNdZuDIAsNF 5eQZMElB0gzhQmVKvzTPPxcB4u3k43daj7WxaU1hk0h81J6tGSA7Dcc9Ax6jClpn4EpI SV8sGTbJvbp3n87tYfQbyUZPx2IvdjnmzK0KqhtYjX0Rg2DXc+EU989Y4fJPiZu497rs v+4iEQOhqaXTKNMt31pXrkeQNPhVNdROsLulMuEkqAX9kLaO1qZ+C5vu5sWDdUps8FKh JAow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684266140; x=1686858140; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ribAH55dCyxFTDrwMfk5QxSVbH9673DY11IGNIerYiI=; b=LyuDY3RS11VO4aAKrkLqBuhfv/LIxmaWXSv7+iUTTthBeXb4VBPjRqDATTmqNsEAUI iE1Kdhv3ZCZkv4OSXHpC5NH9XOFktBf31wmDep3DW6z2Fep73v8/ekSmc9PS+1mDcna5 X8R+e1VVkn+Z8mBHUv8eAXzLpgK9lYKDHRvgWyqM4ZLPkb/y/3edgjdpzP7slkUr7LFR 1UJL84MX7HPFcpTkdGZ+P49jVJfM4Xw6v58p+w4+kAPiE+gijaz6x6CLSVHdl+xaT6sQ ncsdjwabZT5sGkOM5h5v3U8szj3lMO/Ez2XpHSBSnVLiH3PWSwpNlVQ5c876+cKnZGUs lmog== X-Gm-Message-State: AC+VfDxJwX/vClJkVzWlyjTRrn73t9VD8xDCzKh0oPuVIKJFGEW68YMN kAEeERNrUk0EUe2/nR5OTe8xQ2DbGQzQwQ8o4dw= X-Google-Smtp-Source: ACHHUZ4HkO7Y8XhRvtcg03nDkdqZPjExsDHtC0fk5jQFTMtk3q8crTdmiesUfIY7JkUXxRkM4U49xg== X-Received: by 2002:a05:6a20:1448:b0:105:55a7:d5ff with SMTP id a8-20020a056a20144800b0010555a7d5ffmr14185514pzi.28.1684266140276; Tue, 16 May 2023 12:42:20 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Peter Maydell Subject: [PULL 37/80] tcg: Introduce atom_and_align_for_opc Date: Tue, 16 May 2023 12:41:02 -0700 Message-Id: <20230516194145.1749305-38-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230516194145.1749305-1-richard.henderson@linaro.org> References: <20230516194145.1749305-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::530; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1684266893248100005 Content-Type: text/plain; charset="utf-8" Examine MemOp for atomicity and alignment, adjusting alignment as required to implement atomicity on the host. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/tcg.c | 95 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/tcg/tcg.c b/tcg/tcg.c index 582fd1b36d..878e780cfa 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -220,6 +220,15 @@ static void * const qemu_st_helpers[MO_SIZE + 1] __att= ribute__((unused)) =3D { #endif }; =20 +typedef struct { + MemOp atom; /* lg2 bits of atomicity required */ + MemOp align; /* lg2 bits of alignment to use */ +} TCGAtomAlign; + +static TCGAtomAlign atom_and_align_for_opc(TCGContext *s, MemOp opc, + MemOp host_atom, bool allow_two= _ops) + __attribute__((unused)); + TCGContext tcg_init_ctx; __thread TCGContext *tcg_ctx; =20 @@ -5228,6 +5237,92 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp = *op) } } =20 +/** + * atom_and_align_for_opc: + * @s: tcg context + * @opc: memory operation code + * @host_atom: MO_ATOM_{IFALIGN,WITHIN16,SUBALIGN} for host operations + * @allow_two_ops: true if we are prepared to issue two operations + * + * Return the alignment and atomicity to use for the inline fast path + * for the given memory operation. The alignment may be larger than + * that specified in @opc, and the correct alignment will be diagnosed + * by the slow path helper. + * + * If @allow_two_ops, the host is prepared to test for 2x alignment, + * and issue two loads or stores for subalignment. + */ +static TCGAtomAlign atom_and_align_for_opc(TCGContext *s, MemOp opc, + MemOp host_atom, bool allow_two= _ops) +{ + MemOp align =3D get_alignment_bits(opc); + MemOp size =3D opc & MO_SIZE; + MemOp half =3D size ? size - 1 : 0; + MemOp atmax; + MemOp atom; + + /* When serialized, no further atomicity required. */ + if (s->gen_tb->cflags & CF_PARALLEL) { + atom =3D opc & MO_ATOM_MASK; + } else { + atom =3D MO_ATOM_NONE; + } + + switch (atom) { + case MO_ATOM_NONE: + /* The operation requires no specific atomicity. */ + atmax =3D MO_8; + break; + + case MO_ATOM_IFALIGN: + atmax =3D size; + break; + + case MO_ATOM_IFALIGN_PAIR: + atmax =3D half; + break; + + case MO_ATOM_WITHIN16: + atmax =3D size; + if (size =3D=3D MO_128) { + /* Misalignment implies !within16, and therefore no atomicity.= */ + } else if (host_atom !=3D MO_ATOM_WITHIN16) { + /* The host does not implement within16, so require alignment.= */ + align =3D MAX(align, size); + } + break; + + case MO_ATOM_WITHIN16_PAIR: + atmax =3D size; + /* + * Misalignment implies !within16, and therefore half atomicity. + * Any host prepared for two operations can implement this with + * half alignment. + */ + if (host_atom !=3D MO_ATOM_WITHIN16 && allow_two_ops) { + align =3D MAX(align, half); + } + break; + + case MO_ATOM_SUBALIGN: + atmax =3D size; + if (host_atom !=3D MO_ATOM_SUBALIGN) { + /* If unaligned but not odd, there are subobjects up to half. = */ + if (allow_two_ops) { + align =3D MAX(align, half); + } else { + align =3D MAX(align, size); + } + } + break; + + default: + g_assert_not_reached(); + } + + return (TCGAtomAlign){ .atom =3D atmax, .align =3D align }; +} + /* * Similarly for qemu_ld/st slow path helpers. * We must re-implement tcg_gen_callN and tcg_reg_alloc_call simultaneousl= y, --=20 2.34.1