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bh=nb4qfQobMu8tycA5mZhp3qIIojYb2TvITMampjx8tr0=; b=hbQwF8VyNudSn7WMxhH1NzaSowCr5MYTahJ6n0M8HHof+n/rgcqytTRVWyTlY6f9Bb41Kb J3q5gxUXacvf15+U7TAZZHpEu1bF5VJP0C52REuJ/wNlcLdeWZksa+swvS0vCbnMV7AQM/ bUER7gfeVc07b2n+IZIPEUsCdpHEOb8= X-MC-Unique: eTxCykL-NHyAjQ0KeYBwvg-1 From: Thomas Huth To: qemu-devel@nongnu.org, Richard Henderson Cc: Ilya Leoshkevich , Nina Schoetterl-Glausch Subject: [PULL 20/21] target/s390x: Fix EXECUTE of relative branches Date: Mon, 15 May 2023 15:02:32 +0200 Message-Id: <20230515130233.418183-21-thuth@redhat.com> In-Reply-To: <20230515130233.418183-1-thuth@redhat.com> References: <20230515130233.418183-1-thuth@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.1 on 10.11.54.2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1684156804336100001 Content-Type: text/plain; charset="utf-8" From: Ilya Leoshkevich Fix a problem similar to the one fixed by commit 703d03a4aaf3 ("target/s390x: Fix EXECUTE of relative long instructions"), but now for relative branches. Reported-by: Nina Schoetterl-Glausch Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson Message-Id: <20230426235813.198183-2-iii@linux.ibm.com> Signed-off-by: Thomas Huth --- target/s390x/tcg/translate.c | 81 ++++++++++++++++++++++++++---------- 1 file changed, 58 insertions(+), 23 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index a05205beb1..d6670e6a87 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -1534,18 +1534,51 @@ static DisasJumpType op_bal(DisasContext *s, DisasO= ps *o) } } =20 +/* + * Disassemble the target of a branch. The results are returned in a form + * suitable for passing into help_branch(): + * + * - bool IS_IMM reflects whether the target is fixed or computed. Non-EXE= CUTEd + * branches, whose DisasContext *S contains the relative immediate field= RI, + * are considered fixed. All the other branches are considered computed. + * - int IMM is the value of RI. + * - TCGv_i64 CDEST is the address of the computed target. + */ +#define disas_jdest(s, ri, is_imm, imm, cdest) do { = \ + if (have_field(s, ri)) { = \ + if (unlikely(s->ex_value)) { = \ + cdest =3D tcg_temp_new_i64(); = \ + tcg_gen_ld_i64(cdest, cpu_env, offsetof(CPUS390XState, ex_targ= et));\ + tcg_gen_addi_i64(cdest, cdest, (int64_t)get_field(s, ri) * 2);= \ + is_imm =3D false; = \ + } else { = \ + is_imm =3D true; = \ + } = \ + } else { = \ + is_imm =3D false; = \ + } = \ + imm =3D is_imm ? get_field(s, ri) : 0; = \ +} while (false) + static DisasJumpType op_basi(DisasContext *s, DisasOps *o) { + DisasCompare c; + bool is_imm; + int imm; + pc_to_link_info(o->out, s, s->pc_tmp); - return help_goto_direct(s, s->base.pc_next + (int64_t)get_field(s, i2)= * 2); + + disas_jdest(s, i2, is_imm, imm, o->in2); + disas_jcc(s, &c, 0xf); + return help_branch(s, &c, is_imm, imm, o->in2); } =20 static DisasJumpType op_bc(DisasContext *s, DisasOps *o) { int m1 =3D get_field(s, m1); - bool is_imm =3D have_field(s, i2); - int imm =3D is_imm ? get_field(s, i2) : 0; DisasCompare c; + bool is_imm; + int imm; =20 /* BCR with R2 =3D 0 causes no branching */ if (have_field(s, r2) && get_field(s, r2) =3D=3D 0) { @@ -1562,6 +1595,7 @@ static DisasJumpType op_bc(DisasContext *s, DisasOps = *o) return DISAS_NEXT; } =20 + disas_jdest(s, i2, is_imm, imm, o->in2); disas_jcc(s, &c, m1); return help_branch(s, &c, is_imm, imm, o->in2); } @@ -1569,10 +1603,10 @@ static DisasJumpType op_bc(DisasContext *s, DisasOp= s *o) static DisasJumpType op_bct32(DisasContext *s, DisasOps *o) { int r1 =3D get_field(s, r1); - bool is_imm =3D have_field(s, i2); - int imm =3D is_imm ? get_field(s, i2) : 0; DisasCompare c; + bool is_imm; TCGv_i64 t; + int imm; =20 c.cond =3D TCG_COND_NE; c.is_64 =3D false; @@ -1584,6 +1618,7 @@ static DisasJumpType op_bct32(DisasContext *s, DisasO= ps *o) c.u.s32.b =3D tcg_constant_i32(0); tcg_gen_extrl_i64_i32(c.u.s32.a, t); =20 + disas_jdest(s, i2, is_imm, imm, o->in2); return help_branch(s, &c, is_imm, imm, o->in2); } =20 @@ -1611,9 +1646,9 @@ static DisasJumpType op_bcth(DisasContext *s, DisasOp= s *o) static DisasJumpType op_bct64(DisasContext *s, DisasOps *o) { int r1 =3D get_field(s, r1); - bool is_imm =3D have_field(s, i2); - int imm =3D is_imm ? get_field(s, i2) : 0; DisasCompare c; + bool is_imm; + int imm; =20 c.cond =3D TCG_COND_NE; c.is_64 =3D true; @@ -1622,6 +1657,7 @@ static DisasJumpType op_bct64(DisasContext *s, DisasO= ps *o) c.u.s64.a =3D regs[r1]; c.u.s64.b =3D tcg_constant_i64(0); =20 + disas_jdest(s, i2, is_imm, imm, o->in2); return help_branch(s, &c, is_imm, imm, o->in2); } =20 @@ -1629,10 +1665,10 @@ static DisasJumpType op_bx32(DisasContext *s, Disas= Ops *o) { int r1 =3D get_field(s, r1); int r3 =3D get_field(s, r3); - bool is_imm =3D have_field(s, i2); - int imm =3D is_imm ? get_field(s, i2) : 0; DisasCompare c; + bool is_imm; TCGv_i64 t; + int imm; =20 c.cond =3D (s->insn->data ? TCG_COND_LE : TCG_COND_GT); c.is_64 =3D false; @@ -1645,6 +1681,7 @@ static DisasJumpType op_bx32(DisasContext *s, DisasOp= s *o) tcg_gen_extrl_i64_i32(c.u.s32.b, regs[r3 | 1]); store_reg32_i64(r1, t); =20 + disas_jdest(s, i2, is_imm, imm, o->in2); return help_branch(s, &c, is_imm, imm, o->in2); } =20 @@ -1652,9 +1689,9 @@ static DisasJumpType op_bx64(DisasContext *s, DisasOp= s *o) { int r1 =3D get_field(s, r1); int r3 =3D get_field(s, r3); - bool is_imm =3D have_field(s, i2); - int imm =3D is_imm ? get_field(s, i2) : 0; DisasCompare c; + bool is_imm; + int imm; =20 c.cond =3D (s->insn->data ? TCG_COND_LE : TCG_COND_GT); c.is_64 =3D true; @@ -1668,6 +1705,7 @@ static DisasJumpType op_bx64(DisasContext *s, DisasOp= s *o) tcg_gen_add_i64(regs[r1], regs[r1], regs[r3]); c.u.s64.a =3D regs[r1]; =20 + disas_jdest(s, i2, is_imm, imm, o->in2); return help_branch(s, &c, is_imm, imm, o->in2); } =20 @@ -1685,10 +1723,9 @@ static DisasJumpType op_cj(DisasContext *s, DisasOps= *o) c.u.s64.a =3D o->in1; c.u.s64.b =3D o->in2; =20 - is_imm =3D have_field(s, i4); - if (is_imm) { - imm =3D get_field(s, i4); - } else { + o->out =3D NULL; + disas_jdest(s, i4, is_imm, imm, o->out); + if (!is_imm && !o->out) { imm =3D 0; o->out =3D get_address(s, 0, get_field(s, b4), get_field(s, d4)); @@ -5764,15 +5801,13 @@ static void in2_a2(DisasContext *s, DisasOps *o) =20 static TCGv gen_ri2(DisasContext *s) { - int64_t delta =3D (int64_t)get_field(s, i2) * 2; - TCGv ri2; + TCGv ri2 =3D NULL; + bool is_imm; + int imm; =20 - if (unlikely(s->ex_value)) { - ri2 =3D tcg_temp_new_i64(); - tcg_gen_ld_i64(ri2, cpu_env, offsetof(CPUS390XState, ex_target)); - tcg_gen_addi_i64(ri2, ri2, delta); - } else { - ri2 =3D tcg_constant_i64(s->base.pc_next + delta); + disas_jdest(s, i2, is_imm, imm, ri2); + if (is_imm) { + ri2 =3D tcg_constant_i64(s->base.pc_next + imm * 2); } =20 return ri2; --=20 2.31.1