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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=tsimpson@qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @quicinc.com) X-ZM-MESSAGEID: 1683928550238100001 Only endloop instructions will conditionally write to a predicate. When there is an endloop instruction, we preload the values into new_pred_value. The only place pred_written is needed is when HEX_DEBUG is on. We remove the last use of check_for_attrib. However, new uses will be introduced later in this series, so we mark it with G_GNUC_UNUSED. Signed-off-by: Taylor Simpson Reviewed-by: Richard Henderson Message-Id: <20230427230012.3800327-9-tsimpson@quicinc.com> --- target/hexagon/genptr.c | 16 +++++------- target/hexagon/translate.c | 53 ++++++++++++-------------------------- 2 files changed, 23 insertions(+), 46 deletions(-) diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c index dac62b90a6..9bbaca6300 100644 --- a/target/hexagon/genptr.c +++ b/target/hexagon/genptr.c @@ -137,7 +137,9 @@ void gen_log_pred_write(DisasContext *ctx, int pnum, TC= Gv val) tcg_gen_and_tl(hex_new_pred_value[pnum], hex_new_pred_value[pnum], base_val); } - tcg_gen_ori_tl(hex_pred_written, hex_pred_written, 1 << pnum); + if (HEX_DEBUG) { + tcg_gen_ori_tl(hex_pred_written, hex_pred_written, 1 << pnum); + } set_bit(pnum, ctx->pregs_written); } =20 @@ -826,15 +828,13 @@ static void gen_endloop0(DisasContext *ctx) =20 /* * if (lpcfg =3D=3D 1) { - * hex_new_pred_value[3] =3D 0xff; - * hex_pred_written |=3D 1 << 3; + * p3 =3D 0xff; * } */ TCGLabel *label1 =3D gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_NE, lpcfg, 1, label1); { - tcg_gen_movi_tl(hex_new_pred_value[3], 0xff); - tcg_gen_ori_tl(hex_pred_written, hex_pred_written, 1 << 3); + gen_log_pred_write(ctx, 3, tcg_constant_tl(0xff)); } gen_set_label(label1); =20 @@ -903,14 +903,12 @@ static void gen_endloop01(DisasContext *ctx) =20 /* * if (lpcfg =3D=3D 1) { - * hex_new_pred_value[3] =3D 0xff; - * hex_pred_written |=3D 1 << 3; + * p3 =3D 0xff; * } */ tcg_gen_brcondi_tl(TCG_COND_NE, lpcfg, 1, label1); { - tcg_gen_movi_tl(hex_new_pred_value[3], 0xff); - tcg_gen_ori_tl(hex_pred_written, hex_pred_written, 1 << 3); + gen_log_pred_write(ctx, 3, tcg_constant_tl(0xff)); } gen_set_label(label1); =20 diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index 01f448a325..0b021b301a 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -239,7 +239,7 @@ static int read_packet_words(CPUHexagonState *env, Disa= sContext *ctx, return nwords; } =20 -static bool check_for_attrib(Packet *pkt, int attrib) +static G_GNUC_UNUSED bool check_for_attrib(Packet *pkt, int attrib) { for (int i =3D 0; i < pkt->num_insns; i++) { if (GET_ATTRIB(pkt->insn[i].opcode, attrib)) { @@ -262,11 +262,6 @@ static bool need_slot_cancelled(Packet *pkt) return false; } =20 -static bool need_pred_written(Packet *pkt) -{ - return check_for_attrib(pkt, A_WRITES_PRED_REG); -} - static bool need_next_PC(DisasContext *ctx) { Packet *pkt =3D ctx->pkt; @@ -414,7 +409,7 @@ static void gen_start_packet(DisasContext *ctx) tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], next_PC); } } - if (need_pred_written(pkt)) { + if (HEX_DEBUG) { tcg_gen_movi_tl(hex_pred_written, 0); } =20 @@ -428,6 +423,17 @@ static void gen_start_packet(DisasContext *ctx) } } =20 + /* + * Preload the predicated pred registers into hex_new_pred_value[pred_= num] + * Only endloop instructions conditionally write to pred registers + */ + if (pkt->pkt_has_endloop) { + for (int i =3D 0; i < ctx->preg_log_idx; i++) { + int pred_num =3D ctx->preg_log[i]; + tcg_gen_mov_tl(hex_new_pred_value[pred_num], hex_pred[pred_num= ]); + } + } + /* Preload the predicated HVX registers into future_VRegs and tmp_VReg= s */ if (!bitmap_empty(ctx->predicated_future_vregs, NUM_VREGS)) { int i =3D find_first_bit(ctx->predicated_future_vregs, NUM_VREGS); @@ -535,41 +541,14 @@ static void gen_reg_writes(DisasContext *ctx) =20 static void gen_pred_writes(DisasContext *ctx) { - int i; - /* Early exit if the log is empty */ if (!ctx->preg_log_idx) { return; } =20 - /* - * Only endloop instructions will conditionally - * write a predicate. If there are no endloop - * instructions, we can use the non-conditional - * write of the predicates. - */ - if (ctx->pkt->pkt_has_endloop) { - TCGv zero =3D tcg_constant_tl(0); - TCGv pred_written =3D tcg_temp_new(); - for (i =3D 0; i < ctx->preg_log_idx; i++) { - int pred_num =3D ctx->preg_log[i]; - - tcg_gen_andi_tl(pred_written, hex_pred_written, 1 << pred_num); - tcg_gen_movcond_tl(TCG_COND_NE, hex_pred[pred_num], - pred_written, zero, - hex_new_pred_value[pred_num], - hex_pred[pred_num]); - } - } else { - for (i =3D 0; i < ctx->preg_log_idx; i++) { - int pred_num =3D ctx->preg_log[i]; - tcg_gen_mov_tl(hex_pred[pred_num], hex_new_pred_value[pred_num= ]); - if (HEX_DEBUG) { - /* Do this so HELPER(debug_commit_end) will know */ - tcg_gen_ori_tl(hex_pred_written, hex_pred_written, - 1 << pred_num); - } - } + for (int i =3D 0; i < ctx->preg_log_idx; i++) { + int pred_num =3D ctx->preg_log[i]; + tcg_gen_mov_tl(hex_pred[pred_num], hex_new_pred_value[pred_num]); } } =20 --=20 2.25.1