From nobody Tue May 14 11:04:34 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=quicinc.com ARC-Seal: i=1; a=rsa-sha256; t=1682580565; cv=none; d=zohomail.com; s=zohoarc; b=Lo9dFPzBwdhU1YqjadYDaSPfhEawFgQm5R+eoQZZGmzxZOU2Ab4+4yCVfSBWO6p4AkDLswmQcD7oURS2WsVc5Mec29ondA+Z802JJPxsqzggGXhHPaWD3WnQfzXSb1WwLg3XziB3WTPrGKZGP7YgURfCEisYKxFIt3Dp4OCmzfA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1682580565; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=D/QU4nbpPqPlyL28ob9YEahlkhtqO0CknrKlfodmxj4=; b=RrDRSXl6R4B7s6vDXhgnjwHqrPKqN05KjLtavd3AvETjkml6VIFVuL9V8t2l6c6Ti2iOo3q2zcSDFU5GLRCFNOWhKn795Aex1W2BljTMnTuOTZZ8pGd22Deov7+zn+sBmm6V6jVqfVvMxT55bj+F4E/MVyyGf68C+Qrr/vuMRXg= ARC-Authentication-Results: i=1; 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d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=D/QU4nbpPqPlyL28ob9YEahlkhtqO0CknrKlfodmxj4=; b=IU7Df+D8EjkwozeTuLsdGleTcPUtHbLY9ZSoAyAIb4C4+BvJapvDnxAEHfRVYGio42Wb 6cX/zoG4TOi+nJzPdM364oFkDOEZCEajTsZbIYqSN4IOQo9S/gUzP7efUli7jlMhm4VW uE7XMVP/953laNMDFVsZr4fIkGvNTD1R7ItG17YYS1LuzGOmKrsfsAA4Iw6cB3u0eiKm 8o5zoZ4Syce/6GzTXn1rHQcazSJjIRsjjefF7mcc1D0IUf2DArldyekeR9/xJ5Fhi78E ouyQOG981p6+yKSrwXFEtNpPKwbcFScChDez3vwxcmiFtQdJsZj9v+buKoEa35vZrxqG nQ== From: Jamie Iles To: CC: , , , Subject: [PATCH v3 1/2] cpu: expose qemu_cpu_list_lock for lock-guard use Date: Thu, 27 Apr 2023 03:09:24 +0100 Message-ID: <20230427020925.51003-2-quic_jiles@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230427020925.51003-1-quic_jiles@quicinc.com> References: <20230427020925.51003-1-quic_jiles@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: cf7OwwjTPHsoYJiIK704bzdWKPf8g79j X-Proofpoint-ORIG-GUID: cf7OwwjTPHsoYJiIK704bzdWKPf8g79j X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-27_05,2023-04-26_03,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 priorityscore=1501 malwarescore=0 lowpriorityscore=0 bulkscore=0 mlxscore=0 suspectscore=0 impostorscore=0 spamscore=0 adultscore=0 clxscore=1015 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304270063 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=quic_jiles@quicinc.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_03_06=1.592, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @quicinc.com) X-ZM-MESSAGEID: 1682580567443100003 Content-Type: text/plain; charset="utf-8" Expose qemu_cpu_list_lock globally so that we can use WITH_QEMU_LOCK_GUARD and QEMU_LOCK_GUARD to simplify a few code paths now and in future. Signed-off-by: Jamie Iles Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- cpus-common.c | 2 +- include/exec/cpu-common.h | 1 + linux-user/elfload.c | 12 ++++++------ migration/dirtyrate.c | 26 +++++++++++++------------- trace/control-target.c | 9 ++++----- 5 files changed, 25 insertions(+), 25 deletions(-) diff --git a/cpus-common.c b/cpus-common.c index b0047e456f93..82d439add5c1 100644 --- a/cpus-common.c +++ b/cpus-common.c @@ -25,7 +25,7 @@ #include "qemu/lockable.h" #include "trace/trace-root.h" =20 -static QemuMutex qemu_cpu_list_lock; +QemuMutex qemu_cpu_list_lock; static QemuCond exclusive_cond; static QemuCond exclusive_resume; static QemuCond qemu_work_cond; diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 6feaa40ca7b0..0c833d6ac9c6 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -32,6 +32,7 @@ extern intptr_t qemu_host_page_mask; #define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_si= ze()) =20 /* The CPU list lock nests outside page_(un)lock or mmap_(un)lock */ +extern QemuMutex qemu_cpu_list_lock; void qemu_init_cpu_list(void); void cpu_list_lock(void); void cpu_list_unlock(void); diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 1dbc1f0f9baa..3ff16b163382 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -4238,14 +4238,14 @@ static int fill_note_info(struct elf_note_info *inf= o, info->notes_size +=3D note_size(&info->notes[i]); =20 /* read and fill status of all threads */ - cpu_list_lock(); - CPU_FOREACH(cpu) { - if (cpu =3D=3D thread_cpu) { - continue; + WITH_QEMU_LOCK_GUARD(&qemu_cpu_list_lock) { + CPU_FOREACH(cpu) { + if (cpu =3D=3D thread_cpu) { + continue; + } + fill_thread_info(info, cpu->env_ptr); } - fill_thread_info(info, cpu->env_ptr); } - cpu_list_unlock(); =20 return (0); } diff --git a/migration/dirtyrate.c b/migration/dirtyrate.c index 180ba38c7a80..388337a33249 100644 --- a/migration/dirtyrate.c +++ b/migration/dirtyrate.c @@ -150,25 +150,25 @@ int64_t vcpu_calculate_dirtyrate(int64_t calc_time_ms, retry: init_time_ms =3D qemu_clock_get_ms(QEMU_CLOCK_REALTIME); =20 - cpu_list_lock(); - gen_id =3D cpu_list_generation_id_get(); - records =3D vcpu_dirty_stat_alloc(stat); - vcpu_dirty_stat_collect(stat, records, true); - cpu_list_unlock(); + WITH_QEMU_LOCK_GUARD(&qemu_cpu_list_lock) { + gen_id =3D cpu_list_generation_id_get(); + records =3D vcpu_dirty_stat_alloc(stat); + vcpu_dirty_stat_collect(stat, records, true); + } =20 duration =3D dirty_stat_wait(calc_time_ms, init_time_ms); =20 global_dirty_log_sync(flag, one_shot); =20 - cpu_list_lock(); - if (gen_id !=3D cpu_list_generation_id_get()) { - g_free(records); - g_free(stat->rates); - cpu_list_unlock(); - goto retry; + WITH_QEMU_LOCK_GUARD(&qemu_cpu_list_lock) { + if (gen_id !=3D cpu_list_generation_id_get()) { + g_free(records); + g_free(stat->rates); + cpu_list_unlock(); + goto retry; + } + vcpu_dirty_stat_collect(stat, records, false); } - vcpu_dirty_stat_collect(stat, records, false); - cpu_list_unlock(); =20 for (i =3D 0; i < stat->nvcpu; i++) { dirtyrate =3D do_calculate_dirtyrate(records[i], duration); diff --git a/trace/control-target.c b/trace/control-target.c index 232c97a4a183..c0c1e2310a51 100644 --- a/trace/control-target.c +++ b/trace/control-target.c @@ -8,6 +8,7 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/lockable.h" #include "cpu.h" #include "trace/trace-root.h" #include "trace/control.h" @@ -116,11 +117,9 @@ static bool adding_first_cpu1(void) =20 static bool adding_first_cpu(void) { - bool res; - cpu_list_lock(); - res =3D adding_first_cpu1(); - cpu_list_unlock(); - return res; + QEMU_LOCK_GUARD(&qemu_cpu_list_lock); + + return adding_first_cpu1(); } =20 void trace_init_vcpu(CPUState *vcpu) --=20 2.25.1 From nobody Tue May 14 11:04:34 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=quicinc.com ARC-Seal: i=1; a=rsa-sha256; t=1682580600; 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Thu, 27 Apr 2023 07:29:21 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 33R7TDqO023819 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 27 Apr 2023 07:29:13 GMT Received: from localhost (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Thu, 27 Apr 2023 00:29:12 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type : content-transfer-encoding; s=qcppdkim1; bh=RRlyd1QsM4xpzQjIw6q+TXvaUGrSlrazAwfW0gQ6r3w=; b=nCWUJIWR+j9k+/6IxirwJDxXFzd58kxrOTlTemrDvtyavnBxjzns3ey/ouUSbKJ0rzsm QjDe8GX03tHyUjbzL8hw38ghtdJZwWIfVZEFsnIO/6f4bMzpzPje+fM/vH4j+PtoC2Wz urr2gBS8zJMd/v55H0Bonr+ePzwklkNg9+JpIHO3mcbJEui7yACLT+9JhS7HL6ZTqSmZ gfMahs2TltiVtGU8Dd4MZL9jl8G7si0EUdNDcgwvzUoPqCFlFcDYVCMQ6SbnXO3DWXhx w4Vlh1nawySxcVarnqcicDPi896WJunDFdGt1iQpfxYqTNus5Tq1PB+qSEWDlLLW439U cw== From: Jamie Iles To: CC: , , , Subject: [PATCH v3 2/2] accel/tcg/tcg-accel-ops-rr: ensure fairness with icount Date: Thu, 27 Apr 2023 03:09:25 +0100 Message-ID: <20230427020925.51003-3-quic_jiles@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230427020925.51003-1-quic_jiles@quicinc.com> References: <20230427020925.51003-1-quic_jiles@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 4H8eyscVR3nB9K065uXaWBobu1jD7jdW X-Proofpoint-ORIG-GUID: 4H8eyscVR3nB9K065uXaWBobu1jD7jdW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-27_05,2023-04-26_03,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 adultscore=0 malwarescore=0 clxscore=1015 mlxlogscore=999 spamscore=0 suspectscore=0 lowpriorityscore=0 impostorscore=0 bulkscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304270064 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=quic_jiles@quicinc.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -11 X-Spam_score: -1.2 X-Spam_bar: - X-Spam_report: (-1.2 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_03_06=1.592, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @quicinc.com) X-ZM-MESSAGEID: 1682580601350100001 The round-robin scheduler will iterate over the CPU list with an assigned budget until the next timer expiry and may exit early because of a TB exit. This is fine under normal operation but with icount enabled and SMP it is possible for a CPU to be starved of run time and the system live-locks. For example, booting a riscv64 platform with '-icount shift=3D0,align=3Doff,sleep=3Don -smp 2' we observe a livelock once the ker= nel has timers enabled and starts performing TLB shootdowns. In this case we have CPU 0 in M-mode with interrupts disabled sending an IPI to CPU 1. As we enter the TCG loop, we assign the icount budget to next timer interrupt to CPU 0 and begin executing where the guest is sat in a busy loop exhausting all of the budget before we try to execute CPU 1 which is the target of the IPI but CPU 1 is left with no budget with which to execute and the process repeats. We try here to add some fairness by splitting the budget across all of the CPUs on the thread fairly before entering each one. The CPU count is cached on CPU list generation ID to avoid iterating the list on each loop iteration. With this change it is possible to boot an SMP rv64 guest with icount enabled and no hangs. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Peter Maydell Signed-off-by: Jamie Iles Reviewed-by: Richard Henderson --- accel/tcg/tcg-accel-ops-icount.c | 17 +++++++++++++-- accel/tcg/tcg-accel-ops-icount.h | 3 ++- accel/tcg/tcg-accel-ops-rr.c | 37 +++++++++++++++++++++++++++++++- 3 files changed, 53 insertions(+), 4 deletions(-) diff --git a/accel/tcg/tcg-accel-ops-icount.c b/accel/tcg/tcg-accel-ops-ico= unt.c index 84cc7421be88..e1e8afaf2f99 100644 --- a/accel/tcg/tcg-accel-ops-icount.c +++ b/accel/tcg/tcg-accel-ops-icount.c @@ -89,7 +89,20 @@ void icount_handle_deadline(void) } } =20 -void icount_prepare_for_run(CPUState *cpu) +/* Distribute the budget evenly across all CPUs */ +int64_t icount_percpu_budget(int cpu_count) +{ + int64_t limit =3D icount_get_limit(); + int64_t timeslice =3D limit / cpu_count; + + if (timeslice =3D=3D 0) { + timeslice =3D limit; + } + + return timeslice; +} + +void icount_prepare_for_run(CPUState *cpu, int64_t cpu_budget) { int insns_left; =20 @@ -101,7 +114,7 @@ void icount_prepare_for_run(CPUState *cpu) g_assert(cpu_neg(cpu)->icount_decr.u16.low =3D=3D 0); g_assert(cpu->icount_extra =3D=3D 0); =20 - cpu->icount_budget =3D icount_get_limit(); + cpu->icount_budget =3D MIN(icount_get_limit(), cpu_budget); insns_left =3D MIN(0xffff, cpu->icount_budget); cpu_neg(cpu)->icount_decr.u16.low =3D insns_left; cpu->icount_extra =3D cpu->icount_budget - insns_left; diff --git a/accel/tcg/tcg-accel-ops-icount.h b/accel/tcg/tcg-accel-ops-ico= unt.h index 1b6fd9c60751..16a301b6dc0b 100644 --- a/accel/tcg/tcg-accel-ops-icount.h +++ b/accel/tcg/tcg-accel-ops-icount.h @@ -11,7 +11,8 @@ #define TCG_ACCEL_OPS_ICOUNT_H =20 void icount_handle_deadline(void); -void icount_prepare_for_run(CPUState *cpu); +void icount_prepare_for_run(CPUState *cpu, int64_t cpu_budget); +int64_t icount_percpu_budget(int cpu_count); void icount_process_data(CPUState *cpu); =20 void icount_handle_interrupt(CPUState *cpu, int mask); diff --git a/accel/tcg/tcg-accel-ops-rr.c b/accel/tcg/tcg-accel-ops-rr.c index 290833a37fb2..5788efa5ff4d 100644 --- a/accel/tcg/tcg-accel-ops-rr.c +++ b/accel/tcg/tcg-accel-ops-rr.c @@ -24,6 +24,7 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/lockable.h" #include "sysemu/tcg.h" #include "sysemu/replay.h" #include "sysemu/cpu-timers.h" @@ -139,6 +140,33 @@ static void rr_force_rcu(Notifier *notify, void *data) rr_kick_next_cpu(); } =20 +/* + * Calculate the number of CPUs that we will process in a single iteration= of + * the main CPU thread loop so that we can fairly distribute the instructi= on + * count across CPUs. + * + * The CPU count is cached based on the CPU list generation ID to avoid + * iterating the list every time. + */ +static int rr_cpu_count(void) +{ + static unsigned int last_gen_id =3D ~0; + static int cpu_count; + CPUState *cpu; + + QEMU_LOCK_GUARD(&qemu_cpu_list_lock); + + if (cpu_list_generation_id_get() !=3D last_gen_id) { + cpu_count =3D 0; + CPU_FOREACH(cpu) { + ++cpu_count; + } + last_gen_id =3D cpu_list_generation_id_get(); + } + + return cpu_count; +} + /* * In the single-threaded case each vCPU is simulated in turn. If * there is more than a single vCPU we create a simple timer to kick @@ -185,11 +213,16 @@ static void *rr_cpu_thread_fn(void *arg) cpu->exit_request =3D 1; =20 while (1) { + /* Only used for icount_enabled() */ + int64_t cpu_budget =3D 0; + qemu_mutex_unlock_iothread(); replay_mutex_lock(); qemu_mutex_lock_iothread(); =20 if (icount_enabled()) { + int cpu_count =3D rr_cpu_count(); + /* Account partial waits to QEMU_CLOCK_VIRTUAL. */ icount_account_warp_timer(); /* @@ -197,6 +230,8 @@ static void *rr_cpu_thread_fn(void *arg) * waking up the I/O thread and waiting for completion. */ icount_handle_deadline(); + + cpu_budget =3D icount_percpu_budget(cpu_count); } =20 replay_mutex_unlock(); @@ -218,7 +253,7 @@ static void *rr_cpu_thread_fn(void *arg) =20 qemu_mutex_unlock_iothread(); if (icount_enabled()) { - icount_prepare_for_run(cpu); + icount_prepare_for_run(cpu, cpu_budget); } r =3D tcg_cpus_exec(cpu); if (icount_enabled()) { --=20 2.25.1