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([91.209.212.61]) by smtp.gmail.com with ESMTPSA id d8-20020ac25448000000b004ec55ac6cd1sm2175662lfn.136.2023.04.25.12.40.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Apr 2023 12:40:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1682451648; x=1685043648; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=voYrBLtybOoDO/WS2tn3zAHmuD0tWE6cjSLyscFlUk8=; b=hbpbm7l8FBjy1K758QuNNVHEKXsL1nabgLzYA57tRM0q3g1vsGSuvHRiH7LAcxiGw2 vh9WTJP+4hNm73hvM0GjcLj74JBSAifGP4jH9M3jtlmoZVh0naXf0D1Gltu1YqlyJGiQ 1sRua6T5IJkn/11Za7+wGdFnOTQHvqUH5QhJ17Jlsur1CjvVc4SuUFK2ShJB5kqcv+fH WNycysEA3Pw1rLoOLYSe+0Jwa+sMUfejH8kKIOkYhCGrkETAGN7C94VU1TKmxfaiTS48 WWp4K/By84q5krWYzk3NhgH92CdZLRcuAFTmQ5J9q27hNMOqdmTpXODCCibcHPL4en8M y4eQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682451648; x=1685043648; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=voYrBLtybOoDO/WS2tn3zAHmuD0tWE6cjSLyscFlUk8=; b=bC+uhIS31mmgi4UA/DHZ86gKv5mJXUITqBXjbX+yCJ0udpoNBRxvl6q99OBrjytHTd zTAsS2LY7dlbFtowCg+u0xsmgigKQ84gWEvL9z24/zqnHUnVvXvZ2lRlMWA4oY8jVwlv Nc1J+QvWF0byqM6n7bDMESiDRx4Qxk6vf8Ri9puFGepodV953I+oEZn+cy7DhnvBULru CekPjHu5MG9+Hk/AUP3Nw0jEdMm80N4dZaRuo/oUOC4IfkNUF/kV40o2B28io1mux30c JqixdMIbgG24uIUOAQ0LCiXCcQWNrp1S/gEauHLpfDpL+/gZcv5eKAJFJlErOPkBtag0 P2LA== X-Gm-Message-State: AAQBX9cUhVjpO1yQCl2BBwlFvq/RAG7gO+uVLDPon3B1GkchrySMZ99+ c2gS86pSrwe8IvLIl8yvKhvC2wIzxKzf6Q0nZ6Mi9w== X-Google-Smtp-Source: AKy350a/1VcrT5JprDcIPTCVehj7eAF7+zCrcFhUOAXk5OcrLIEzReoArz8BrBqnF7PCAPPCZfP8Tg== X-Received: by 2002:ac2:43d3:0:b0:4ec:883a:6664 with SMTP id u19-20020ac243d3000000b004ec883a6664mr5390838lfl.16.1682451648443; Tue, 25 Apr 2023 12:40:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, git@xen0n.name, jiaxun.yang@flygoat.com, philmd@linaro.org Subject: [PATCH v3 43/57] tcg/i386: Use atom_and_align_for_opc Date: Tue, 25 Apr 2023 20:31:32 +0100 Message-Id: <20230425193146.2106111-44-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230425193146.2106111-1-richard.henderson@linaro.org> References: <20230425193146.2106111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::129; envelope-from=richard.henderson@linaro.org; helo=mail-lf1-x129.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1682452168521100009 Content-Type: text/plain; charset="utf-8" No change to the ultimate load/store routines yet, so some atomicity conditions not yet honored, but plumbs the change to alignment through the relevant functions. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 34 ++++++++++++++++++++++------------ 1 file changed, 22 insertions(+), 12 deletions(-) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index 8c0902844a..6a492bb9e7 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -1776,6 +1776,8 @@ typedef struct { int index; int ofs; int seg; + MemOp align; + MemOp atom; } HostAddress; =20 bool tcg_target_has_memory_bswap(MemOp memop) @@ -1897,8 +1899,12 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContex= t *s, HostAddress *h, { TCGLabelQemuLdst *ldst =3D NULL; MemOp opc =3D get_memop(oi); - unsigned a_bits =3D get_alignment_bits(opc); - unsigned a_mask =3D (1 << a_bits) - 1; + MemOp atom_u; + unsigned a_mask; + + h->align =3D atom_and_align_for_opc(s, &h->atom, &atom_u, opc, + MO_ATOM_IFALIGN, false); + a_mask =3D (1 << h->align) - 1; =20 #ifdef CONFIG_SOFTMMU int cmp_ofs =3D is_ld ? offsetof(CPUTLBEntry, addr_read) @@ -1943,10 +1949,12 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGConte= xt *s, HostAddress *h, TLB_MASK_TABLE_OFS(mem_index) + offsetof(CPUTLBDescFast, table)); =20 - /* If the required alignment is at least as large as the access, simply - copy the address and mask. For lesser alignments, check that we do= n't - cross pages for the complete access. */ - if (a_bits >=3D s_bits) { + /* + * If the required alignment is at least as large as the access, simply + * copy the address and mask. For lesser alignments, check that we do= n't + * cross pages for the complete access. + */ + if (a_mask >=3D s_mask) { tcg_out_mov(s, ttype, TCG_REG_L1, addrlo); } else { tcg_out_modrm_offset(s, OPC_LEA + trexw, TCG_REG_L1, @@ -1978,12 +1986,12 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGConte= xt *s, HostAddress *h, tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_L0, TCG_REG_L0, offsetof(CPUTLBEntry, addend)); =20 - *h =3D (HostAddress) { - .base =3D addrlo, - .index =3D TCG_REG_L0, - }; + h->base =3D addrlo; + h->index =3D TCG_REG_L0; + h->ofs =3D 0; + h->seg =3D 0; #else - if (a_bits) { + if (a_mask) { ldst =3D new_ldst_label(s); =20 ldst->is_ld =3D is_ld; @@ -1998,8 +2006,10 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContex= t *s, HostAddress *h, s->code_ptr +=3D 4; } =20 - *h =3D x86_guest_base; h->base =3D addrlo; + h->index =3D x86_guest_base.index; + h->ofs =3D x86_guest_base.ofs; + h->seg =3D x86_guest_base.seg; #endif =20 return ldst; --=20 2.34.1