From nobody Wed Feb 11 06:00:11 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1682266912; cv=none; d=zohomail.com; s=zohoarc; b=WgyIc4Pq1xBDHFxSDWOLMA5EJ4EFyrYizqZ5pu+ltFejhsckKccU8n0pM+/37E4pnMkez2RJjteNDdrEiYhni8RuCe4D1r/tnCd6jQdte1FZM1Be2B0vskVOJ6U1m53KuzTgpBX8MvrN2dliTN8EAR8eIERBdg/Yl0n1bI0PtIY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1682266912; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=Ivf3TwjGFG/90wrGGnjiySWL+qsYnysLXtrvGeaBUYw=; b=ORuDWbS05YjJT8POLjgDBE3OjJq8FAbxuA8B7c29dDrsj38UoKm8K9LP7eA0W1/iBFz3Q4H7KQgnGHwT331VZ8ETsoS/jS3vAiBBwtMWnLkI+1FVtAnDU0lX+XuiuRoEUm3vcw7iCXNziCrYBwCRBXLcXwSqQwrIxL7Doq/utqQ= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1682266912453243.1411257849486; Sun, 23 Apr 2023 09:21:52 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pqcTC-0002C6-AT; Sun, 23 Apr 2023 12:21:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pqcTA-00024H-LJ for qemu-devel@nongnu.org; Sun, 23 Apr 2023 12:21:44 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pqcT9-0004rd-0R for qemu-devel@nongnu.org; Sun, 23 Apr 2023 12:21:44 -0400 Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.200]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4Q4D361nJWz67QQ9; Mon, 24 Apr 2023 00:18:42 +0800 (CST) Received: from SecurePC-101-06.china.huawei.com (10.122.247.231) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Sun, 23 Apr 2023 17:21:40 +0100 To: , Michael Tsirkin , Fan Ni CC: , , Ira Weiny , Alison Schofield , Michael Roth , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Dave Jiang , Markus Armbruster , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Eric Blake , Mike Maslenkin , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Thomas Huth Subject: [PATCH v5 3/6] bswap: Add the ability to store to an unaligned 24 bit field Date: Sun, 23 Apr 2023 17:20:10 +0100 Message-ID: <20230423162013.4535-4-Jonathan.Cameron@huawei.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230423162013.4535-1-Jonathan.Cameron@huawei.com> References: <20230423162013.4535-1-Jonathan.Cameron@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.122.247.231] X-ClientProxiedBy: lhrpeml500004.china.huawei.com (7.191.163.9) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=185.176.79.56; envelope-from=jonathan.cameron@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jonathan Cameron From: Jonathan Cameron via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1682266912775100001 Content-Type: text/plain; charset="utf-8" From: Ira Weiny CXL has 24 bit unaligned fields which need to be stored to. CXL is specified as little endian. Define st24_le_p() and the supporting functions to store such a field from a 32 bit host native value. The use of b, w, l, q as the size specifier is limiting. So "24" was used for the size part of the function name. Reviewed-by: Fan Ni Signed-off-by: Ira Weiny Signed-off-by: Jonathan Cameron --- v5: - Added assertion that upper bits of the input parameter aren't set. - Mask value in bswap24s() - update docs --- docs/devel/loads-stores.rst | 1 + include/qemu/bswap.h | 25 +++++++++++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst index ad5dfe133e..57b4396f7a 100644 --- a/docs/devel/loads-stores.rst +++ b/docs/devel/loads-stores.rst @@ -36,6 +36,7 @@ store: ``st{size}_{endian}_p(ptr, val)`` ``size`` - ``b`` : 8 bits - ``w`` : 16 bits + - ``24`` : 24 bits - ``l`` : 32 bits - ``q`` : 64 bits =20 diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h index 15a78c0db5..91ed9c7e2c 100644 --- a/include/qemu/bswap.h +++ b/include/qemu/bswap.h @@ -8,11 +8,25 @@ #undef bswap64 #define bswap64(_x) __builtin_bswap64(_x) =20 +static inline uint32_t bswap24(uint32_t x) +{ + assert((x & 0xff000000U) =3D=3D 0); + + return (((x & 0x000000ffU) << 16) | + ((x & 0x0000ff00U) << 0) | + ((x & 0x00ff0000U) >> 16)); +} + static inline void bswap16s(uint16_t *s) { *s =3D __builtin_bswap16(*s); } =20 +static inline void bswap24s(uint32_t *s) +{ + *s =3D bswap24(*s & 0x00ffffffU); +} + static inline void bswap32s(uint32_t *s) { *s =3D __builtin_bswap32(*s); @@ -176,6 +190,7 @@ CPU_CONVERT(le, 64, uint64_t) * size is: * b: 8 bits * w: 16 bits + * 24: 24 bits * l: 32 bits * q: 64 bits * @@ -248,6 +263,11 @@ static inline void stw_he_p(void *ptr, uint16_t v) __builtin_memcpy(ptr, &v, sizeof(v)); } =20 +static inline void st24_he_p(void *ptr, uint32_t v) +{ + __builtin_memcpy(ptr, &v, 3); +} + static inline int ldl_he_p(const void *ptr) { int32_t r; @@ -297,6 +317,11 @@ static inline void stw_le_p(void *ptr, uint16_t v) stw_he_p(ptr, le_bswap(v, 16)); } =20 +static inline void st24_le_p(void *ptr, uint32_t v) +{ + st24_he_p(ptr, le_bswap(v, 24)); +} + static inline void stl_le_p(void *ptr, uint32_t v) { stl_he_p(ptr, le_bswap(v, 32)); --=20 2.37.2