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[46.193.226.34]) by smtp.gmail.com with ESMTPSA id c10-20020a7bc2aa000000b003f080b2f9f4sm12550541wmk.27.2023.04.23.03.19.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 23 Apr 2023 03:19:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1682245199; x=1684837199; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aK9KvCkrFCIhUtqW+VFpmHF3TuBN/cpdq/go4SSQx4w=; b=RdIWHncXEHQgd8R041xH8Ld4CQ0lKnAb3jkLuNO/iWWUpZEevCkKSlbXI5/baGViB5 Fomhvmw2IrL5mXZJmxik7NvIYAYUTSJkgRYFOGEh6pBr/6DgaKLSGyXNzzmZsqEFwTxN 37a+KTdEsJ1XTeERD04hTV4N3hd/udjiqExANNPy5Ug0TgoPXbN+pNmeCfGjqhSiEf88 8EQnbPzevwYp+Sk+BvxNj1UNP7Y2H+E3yN/oV6xiJGAk6GPVhhdXgIJWz4eVTN++W9x4 RZSWmXZ/eoIW6iaflis3Vv//Gsro+FaXSFJ6dnKf8mUCSGD3eGn/kLzW2OlqNw/pN8hg GsRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682245199; x=1684837199; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aK9KvCkrFCIhUtqW+VFpmHF3TuBN/cpdq/go4SSQx4w=; b=eylxQF7IwSVw8pmHVyYnHdIRaLuni7n85Nq7MYRvKDgewm5XDyeaZUy+k05hIQRhWR C0wKtHlneUOzAvHTziuXXm8kYgaqAdOJ7u8MC8RPR//6D7EGscBsfFuJ95PSc+ISk9e3 pbccNzW+/G1hl5wuQvEs09TuvyFJnpp9MsGxcFeUqFbNFPCB89vv5mmvHJCVSiGMzKxA X1q3fmTpVuLpDFGwMeErNGIMozWQ3vCEtUUJq8FnCsmxXqhbvSunjpEakMwsqFpjH0wj i3MWUdydURljsAn7eTnI/Kih91prTkUriamv+F1T09linuAl+v24ixcohBTOLqFVIDfN klRw== X-Gm-Message-State: AAQBX9ei0ugBFiH8TubMAO2oaA+f17b7rH0t9CfHdXLKpIzEpzFMweYk QQeUMer2oC/BWZ5ruzvlASLOLPrOejKCFhnX3Zo15Q== X-Google-Smtp-Source: AKy350b3Fpljx40q8iKPswuvUj18Io8TOFD+Bf6QLcpkZqUWEGI8NsQ+CIxnkWSdKqA27j9hZPcQHg== X-Received: by 2002:adf:eb52:0:b0:2f9:cda1:4c45 with SMTP id u18-20020adfeb52000000b002f9cda14c45mr7086098wrn.58.1682245199246; Sun, 23 Apr 2023 03:19:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 13/15] tcg: Introduce tcg_out_xchg Date: Sun, 23 Apr 2023 11:19:48 +0100 Message-Id: <20230423101950.817899-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230423101950.817899-1-richard.henderson@linaro.org> References: <20230423101950.817899-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1682245342050100011 We will want a backend interface for register swapping. This is only properly defined for x86; all others get a stub version that always indicates failure. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/tcg.c | 2 ++ tcg/aarch64/tcg-target.c.inc | 5 +++++ tcg/arm/tcg-target.c.inc | 5 +++++ tcg/i386/tcg-target.c.inc | 8 ++++++++ tcg/loongarch64/tcg-target.c.inc | 5 +++++ tcg/mips/tcg-target.c.inc | 5 +++++ tcg/ppc/tcg-target.c.inc | 5 +++++ tcg/riscv/tcg-target.c.inc | 5 +++++ tcg/s390x/tcg-target.c.inc | 5 +++++ tcg/sparc64/tcg-target.c.inc | 5 +++++ tcg/tci/tcg-target.c.inc | 5 +++++ 11 files changed, 55 insertions(+) diff --git a/tcg/tcg.c b/tcg/tcg.c index 328e018a80..fde5ccc57c 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -115,6 +115,8 @@ static void tcg_out_exts_i32_i64(TCGContext *s, TCGReg = ret, TCGReg arg); static void tcg_out_extu_i32_i64(TCGContext *s, TCGReg ret, TCGReg arg); static void tcg_out_extrl_i64_i32(TCGContext *s, TCGReg ret, TCGReg arg); static void tcg_out_addi_ptr(TCGContext *s, TCGReg, TCGReg, tcg_target_lon= g); +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) + __attribute__((unused)); static void tcg_out_exit_tb(TCGContext *s, uintptr_t arg); static void tcg_out_goto_tb(TCGContext *s, int which); static void tcg_out_op(TCGContext *s, TCGOpcode opc, diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 29bc97ed1c..4ec3cf3172 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -1106,6 +1106,11 @@ static void tcg_out_movi(TCGContext *s, TCGType type= , TCGReg rd, tcg_out_insn(s, 3305, LDR, 0, rd); } =20 +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index ec65cb5720..8d769ca0a2 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -2607,6 +2607,11 @@ static void tcg_out_movi(TCGContext *s, TCGType type, tcg_out_movi32(s, COND_AL, ret, arg); } =20 +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index f8c0eed01d..c8e2bf537f 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -460,6 +460,7 @@ static bool tcg_target_const_match(int64_t val, TCGType= type, int ct) #define OPC_VPTERNLOGQ (0x25 | P_EXT3A | P_DATA16 | P_VEXW | P_EVEX) #define OPC_VZEROUPPER (0x77 | P_EXT) #define OPC_XCHG_ax_r32 (0x90) +#define OPC_XCHG_EvGv (0x87) =20 #define OPC_GRP3_Eb (0xf6) #define OPC_GRP3_Ev (0xf7) @@ -1078,6 +1079,13 @@ static void tcg_out_movi(TCGContext *s, TCGType type, } } =20 +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + int rexw =3D type =3D=3D TCG_TYPE_I32 ? 0 : P_REXW; + tcg_out_modrm(s, OPC_XCHG_EvGv + rexw, r1, r2); + return true; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.= c.inc index f51c4ce81b..21c2fc9e98 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -419,6 +419,11 @@ static void tcg_out_addi(TCGContext *s, TCGType type, = TCGReg rd, } } =20 +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc index b0f9fbc44c..346c614354 100644 --- a/tcg/mips/tcg-target.c.inc +++ b/tcg/mips/tcg-target.c.inc @@ -595,6 +595,11 @@ static void tcg_out_extrl_i64_i32(TCGContext *s, TCGRe= g rd, TCGReg rs) tcg_out_ext32s(s, rd, rs); } =20 +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index b1d9c0bbe4..77abb7d20c 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -1154,6 +1154,11 @@ static void tcg_out_movi(TCGContext *s, TCGType type= , TCGReg ret, } } =20 +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index 0d92135bf6..328cbc0ad6 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -561,6 +561,11 @@ static void tcg_out_movi(TCGContext *s, TCGType type, = TCGReg rd, tcg_out_opc_imm(s, OPC_LD, rd, rd, 0); } =20 +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 0578fce4d7..b399798664 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -1076,6 +1076,11 @@ static inline bool tcg_out_sti(TCGContext *s, TCGTyp= e type, TCGArg val, return false; } =20 +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc index 869d9a0521..4f477d539c 100644 --- a/tcg/sparc64/tcg-target.c.inc +++ b/tcg/sparc64/tcg-target.c.inc @@ -542,6 +542,11 @@ static void tcg_out_extrl_i64_i32(TCGContext *s, TCGRe= g rd, TCGReg rs) tcg_out_mov(s, TCG_TYPE_I32, rd, rs); } =20 +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 68531e35ec..4cf03a579c 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -645,6 +645,11 @@ static void tcg_out_extrl_i64_i32(TCGContext *s, TCGRe= g rd, TCGReg rs) tcg_out_mov(s, TCG_TYPE_I32, rd, rs); } =20 +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { --=20 2.34.1