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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1682002951581100003 Now we no longer have dynamic state affecting things we can remove the additional fields in cpu.h and simplify the TB hash calculation. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1358 Signed-off-by: Alex Benn=C3=A9e --- accel/tcg/tb-hash.h | 6 +++--- include/exec/exec-all.h | 3 --- include/hw/core/cpu.h | 5 ----- accel/tcg/cpu-exec.c | 7 +------ accel/tcg/tb-maint.c | 5 ++--- accel/tcg/translate-all.c | 6 ------ 6 files changed, 6 insertions(+), 26 deletions(-) diff --git a/accel/tcg/tb-hash.h b/accel/tcg/tb-hash.h index 83dc610e4c..1d19c69caa 100644 --- a/accel/tcg/tb-hash.h +++ b/accel/tcg/tb-hash.h @@ -61,10 +61,10 @@ static inline unsigned int tb_jmp_cache_hash_func(targe= t_ulong pc) #endif /* CONFIG_SOFTMMU */ =20 static inline -uint32_t tb_hash_func(tb_page_addr_t phys_pc, target_ulong pc, uint32_t fl= ags, - uint32_t cf_mask, uint32_t trace_vcpu_dstate) +uint32_t tb_hash_func(tb_page_addr_t phys_pc, target_ulong pc, + uint32_t flags, uint32_t cf_mask) { - return qemu_xxhash7(phys_pc, pc, flags, cf_mask, trace_vcpu_dstate); + return qemu_xxhash6(phys_pc, pc, flags, cf_mask); } =20 #endif diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index ecded1f112..3ee76af28b 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -548,9 +548,6 @@ struct TranslationBlock { #define CF_CLUSTER_MASK 0xff000000 /* Top 8 bits are cluster ID */ #define CF_CLUSTER_SHIFT 24 =20 - /* Per-vCPU dynamic tracing state used to generate this TB */ - uint32_t trace_vcpu_dstate; - /* * Above fields used for comparing */ diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 397fd3ac68..4b399643d0 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -262,7 +262,6 @@ typedef void (*run_on_cpu_func)(CPUState *cpu, run_on_c= pu_data data); struct qemu_work_item; =20 #define CPU_UNSET_NUMA_NODE_ID -1 -#define CPU_TRACE_DSTATE_MAX_EVENTS 32 =20 /** * CPUState: @@ -403,10 +402,6 @@ struct CPUState { /* Use by accel-block: CPU is executing an ioctl() */ QemuLockCnt in_ioctl_lock; =20 - /* Used for events with 'vcpu' and *without* the 'disabled' properties= */ - DECLARE_BITMAP(trace_dstate_delayed, CPU_TRACE_DSTATE_MAX_EVENTS); - DECLARE_BITMAP(trace_dstate, CPU_TRACE_DSTATE_MAX_EVENTS); - DECLARE_BITMAP(plugin_mask, QEMU_PLUGIN_EV_MAX); =20 #ifdef CONFIG_PLUGIN diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 8370c92c05..cd058619f5 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -175,7 +175,6 @@ struct tb_desc { tb_page_addr_t page_addr0; uint32_t flags; uint32_t cflags; - uint32_t trace_vcpu_dstate; }; =20 static bool tb_lookup_cmp(const void *p, const void *d) @@ -187,7 +186,6 @@ static bool tb_lookup_cmp(const void *p, const void *d) tb_page_addr0(tb) =3D=3D desc->page_addr0 && tb->cs_base =3D=3D desc->cs_base && tb->flags =3D=3D desc->flags && - tb->trace_vcpu_dstate =3D=3D desc->trace_vcpu_dstate && tb_cflags(tb) =3D=3D desc->cflags) { /* check next page if needed */ tb_page_addr_t tb_phys_page1 =3D tb_page_addr1(tb); @@ -228,7 +226,6 @@ static TranslationBlock *tb_htable_lookup(CPUState *cpu= , target_ulong pc, desc.cs_base =3D cs_base; desc.flags =3D flags; desc.cflags =3D cflags; - desc.trace_vcpu_dstate =3D *cpu->trace_dstate; desc.pc =3D pc; phys_pc =3D get_page_addr_code(desc.env, pc); if (phys_pc =3D=3D -1) { @@ -236,7 +233,7 @@ static TranslationBlock *tb_htable_lookup(CPUState *cpu= , target_ulong pc, } desc.page_addr0 =3D phys_pc; h =3D tb_hash_func(phys_pc, (cflags & CF_PCREL ? 0 : pc), - flags, cflags, *cpu->trace_dstate); + flags, cflags); return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp); } =20 @@ -263,7 +260,6 @@ static inline TranslationBlock *tb_lookup(CPUState *cpu= , target_ulong pc, jc->array[hash].pc =3D=3D pc && tb->cs_base =3D=3D cs_base && tb->flags =3D=3D flags && - tb->trace_vcpu_dstate =3D=3D *cpu->trace_dstate && tb_cflags(tb) =3D=3D cflags)) { return tb; } @@ -282,7 +278,6 @@ static inline TranslationBlock *tb_lookup(CPUState *cpu= , target_ulong pc, tb->pc =3D=3D pc && tb->cs_base =3D=3D cs_base && tb->flags =3D=3D flags && - tb->trace_vcpu_dstate =3D=3D *cpu->trace_dstate && tb_cflags(tb) =3D=3D cflags)) { return tb; } diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index cb1f806f00..432a0cffdb 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -50,7 +50,6 @@ static bool tb_cmp(const void *ap, const void *bp) a->cs_base =3D=3D b->cs_base && a->flags =3D=3D b->flags && (tb_cflags(a) & ~CF_INVALID) =3D=3D (tb_cflags(b) & ~CF_INVALI= D) && - a->trace_vcpu_dstate =3D=3D b->trace_vcpu_dstate && tb_page_addr0(a) =3D=3D tb_page_addr0(b) && tb_page_addr1(a) =3D=3D tb_page_addr1(b)); } @@ -888,7 +887,7 @@ static void do_tb_phys_invalidate(TranslationBlock *tb,= bool rm_from_page_list) /* remove the TB from the hash list */ phys_pc =3D tb_page_addr0(tb); h =3D tb_hash_func(phys_pc, (orig_cflags & CF_PCREL ? 0 : tb->pc), - tb->flags, orig_cflags, tb->trace_vcpu_dstate); + tb->flags, orig_cflags); if (!qht_remove(&tb_ctx.htable, tb, h)) { return; } @@ -969,7 +968,7 @@ TranslationBlock *tb_link_page(TranslationBlock *tb, tb= _page_addr_t phys_pc, =20 /* add in the hash table */ h =3D tb_hash_func(phys_pc, (tb->cflags & CF_PCREL ? 0 : tb->pc), - tb->flags, tb->cflags, tb->trace_vcpu_dstate); + tb->flags, tb->cflags); qht_insert(&tb_ctx.htable, tb, h, &existing_tb); =20 /* remove TB from the page(s) if we couldn't insert it */ diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 5b13281119..2ea42970e1 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -65,11 +65,6 @@ #include "internal.h" #include "perf.h" =20 -/* Make sure all possible CPU event bits fit in tb->trace_vcpu_dstate */ -QEMU_BUILD_BUG_ON(CPU_TRACE_DSTATE_MAX_EVENTS > - sizeof_field(TranslationBlock, trace_vcpu_dstate) - * BITS_PER_BYTE); - TBContext tb_ctx; =20 /* Encode VAL as a signed leb128 sequence at P. @@ -348,7 +343,6 @@ TranslationBlock *tb_gen_code(CPUState *cpu, tb->cs_base =3D cs_base; tb->flags =3D flags; tb->cflags =3D cflags; - tb->trace_vcpu_dstate =3D *cpu->trace_dstate; tb_set_page_addr0(tb, phys_pc); tb_set_page_addr1(tb, -1); tcg_ctx->gen_tb =3D tb; --=20 2.39.2