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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id o2-20020a5d58c2000000b002fe522117fdsm1556388wrf.36.2023.04.20.03.05.06 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Apr 2023 03:05:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1681985106; x=1684577106; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=NO9cU/K25d1+EVnE2I5xYDNNqPgct0OWLItzEhlSFrQ=; b=W4vKKjIwoBFS5ar6EsfoYykE2AMeWw3jWx1ZcTu8S3EcCuyLjE/7Wc5cAqGVorEBH8 MPuhYsmSUK6chzIL2QM5Ci06fXBw7p8o3MTAK+4Ee4qU7oKwUz0MpD2XT0Y/5amDzNEJ exgpL2DdctfwwOYOUWBHl1kmxmCVbudZ0Wz4kC+4eHQK10+3mirwaIbcGXq4ng8Ip99t sBisCHlbYiIjLOshkuKqUSvYtiy488Db+1Kl56YOsAk4mqoiLcrqCWWPST9uI9cawybd 1tkccLEyPZaO7RSd8B6JvQPniuBRYH5EatbyDBCfCJ4XFBLg/VHzqK3oKolAGGtp55mq rjTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681985106; x=1684577106; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NO9cU/K25d1+EVnE2I5xYDNNqPgct0OWLItzEhlSFrQ=; b=hLwwTusncmYE+fiHVI/1qIdkHh8Kthfv6K3YhtPXF5c0JyUaU5dczSVCH8ppOLmh6i wCg+qjMLNUi+uDt1Pge4SAvL96FuCq6k9fngswgv5j/yNxQzJstDQsSWldGHTwvXadlC iwjlqWSTkzOsONf4G8R5VMgX2ucF/AVYsTl1oc4jpzthjBuanRus2zPqs5KS2ZLcmgL4 XP2IXlG18Yi0QJ/84K7EgHmLyuYkHsGrm5sJl2P86nZ2jkwM3Y/oSAKhHPpAHtm5ASKd rIrHqy8MJocII5OmkNj6cJr/vOil5LPj9nJLo/mvgF2EXKkOiJTwhUe1hDQ1zmmWegFR HAzQ== X-Gm-Message-State: AAQBX9d+fTn/eGBLIi2kTsMEnSmOivrgLNKxP3whRJJrCk+XY02+8s+k MvkaEJ2wszAI47UZV1vKrmXMngp0FupQeQA9DQ0= X-Google-Smtp-Source: AKy350bRtqAca6OBtPGBbwnCk6h4fU5b0KSEzT2tpum2sb7O+mkJ0BflETV6I+FJVgs7AsFPeVLyeA== X-Received: by 2002:a05:6000:90:b0:2fb:c75f:8f22 with SMTP id m16-20020a056000009000b002fbc75f8f22mr903525wrx.56.1681985106568; Thu, 20 Apr 2023 03:05:06 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 13/21] target/arm: Don't set ISV when reporting stage 1 faults in ESR_EL2 Date: Thu, 20 Apr 2023 11:04:48 +0100 Message-Id: <20230420100456.944969-14-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230420100456.944969-1-peter.maydell@linaro.org> References: <20230420100456.944969-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1681985194275100011 Content-Type: text/plain; charset="utf-8" The syndrome value reported to ESR_EL2 should only contain the detailed instruction syndrome information when the fault has been caused by a stage 2 abort, not when the fault was a stage 1 abort (i.e. caused by execution at EL2). We were getting this wrong and reporting the detailed ISV information all the time. Fix the bug by checking fi->stage2. Add a TODO comment noting the cases where we'll have to come back and revisit this when we implement FEAT_LS64 and friends. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20230331145045.2584941-3-peter.maydell@linaro.org --- target/arm/tcg/tlb_helper.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/target/arm/tcg/tlb_helper.c b/target/arm/tcg/tlb_helper.c index 1a61adb8a68..d5a89bc5141 100644 --- a/target/arm/tcg/tlb_helper.c +++ b/target/arm/tcg/tlb_helper.c @@ -32,8 +32,9 @@ static inline uint32_t merge_syn_data_abort(uint32_t temp= late_syn, uint32_t syn; =20 /* - * ISV is only set for data aborts routed to EL2 and - * never for stage-1 page table walks faulting on stage 2. + * ISV is only set for stage-2 data aborts routed to EL2 and + * never for stage-1 page table walks faulting on stage 2 + * or for stage-1 faults. * * Furthermore, ISV is only set for certain kinds of load/stores. * If the template syndrome does not have ISV set, we should leave @@ -42,8 +43,14 @@ static inline uint32_t merge_syn_data_abort(uint32_t tem= plate_syn, * See ARMv8 specs, D7-1974: * ISS encoding for an exception from a Data Abort, the * ISV field. + * + * TODO: FEAT_LS64/FEAT_LS64_V/FEAT_SL64_ACCDATA: Translation, + * Access Flag, and Permission faults caused by LD64B, ST64B, + * ST64BV, or ST64BV0 insns report syndrome info even for stage-1 + * faults and regardless of the target EL. */ - if (!(template_syn & ARM_EL_ISV) || target_el !=3D 2 || fi->s1ptw) { + if (!(template_syn & ARM_EL_ISV) || target_el !=3D 2 + || fi->s1ptw || !fi->stage2) { syn =3D syn_data_abort_no_iss(same_el, 0, fi->ea, 0, fi->s1ptw, is_write, fsc); } else { --=20 2.34.1