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a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1681301929; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ISs1dDcqBnJkL5ZyU7VfbtWOIJOkBTltBOlhGZ9Av88=; b=x8PZ7+Yj7G2YRfiVDiEKdSuyw8oR492O2A9aEfu7zNuyVWOALw+G13YbS/0Ow2FoQ2+0x3 eyRPCIdRXctO3JBQ== From: Fabiano Rosas To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Paolo Bonzini , Claudio Fontana , Eduardo Habkost , Alexander Graf , Cornelia Huck Subject: [PATCH v10 04/11] target/arm: Do not expose all -cpu max features to qtests Date: Wed, 12 Apr 2023 09:18:22 -0300 Message-Id: <20230412121829.14452-5-farosas@suse.de> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20230412121829.14452-1-farosas@suse.de> References: <20230412121829.14452-1-farosas@suse.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:67c:2178:6::1d; envelope-from=farosas@suse.de; helo=smtp-out2.suse.de X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @suse.de) X-ZM-MESSAGEID: 1681301961102100003 Content-Type: text/plain; charset="utf-8" We're about to move the TCG-only -cpu max configuration code under CONFIG_TCG. To be able to do that we need to make sure the qtests still have some cpu configured even when no other accelerator is available. Delineate now what is used with TCG-only and what is also used with qtests to make the subsequent patches cleaner. Signed-off-by: Fabiano Rosas Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/arm/cpu64.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 4537aec141..b3a93e7aa1 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -25,6 +25,8 @@ #include "qemu/module.h" #include "sysemu/kvm.h" #include "sysemu/hvf.h" +#include "sysemu/qtest.h" +#include "sysemu/tcg.h" #include "kvm_arm.h" #include "hvf_arm.h" #include "qapi/visitor.h" @@ -1365,10 +1367,14 @@ static void aarch64_max_initfn(Object *obj) return; } =20 + if (tcg_enabled() || qtest_enabled()) { + aarch64_a57_initfn(obj); + } + /* '-cpu max' for TCG: we currently do this as "A57 with extra things"= */ - - aarch64_a57_initfn(obj); - aarch64_max_tcg_initfn(obj); + if (tcg_enabled()) { + aarch64_max_tcg_initfn(obj); + } } =20 static const ARMCPUInfo aarch64_cpus[] =3D { --=20 2.35.3